Senior Staff Analog Design Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and highly skilled engineer committed to advancing the field of high-speed analog design. You bring a wealth of experience in designing critical analog and mixed-signal blocks, particularly for cutting-edge PCIe 6 and PCIe 7 or SerDes PHY solutions. Your technical expertise encompasses transistor-level design, deep knowledge of CMOS (including finFET and SOI processes), and a proven ability to create robust high-speed building blocks—such as LDOs, Bandgap references, ADC/DACs, PLLs, and DLLs—that consistently meet rigorous performance, power, and area targets.

You thrive in collaborative, multidisciplinary environments, where your clear communication and mentoring skills empower both peers and junior engineers to excel. Your proactive approach to problem-solving and your dedication to continuous improvement ensure that you stay at the forefront of technology trends. You are adept at analyzing and mitigating jitter, maintaining signal integrity, and ensuring compliance with demanding industry standards. Your experience with porting PHY designs across technology nodes demonstrates your adaptability and commitment to delivering high-quality, innovative solutions. You value documentation, knowledge sharing, and actively contribute to a culture of learning and technical excellence.

Most importantly, you are excited to join a team that values diversity, encourages bold ideas, and is committed to shaping the future of high-speed connectivity. You see challenges as opportunities and bring a growth mindset to every project you undertake.

What You’ll Be Doing:

• Designing and developing advanced analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY architectures under the guidance of senior technical leaders.
• Ensuring that all designs strictly adhere to PCIe protocol standards, optimizing for performance, power, and area efficiency.
• Porting high-speed PHY designs to various technology nodes while maintaining signal integrity and maximizing performance.
• Collaborating with cross-functional teams—including digital, verification, and layout groups—to successfully integrate analog circuits into complex SerDes PHY systems.
• Implementing innovative verification strategies for high-speed analog/mixed-signal circuits using state-of-the-art simulation and modeling tools.
• Working closely with layout teams to minimize parasitics, device stress, and process variation impacts on overall circuit performance.
• Analyzing simulation and silicon measurement data to validate designs and ensure compliance with PCIe standards.
• Mentoring junior engineers and promoting best practices in analog/mixed-signal design and verification.
• Documenting design features, specifications, and test methodologies for future reference and team knowledge sharing.
• Partnering with characterization teams to validate electrical performance of circuits in silicon and resolve technical challenges.

The Impact You Will Have:

• Drive the development of next-generation PCIe 6 and PCIe 7 PHY designs, advancing high-speed interface technologies that power tomorrow’s data-driven world.
• Ensure Synopsys’ analog/mixed-signal circuits exceed industry standards, reinforcing our reputation for technical excellence and innovation.
• Facilitate seamless integration of analog circuits into sophisticated SerDes PHY systems, enhancing overall performance and reliability.
• Mentor and develop junior engineers, fostering a collaborative and innovative team environment.
• Lead successful porting of PHY designs across multiple technology nodes, delivering versatile and scalable solutions for diverse customer needs.
• Strengthen verification and validation processes, resulting in robust, reliable, and high-performing analog/mixed-signal circuits.

What You’ll Need:

• PhD with 3+ years, or MTech/MS with 7+ years of experience in analog/mixed-signal circuit design focused on high-speed interfaces such as PCIe 6/7 or SerDes PHY designs.
• Proven expertise in transistor-level design of high-speed analog building blocks (e.g., LDOs, Bandgap references, ADC/DACs, PLLs, DLLs).
• Demonstrated silicon experience in developing PHY circuits compliant with PCIe standards.
• Strong background in high-speed SerDes AFE development, including CTLE and CDR design.
• Experience designing high-speed SerDes transmitters and deep knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis).
• Solid foundation in jitter budgeting analysis and expertise in minimizing jitter impact on signal integrity.
• Experience porting PHY designs across different technology nodes and deep knowledge of CMOS, finFET, and gate-all-around processes.
• Comprehensive understanding of the PCIe protocol, signal integrity, jitter performance, and high-speed clocking.
• Ability to collaborate with layout teams to minimize parasitics, process variations, and electromigration effects.
• Proven track record of effective teamwork and successful project outcomes across multidisciplinary teams.

Who You Are:

• Innovative thinker with a passion for high-speed analog design and technology advancement.
• Collaborative team player who values diversity and inclusion.
• Effective communicator, able to translate complex technical concepts to a variety of audiences.
• Mentor and coach, eager to support the development of junior engineers.
• Detail-oriented problem solver with a commitment to quality and continuous improvement.
• Adaptable and resourceful, thriving in fast-paced, changing environments.

The Team You’ll Be A Part Of:

You will join a world-class analog/mixed-signal design team at Synopsys, focused on developing high-speed interface IP for next-generation semiconductor products. The team is composed of passionate engineers from diverse backgrounds, collaborating closely to deliver innovative solutions that drive the future of connectivity. Our culture emphasizes technical excellence, knowledge sharing, and continuous learning, providing an environment where your skills and ideas are valued and your career can thrive.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.