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Standard Cell R&D Manager

10 years

0 Lacs

Posted:1 day ago| Platform: Linkedin logo

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On-site

Job Type

Full Time

Job Description

Alternate Job Titles:
  • Standard Cell Design Manager
  • Logic Library Group Manager
  • Standard Cell R&D Manager
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.You Are:You are a dynamic and experienced leader with a strong background in standard cell library design. You have a Bachelor's or Master's degree from a reputed university and at least 10 years of hands-on experience in designing and optimizing standard cell circuits. You possess a deep understanding of CMOS device characteristics, submicron process nodes, and are familiar with FINFET/GAA technologies. Your expertise extends to layout design and working closely with layout designers to optimize parasitics for target PPA. You excel in a collaborative environment, working effectively with geographically distributed R&D teams and engaging in cross-functional collaborations. Additionally, you have a proven track record of mentoring and coaching junior engineers, guiding them to improve their circuit design and simulation skills. Your strong analytical and logical skills enable you to address complex technical challenges and drive innovation in the field of standard cell design.What You’ll Be Doing:
  • Designing and validating custom standard cells, including flip flops, clock gating cells, level shifters, and power gating cells.
  • Optimizing standard cell circuits to achieve better performance, power, and area (PPA).
  • Engaging in hands-on development while mentoring and coaching junior R&D engineers.
  • Collaborating with layout designers to optimize layout parasitics and achieve target PPA.
  • Involving in layout extraction and understanding layout-dependent parameters in the extracted netlist.
  • Implementing, testing, and analyzing circuit design guidelines and methodologies.
The Impact You Will Have:
  • Driving innovations in standard cell design that contribute to the success of Synopsys' products.
  • Enhancing the performance, power, and area (PPA) of our silicon IP portfolio.
  • Mentoring and developing the next generation of R&D engineers.
  • Collaborating across functions to ensure methodology alignment and optimization.
  • Contributing to the continuous improvement of circuit design methodologies.
  • Supporting the integration of more capabilities into System-on-Chip (SoC) designs, meeting unique performance, power, and size requirements.
What You’ll Need:
  • Bachelor's or Master's degree in Electrical Engineering or a related field.
  • 10+ years of experience in standard cell library design.
  • Deep understanding of CMOS device characteristics and submicron process nodes.
  • Experience with FINFET/GAA technologies and high sigma variation analysis.
  • Familiarity with layout design and optimization of layout parasitics.
Who You Are:
  • Strong analytical and logical skills.
  • Effective communicator and collaborator.
  • Proactive problem solver with a hands-on approach.
  • Mentor and coach for junior engineers.
  • Innovative thinker with a passion for technology.
The Team You’ll Be A Part Of:
You will be part of the Logic Library Group, a team dedicated to the design and optimization of standard cell libraries. The team focuses on delivering high-performance, power-efficient, and area-optimized standard cells that are integral to Synopsys' silicon IP solutions. Collaboration and innovation are at the core of the team's values, ensuring the continuous advancement of our technology and methodologies.Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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