Design Engineer

3 - 10 years

0 Lacs

Posted:4 days ago| Platform: Linkedin logo

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Work Mode

On-site

Job Type

Part Time

Job Description

Key Responsibilities:

  • Design and develop standard cells for advanced CMOS technology nodes (e.g., 7nm, 5nm, 3nm).
  • Optimize cells for PPA metrics in coordination with layout and circuit teams.
  • Perform circuit-level simulations (e.g., SPICE) to ensure functionality and robustness.
  • Drive layout implementation with an understanding of design rules, parasitics, and manufacturability.
  • Run and debug various verification flows including DRC, LVS, ERC, and EM/IR checks.
  • Perform characterization and validation of standard cells using industry-standard tools (e.g., Liberate, SiliconSmart, etc.).
  • Interface with physical design, RTL, EDA, and process technology teams to ensure seamless integration.
  • Contribute to automation scripts to improve cell development workflows (Python, TCL, Perl, etc.).
  • Document design methodologies and maintain library QA and release processes.

Required Skills & Experience:

  • B.E./B.Tech or M.E./M.Tech in Electrical Engineering, Electronics, or a related discipline.
  • 3 to 10 years of hands-on experience in standard cell circuit design and validation.
  • Strong understanding of CMOS fundamentals and transistor-level design.
  • Experience with industry EDA tools from Synopsys, Cadence, or Siemens.
  • Knowledge of characterization methodologies and tools.
  • Familiarity with technology file setup and design rule constraints.
  • Proficiency in scripting (Python, TCL, Shell, etc.) for design automation.

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