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3.0 - 13.0 years

18 - 19 Lacs

Gurugram

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Join us as a Risk Quants Associate This is a great opportunity for someone with experience in a quantitative role to join our Risk function You ll be working closely with quantitative analysts across asset classes to identify and assess diffusion models and pricer approximations This role will provide you with a platform to keep building your knowledge and expertise, and offers you great exposure for you and your work Were offering this role at associate level What youll do As a Risk Quants Associate, you ll be supporting a team of quantitative analysts and technical specialists, providing quantitative and technical mentoring. This key role will also see you providing model, pricing and functional specifications of the models for the various asset classes, and for the subsequent validation by risk analytics. Day-to-day, you ll also be: Providing a phased delivery of the simulation models and pricer prototypes Producing model documentation to be delivered to the PRA for internal review Advising senior management on and actively managing a project s non-delivery risk Making sure that adequate documentation is produced for governance Assisting our IT department in implementing the models, and overseeing the implementation of the functional specifications back-testing against the prototypes The skills youll need We re looking for someone with significant experience in a quantitative role of specified asset classes, including credit valuation adjustments, expected positive exposure, building valuation models, optimising pricing routines and computing efficiency. You ll also demonstrate: Exceptional Problem-Solving Skills. Ability to approach complex challenges with analytical rigor and creativity. Strong Quantitative and Statistical Expertise. Solid foundation in probability theory, statistics, calculus and data analysis techniques. Proficient Programming Skills .Python or similar languages for data analysis and model development. Financial and Risk Acumen.Good understanding of financial instruments and core risk concepts. Attention to Detail. Careful and thorough approach to data, models, and documentation, ensuring accuracy and reliability in all aspects of analysis. Effective Communication. Ability to explain technical concepts effectively to both technical and non-technical audiences. Hours 45 Job Posting Closing Date: 31/07/2025

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4.0 - 5.0 years

3 - 6 Lacs

Gangtok

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About Medhavi Skills University Medhavi Skills University (MSU) is a government-notified private skills university established under a State Act in Sikkim, dedicated to promoting quality skill education and entrepreneurship integrated with higher education. As a pioneering institution in the convergence of the skilling ecosystem with higher education, MSU aligns with the National Education Policy, 2020 (NEP 2020). Recognized by the UGC and established in 2021, MSU collaborates with industries and Skill Development Institutes to offer work-integrated courses, embedding on-the-job internships and training within the curriculum. MSU is a recognized Awarding Body under the National Council for Vocational Education & Training (NCVET) and is empanelled with the Directorate General of Training (DGT). As an anchor university partner with the National Skill Development Corporation (NSDC) and the Project Management Unit (PMU) of NSDC International, MSU is committed to preparing youth for the future workspace by co- working with industry partners to design and implement demand-driven programs. For more information, visit https:// www.msu.edu.in Role Overview: The Lab Technologist Optometry is responsible for managing, maintaining, and supporting optometry lab operations in alignment with academic and clinical training needs. This role plays a crucial part in ensuring smooth functioning of lab sessions, equipment readiness, and safety compliance, while assisting students and faculty in hands-on training and practical demonstrations. Key Responsibilities: Maintain and calibrate optometric instruments and diagnostic equipment (e.g., slit lamps, retinoscopes, autorefractors). Set up lab sessions for refraction, binocular vision, contact lens, and ocular diagnostics. Assist faculty during practical demonstrations and student training sessions. Ensure cleanliness, functionality, and safety standards of lab facilities. Maintain inventory of lab materials, instruments, and consumables; raise purchase requirements when needed. Provide technical support during OSCEs, assessments, and internal practical examinations. Assist in preparing and organizing clinical records, simulation tools, and case studies for academic use. Train students in the proper handling and care of optometric instruments. Coordinate with service vendors for equipment servicing and AMC (Annual Maintenance Contract) follow-ups. Support research and project-based activities involving clinical tools or simulations. Ensure compliance with institutional policies on lab safety and data privacy. Qualifications & Skills Required: Bachelors degree in Optometry (B.Optom) from a recognized institution. Minimum 4 5 years of hands-on experience in clinical and academic optometry laboratories. Proficiency in handling and demonstrating optometric instruments and clinical procedures. Excellent organizational and troubleshooting skills related to lab equipment. Familiarity with student training methodologies and academic documentation. Strong communication and coordination skills for working with faculty and students. Basic knowledge of IT tools for lab records and equipment management systems. Certification in specialized optometric diagnostics or instrument maintenance (preferred but not mandatory). What We Offer Being a key player in something potentially massive and world-changing Competitive salary and incentive structure, best in the industry. Opportunities for . We celebrate diversity and are committed to creating an inclusive environment for all employees.

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5.0 - 6.0 years

6 - 11 Lacs

Chennai

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Responsibilities & Key Deliverables Lead the design and development of PMSM motors for automotive applications (e.g., EV traction motors, auxiliary motors). Analyze and optimize winding configurations (distributed, concentrated, hairpin, etc.) for performance, efficiency, and thermal characteristics. Create detailed 3D CAD models and 2D drawings for motor components such as stator, rotor, housing, shaft, and cooling system using tools like SolidWorks, CATIA, or Creo . Should have good understanding of electromagnetic, thermal, and mechanical simulation for Motor design. Support prototype builds and coordinate with manufacturing for design for manufacturability (DFM). Perform root cause analysis and engineering change management for motor-related issues during testing and validation. In-depth knowledge of PMSM motor design , winding schemes, and performance tuning. Familiarity with simulation tools (e.g., JMAG, ANSYS Maxwell, Motor-CAD) is a strong plus. Strong understanding of automotive standards and motor control principles . Excellent problem-solving, communication, and leadership skills. Hands-on experience in motor testing and performance validation. Exposure to high-voltage system design and integration in EV/HEV architectures. Experience Minimum 5 6 years of relevant experience in electric motor design , preferably in the automotive sector . Industry Preferred Qualifications Bachelor s or Master s degree in Electrical, Mechanical, or Electronics Engineering. General Requirements

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8.0 - 13.0 years

22 - 25 Lacs

Mumbai

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Roles and Responsibilities: Develop solutions for fuel cell systems focused around process control and optimal system performance Propose enhancements, optimizations, and failure analysis to existing control strategies Support simulation design and modeling of sub-systems with a data driven approach Develop control logic for fuel cell systems, including power management, gas flow control, temperature regulation, and safety interlocks. Develop and program PLCs and HMIs, including debugging, testing and troubleshooting of existing and new systems. Utilize simulation tools like MATLAB to design and test control algorithms before implementation. Collaborate with other engineering teams to integrate control systems with various components of the fuel cell system. Identify and implement improvements to control strategies for enhanced efficiency and reliability. Skills Required: 8+ years experience in system automation and energy system development preferred Good hands-on systems integration experience, troubleshooting, and start-up and commissioning of equipment into product development environment Excellent knowledge of MATLAB and simulation environment Experience with data analysis in Python or MATLAB Experience with C/Python software development and embedded coding Experience with version control software GitHub/GitLab preferred Experienced in setup and maintenance of TCP/IP, Serial communication, and industrial network protocols, such as Modbus, CAN, DeviceNet, Profibus or EtherNet/IP Experience in developing model predictive control Experience in porting algorithms to embedded systems and optimizing code Understanding of diagnostic techniques for system components Desire to work in a fast-paced, production-oriented environment. Education: Bachelor s or Master s degree in electrical engineering, computer engineering, embedded systems, control systems, Instrumentation or a related field

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5.0 - 10.0 years

7 - 12 Lacs

Bengaluru

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Job descriptions may display in multiple languages based on your language selection. What we offer: Group Summary: Job Responsibilities: Job Description: Hardware Requirement Engineer Job Introduction: As an experienced Inverter Hardware Requirement Engineer, you will be involved in the electronics design & development and requirements engineering of the traction inverter for electric vehicles. Major Responsibilities: Good knowledge of Inverter Hardware design and development Hands on Simulation/Tools e.g. LTSpice or similar. Know how on the latest technological development of hardware. Hands on experience in creating schematics in Altium or similar software. Good to have knowledge of PCB design reviews, component engineering for BOM management. Experience in understanding hardware requirement engineering process. Experience in creating test cases of Hardware components as well has LV/HV hardware Good to have experience in requirement engineering tools like DOORS/PTC. Very good knowledge in hardware functional safety ISO26262 Good knowledge of Product lifecycle process ASPIC V- Cycle Manages communication and alignment with all affected stakeholders. Education: Bachelors in Electronics/Electrical engineering or equivalent from reputed university/institution Work Experience: 5 to 10 years of experience in Hardware Requirement Engineering Experience in the automotive sector is desirable. Very good written and spoken English skills. Awareness, Unity, Empowerment: At Magna, we believe that a diverse workforce is critical to our success. That s why we are proud to be an equal opportunity employer. We hire on the basis of experience and qualifications, and in consideration of job requirements, regardless of, in particular, color, ancestry, religion, gender, origin, sexual orientation, age, citizenship, marital status, disability or gender identity. Magna takes the privacy of your personal information seriously. We discourage you from sending applications via email or traditional mail to comply with GDPR requirements and your local Data Privacy Law. Worker Type: Regular / Permanent Group: Magna Powertrain

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3.0 - 10.0 years

7 - 11 Lacs

Bengaluru

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Job descriptions may display in multiple languages based on your language selection. What we offer: Group Summary: Job Responsibilities: Job Title: Power Electronics Engineer Job Description: As an experienced Power Electronics Design Engineer, you will be involved in the power electronics design & development of the traction inverter for electric vehicles. Major Responsibilities: Power electronics hardware design & development. Understanding and selection of HW components like SiC/GaN power modules, gate drivers ICs, sensors, filters etc. Motor Control strategy (V/F, FOC etc.,) and PWM switching profile for Inverters. Power module performance analysis like junction temperature calculation, efficiency etc. for drive profile Hands on Simulation/Tools e.g., Matlab Simscape, PSIM, PLECS, LTSpice etc. Know how on the latest technological development of hardware. Experience in using HV test equipment like Oscilloscopes, Power meters, electronic loads etc. Hands on experience in working with High voltage lab setup. Hands on experience in creating schematics in Altium or similar software. Good to have knowledge of PCB design reviews. Support selection of the single system components and their integration into overall inverter Hardware Manages communication and alignment with all affected stakeholders. Education: Masters in Power Electronics or equivalent from reputed university/institution Work experience: 3 to 10 years of experience in power electronics circuit design or relevant job experience Skills and Competencies: Knowledge on automotive EMI/EMC testing standards Experience in the automotive sector is desirable. Very good written and spoken English skills. Awareness, Unity, Empowerment: At Magna, we believe that a diverse workforce is critical to our success. That s why we are proud to be an equal opportunity employer. We hire on the basis of experience and qualifications, and in consideration of job requirements, regardless of, in particular, color, ancestry, religion, gender, origin, sexual orientation, age, citizenship, marital status, disability or gender identity. Magna takes the privacy of your personal information seriously. We discourage you from sending applications via email or traditional mail to comply with GDPR requirements and your local Data Privacy Law. Worker Type: Regular / Permanent Group: Magna Powertrain

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5.0 - 10.0 years

9 - 13 Lacs

Bengaluru

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Job descriptions may display in multiple languages based on your language selection. What we offer: Group Summary: Job Responsibilities: Job title: Power electronics with system engineering Job Introduction: We are seeking a highly skilled Motor Control Engineer with expertise in the development, implementation, and optimization of sensorless control algorithms for AC motors. The ideal candidate will have a deep understanding of motor control theory, electrical drives, power electronics, and experience with various types of AC motors such as induction motors, permanent magnet synchronous motors (PMSMs), and brushless DC motors (BLDCs). Key Responsibilities: Design, develop, and implement sensorless control algorithms for AC motors (PMSM and Induction motors) in embedded systems. Optimize motor performance and efficiency through advanced control techniques (e.g., Field-Oriented Control (FOC), Direct Torque Control (DTC), etc.). Simulate, test, and validate control algorithms in MATLAB/Simulink, and hardware-in-the-loop (HIL) environments. Integrate sensorless control systems into real-time embedded systems for automotive applications. Collaborate with cross-functional teams (power electronics, hardware design, firmware, and testing) to achieve project objectives. Troubleshoot and resolve performance issues related to motor control systems. Develop technical documentation, including requirements specifications, algorithm designs, and validation reports. Stay updated on the latest industry trends, tools, and technologies related to motor control and power electronics. Should have good understanding of fundamentals of analog and digital electronics circuit design. Experience in using basic test equipment like Oscilloscopes, Power meters, electronic loads etc. Close cooperation with the electronics, design, HW test team Manages communication and alignment with all affected stakeholders Knowledge and Education: PhD or Master s degree in Power Electronics or Control Systems, or a related field. Work Experience: 5+ years of experience in motor control design with a focus on sensor less control algorithms for AC motors. Skills and Competencies: Proficiency in motor control theory, especially for AC motors (Induction motors and PMSM). Strong expertise in motor control techniques such as model-based estimators, sliding mode observers. Solid understanding of Field-Oriented Control (FOC) and Direct Torque Control (DTC) methods. Proficient in MATLAB/Simulink for modelling and simulation. Hands-on experience with power electronics, including inverters and converters for motor drives. Strong problem-solving skills and ability to work independently or in a team. Experience in the automotive sector desirable Conscientious, precise and independent way of working Very good written and spoken English skills Awareness, Unity, Empowerment: At Magna, we believe that a diverse workforce is critical to our success. That s why we are proud to be an equal opportunity employer. We hire on the basis of experience and qualifications, and in consideration of job requirements, regardless of, in particular, color, ancestry, religion, gender, origin, sexual orientation, age, citizenship, marital status, disability or gender identity. Magna takes the privacy of your personal information seriously. We discourage you from sending applications via email or traditional mail to comply with GDPR requirements and your local Data Privacy Law. Worker Type: Regular / Permanent Group: Magna Powertrain

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6.0 - 11.0 years

10 - 15 Lacs

Jamnagar

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Structural engineers design structures that must endure stresses and pressures inflicted through human use and environmental conditions. They configure structures, choose appropriate building material, inspect the construction work, and ensure the structural soundness of buildings and structures. Prepare reports, designs, and drawings. Make calculations about pressures, loads, and stresses. Consider the strength of construction materials and select appropriately. Provide technical advice on safe designs and construction. Obtain planning and/or building regulations approval. Analyze configurations of the basic components of a structure. Liaise with professional staff such as architects and engineers. Monitor and inspect all work undertaken by contractors to ensure structural soundness. Administer contracts and manage projects. Inspect properties to evaluate the conditions and foundations. Use computer-aided design technology for simulation purposes. Structural Engineer Requirements: Degree in civil or structural engineering (essential). 6 years of work experience as a structural engineer (essential). Professionally registered with the Institute of structural engineers. Expert experience in project management. Advanced knowledge of construction methods, materials, and legal regulations. Sound understanding of physics and mathematics. Ability to liaise with professionals from other disciplines. Three-dimensional conceptual skills. Analytical thinker with strong problem-solving skills. Meticulous attention to detail with superb organizational skills. Ability to work under pressure and meet tight deadlines. Ability to work independently and as part of a team. Excellent communication and IT skills.

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8.0 - 13.0 years

14 - 19 Lacs

Bengaluru

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Senior Staff Engineer/Principal Engineer/Manager - AIML/Hardware Accelerators Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. Senior Staff/Principal Engineer/Manager Machine Learning We are looking for a Senior Staff/Principal AI/ML Engineer/Manager with expertise in model inference , optimization , debugging , and hardware acceleration . This role will focus on building efficient AI inference systems, debugging deep learning models, optimizing AI workloads for low latency, and accelerating deployment across diverse hardware platforms. In addition to hands-on engineering, this role involves cutting-edge research in efficient deep learning, model compression, quantization, and AI hardware-aware optimization techniques . You will explore and implement state-of-the-art AI acceleration methods while collaborating with researchers, industry experts, and open-source communities to push the boundaries of AI performance. This is an exciting opportunity for someone passionate about both applied AI development and AI research , with a strong focus on real-world deployment, model interpretability, and high-performance inference . Education & Experience: 17+ years of experience in AI/ML development, with at least 5 years in model inference, optimization, debugging, and Python-based AI deployment. Masters or Ph.D. in Computer Science, Machine Learning, AI Leadership & Collaboration Lead a team of AI engineers in Python-based AI inference development . Collaborate with ML researchers, software engineers, and DevOps teams to deploy optimized AI solutions. Define and enforce best practices for debugging and optimizing AI models Key Responsibilities Model Optimization & Quantization Optimize deep learning models using quantization (INT8, INT4, mixed precision etc), pruning, and knowledge distillation . Implement Post-Training Quantization (PTQ) and Quantization-Aware Training (QAT) for deployment. Familiarity with TensorRT, ONNX Runtime, OpenVINO, TVM AI Hardware Acceleration & Deployment Optimize AI workloads for Qualcomm Hexagon DSP, GPUs (CUDA, Tensor Cores), TPUs, NPUs, FPGAs, Habana Gaudi, Apple Neural Engine . Leverage Python APIs for hardware-specific acceleration , including cuDNN, XLA, MLIR . Benchmark models on AI hardware architectures and debug performance issues AI Research & Innovation Conduct state-of-the-art research on AI inference efficiency, model compression, low-bit precision, sparse computing, and algorithmic acceleration . Explore new deep learning architectures (Sparse Transformers, Mixture of Experts, Flash Attention) for better inference performance . Contribute to open-source AI projects and publish findings in top-tier ML conferences (NeurIPS, ICML, CVPR). Collaborate with hardware vendors and AI research teams to optimize deep learning models for next-gen AI accelerators. Details of Expertise: Experience optimizing LLMs, LVMs, LMMs for inference Experience with deep learning frameworks : TensorFlow, PyTorch, JAX, ONNX. Advanced skills in model quantization, pruning, and compression . Proficiency in CUDA programming and Python GPU acceleration using cuPy, Numba, and TensorRT . Hands-on experience with ML inference runtimes (TensorRT, TVM, ONNX Runtime, OpenVINO) Experience working with RunTimes Delegates (TFLite, ONNX, Qualcomm) Strong expertise in Python programming , writing optimized and scalable AI code. Experience with debugging AI models , including examining computation graphs using Netron Viewer, TensorBoard, and ONNX Runtime Debugger . Strong debugging skills using profiling tools (PyTorch Profiler, TensorFlow Profiler, cProfile, Nsight Systems, perf, Py-Spy) . Expertise in cloud-based AI inference (AWS Inferentia, Azure ML, GCP AI Platform, Habana Gaudi). Knowledge of hardware-aware optimizations (oneDNN, XLA, cuDNN, ROCm, MLIR, SparseML). Contributions to open-source community Publications in International forums conferences journals

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8.0 - 13.0 years

15 - 19 Lacs

Bengaluru

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Project description Our Customer is a Leading bank in Australia that provides a front to back integrated platform for straight-through processing and risk management. This is a multi-year initiative where different projects run in concurrence under the program's variety milestones. These streams include new product initiatives, new entity roll-outs, and regulatory compliance. We will have key roles in projects such as managing the scope, design, and delivering requirements from front to back office with Excelian. We are looking for talented and ambitious people. The roles are in the respective Functional, Test Management, Development, Test Support, Environment Management and Release teams. These units will collectively undertake scoping, design, building, testing, and implementation phases to deliver the variety program milestones. Looking for an experienced technical business analyst for the core Treasury IT team to deliver projects for the bank's treasury division for the business with a focus on Commodities, FX, and MM products. Responsibilities The Senior Technical Business Analyst role looks after the business engagement, functional requirements, solution design, and some system configuration for delivery of the migration projects. The role will require engagement with relevant business stakeholders for the initiatives in the approved scope and then work closely with the delivery team as well as relevant Technology partners, to ensure timeliness and quality of the delivery. The role is hence expected to have excellent Business Analysis abilities, as well as the ability to project manage small to medium initiatives. This will involve leading the implementation of regional rollouts in parallel with other sub-streams. The role would include solution design and technical configuration of the Murex 3.1 platform in cooperation with other technical teams. Hands-on work on the application would be required. Skills Must have 8+ years of relevant Murex (and/or other Primary Trading System) Front Office experience. Good/Expert knowledge of at least IRD, FI, CRD, Commodities, and/or FXMM implementation on Murex. Extensive experience in dealing with front-office trading & sales stakeholders in Markets or Treasury divisions. Good hands-on knowledge of FO configurationinstruments, generators, curves, market data, market conventions, etc. Good understanding of FO modulesPretrade workflow, Simulation screens, Simulation Viewer, eTradepad, P&L notepad, market operations, etc. Experience in the implementation of Murex 3.1 with regard to front office capabilities. Nice to have Experience on MReport / Datamart, postTrade workflows, and interfaces is nice to have.

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3.0 years

0 Lacs

Gurugram, Haryana, India

On-site

Designation: AI/ML Engineer Location: Gurugram Experience: 3+ years Industry: AI Product Role and Responsibilities: Model Development: Design, train, test, and deploy machine learning models using frameworks like Pytorch and TensorFlow, specifically for virtual try-on applications with a focus on draping and fabric simulation. Task-Specific Modeling: Build models for tasks such as Natural Language Processing (NLP), Speech-to-Text (STT), and Text-to-Speech (TTS) that integrate seamlessly with computer vision applications in the virtual try-on domain. Image Processing: Implement advanced image processing techniques including enhancement, compression, restoration, filtering, and manipulation to improve the accuracy and realism of draping in virtual try-on systems. Feature Extraction & Segmentation: Apply feature extraction methods, image segmentation techniques, and draping algorithms to create accurate and realistic representations of garments on virtual models. Machine Learning Pipelines: Develop and maintain ML pipelines for data ingestion, processing, and transformation to support large-scale deployments of virtual try-on solutions. Deep Learning & Draping: Build and train convolutional neural networks (CNNs) for image recognition, fabric draping, and texture mapping tasks crucial to the virtual try-on experience. AI Fundamentals: Leverage a deep understanding of AI fundamentals, including machine learning, computer vision, draping algorithms, and generative AI (Gen AI) techniques to drive innovation in virtual try-on technology. Programming: Proficiently code in Python and work with other programming languages like Java, C++, or R as required. Cloud Integration: Utilize cloud-based AI platforms such as AWS, Azure, or Google Cloud to deploy and scale virtual try-on solutions, with a focus on real-time processing and rendering. Data Analysis: Perform data analysis and engineering to optimize the performance and accuracy of AI models, particularly in the context of fabric draping and garment fitting. Continuous Learning: Stay informed about the latest trends and developments in machine learning, deep learning, computer vision, draping technologies, and generative AI (Gen AI), applying them to virtual try-on projects. Skills Required: Experience: Minimum of 5 years in Computer Vision Engineering or a similar role, with a focus on virtual try-on, draping, or related applications. Programming: Strong programming skills in Python, with extensive experience in Pytorch and TensorFlow. Draping & Fabric Simulation: Hands-on experience with draping algorithms, fabric simulation, and texture mapping techniques. Data Handling: Expertise in data pre-processing, feature engineering, and data analysis to support high-quality model development, especially for draping and virtual garment fitting. Deep Neural Networks & Gen AI: Extensive experience in working with Deep Neural Networks, Generative Adversarial Networks (GANs), Conditional GANs, Transformers, and other generative AI techniques relevant to virtual try-on and draping. Advanced Techniques: Proficiency with cutting-edge techniques like Stable Diffusion, Latent Diffusion, InPainting, Text-to-Image, Image-to-Image models, and their application in computer vision and virtual try-on technology. Algorithm Knowledge: Strong understanding of machine learning algorithms and techniques, including deep learning, supervised and unsupervised learning, reinforcement learning, natural language processing, and generative AI.

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2.0 years

0 Lacs

Hyderabad, Telangana, India

On-site

Overview Data Science Team works in developing Machine Learning (ML) and Artificial Intelligence (AI) projects. Specific scope of this role is to develop ML solution in support of ML/AI projects using big analytics toolsets in a CI/CD environment. Analytics toolsets may include DS tools/Spark/Databricks, and other technologies offered by Microsoft Azure or open-source toolsets. This role will also help automate the end-to-end cycle with Azure Pipelines. You will be part of a collaborative interdisciplinary team around data, where you will be responsible of our continuous delivery of statistical/ML models. You will work closely with process owners, product owners and final business users. This will provide you the correct visibility and understanding of criticality of your developments. Responsibilities Delivery of key Advanced Analytics/Data Science projects within time and budget, particularly around DevOps/MLOps and Machine Learning models in scope Active contributor to code & development in projects and services Partner with data engineers to ensure data access for discovery and proper data is prepared for model consumption. Partner with ML engineers working on industrialization. Communicate with business stakeholders in the process of service design, training and knowledge transfer. Support large-scale experimentation and build data-driven models. Refine requirements into modelling problems. Influence product teams through data-based recommendations. Research in state-of-the-art methodologies. Create documentation for learnings and knowledge transfer. Create reusable packages or libraries. Ensure on time and on budget delivery which satisfies project requirements, while adhering to enterprise architecture standards Leverage big data technologies to help process data and build scaled data pipelines (batch to real time) Implement end-to-end ML lifecycle with Azure Databricks and Azure Pipelines Automate ML models deployments Qualifications BE/B.Tech in Computer Science, Maths, technical fields. Overall 2-4 years of experience working as a Data Scientist. 2+ years’ experience building solutions in the commercial or in the supply chain space. 2+ years working in a team to deliver production level analytic solutions. Fluent in git (version control). Understanding of Jenkins, Docker are a plus. Fluent in SQL syntaxis. 2+ years’ experience in Statistical/ML techniques to solve supervised (regression, classification) and unsupervised problems. 2+ years’ experience in developing business problem related statistical/ML modeling with industry tools with primary focus on Python or Pyspark development. Data Science - Hands on experience and strong knowledge of building machine learning models - supervised and unsupervised models. Knowledge of Time series/Demand Forecast models is a plus Programming Skills - Hands-on experience in statistical programming languages like Python, Pyspark and database query languages like SQL Statistics - Good applied statistical skills, including knowledge of statistical tests, distributions, regression, maximum likelihood estimators Cloud (Azure) - Experience in Databricks and ADF is desirable Familiarity with Spark, Hive, Pig is an added advantage Business storytelling and communicating data insights in business consumable format. Fluent in one Visualization tool. Strong communications and organizational skills with the ability to deal with ambiguity while juggling multiple priorities Experience with Agile methodology for team work and analytics ‘product’ creation. Experience in Reinforcement Learning is a plus. Experience in Simulation and Optimization problems in any space is a plus. Experience with Bayesian methods is a plus. Experience with Causal inference is a plus. Experience with NLP is a plus. Experience with Responsible AI is a plus. Experience with distributed machine learning is a plus Experience in DevOps, hands-on experience with one or more cloud service providers AWS, GCP, Azure(preferred) Model deployment experience is a plus Experience with version control systems like GitHub and CI/CD tools Experience in Exploratory data Analysis Knowledge of ML Ops / DevOps and deploying ML models is preferred Experience using MLFlow, Kubeflow etc. will be preferred Experience executing and contributing to ML OPS automation infrastructure is good to have Exceptional analytical and problem-solving skills Stakeholder engagement-BU, Vendors. Experience building statistical models in the Retail or Supply chain space is a plus

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3.0 - 8.0 years

1 - 5 Lacs

Bengaluru

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Educational Qualification: Bachelors / M.Tech / MS / Ph.D in Aerospace Engineering, Physics, Controls or equivalent Work Experience : 3+ years of relevant work experience (as a GNC or an AOCS engineer) Role Description : This role will contribute towards the development of attitude and orbit control subsystems for a LEO imaging satellite constellation. If you love working at the cutting edge of technology and want to contribute towards making the world a better place by bringing down the benefits of space down to earth, this is the place for you. Responsibilities Duties : Design, model and develop Attitude Determination and Control system for LEO spacecrafts Collaborate with systems and mission teams to scope capabilities and requirements for the AOCS system Perform trade studies and select the necessary sensor and actuator suites to meet the subsystem requirements Design and implement algorithms to support various pointing modes and attitude control scenarios Implement control algorithms into modular, scalable and maintainable mathematical models Work with the flight software team to deploy the models against the simulation software Developing plans for end-to-end integration, test, and calibration. Develop and maintain technical documentation for spacecraft AOCS architecture definition, design, and development. Take end-to-end ownership of the subsystem development from design through implementation, testing, deployment and commissioning Desirable Skills Certifications: Strong understanding of satellite systems, orbital mechanics, classical dynamics and the low-earth orbit environment Strong understanding of spacecraft control and determination hardware and its implementation Experience with orbital manoeuvring theory, flexible body control, sensor/navigation filters, and flight software development. Proficiency and Practical experience developing in Matlab Simulink, and Python Strong programming skills in at least one high level programming language (Python preferred) Ability to understand, break down, and solve complex problems independently Good communications skills (verbal and written), ability to work collaboratively in a team environment Mission design and orbit simulation experience using software tools (STK, FreeFlyer, Orekit, GMAT etc.) or custom software is preferred Full lifecycle development experience of LEO spacecraft Hardware-in-the-loop and monte carlo simulation experience Knowledge of Development tools Version control (Git) Project Management (Jira) Candidate Acumen : A strong desire to work in an unstructured, high-growth, fast-paced start-up environment Benefits: Health insurance coverage Unlimited leaves flexible working hours Role-based remote work and work-from-home benefit Relocation assistance Professional Mental Wellness services Creche facility for primary caregivers (limited to India) Employee Stock Options for all hires

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3.0 - 8.0 years

6 - 10 Lacs

Noida, Hyderabad, Bengaluru

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SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure support. Familiarity with Verilog and RTL simulation Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas

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7.0 - 12.0 years

10 - 14 Lacs

Noida

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TECHNICAL LEAD – DFT SmartSoC is looking for a smart and enterprising leader with expert knowledge in DFT to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking. You will be responsible for leading and managing a team, client communication, and project execution. Job Responsibilities- Lead an internal DFT team, executing projects for an offshore client Manage the team and their technical and leadership growth Manage all interactions with the client Desired Skills and Experience- 7+ years of experience in DFT, mainly Scan Architecture, ATPG & MBIST Experience in planning scan chains, running scan insertion flow Experience in latest Cadence tool set Genus & Modus Experience in ATPG for Stuck@, TFT, IDDQ & Path delay faults with tough coverage targets Experience in MBIST architecture, generation and implementation Experience in AECQ100 requirement standard is a big plus Experience in working with a multi-site team is a big plus Experience in working on critical time-bound projects is a big plus Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas

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1.0 - 3.0 years

3 - 7 Lacs

Bengaluru

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1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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8.0 - 13.0 years

7 - 11 Lacs

Bengaluru

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We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Take ownership of Analog/Mixed designs at the chip and/or block level, ensuring successful verification. Good Understandingof GLS simulations Collaborate with design engineers to understand design tradeoffs and create high-level models for design analysis. Perform behavioral modeling for verification simulations to validate the functionality and performance of mixed-signal designs. Debug and resolve issues arising from verification simulations and work closely with the design team to address any design-related concerns. Stay updated with the latest advancements in mixed-signal verification methodologies and tools, and drive continuous improvement initiatives. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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6.0 - 11.0 years

4 - 8 Lacs

Bengaluru

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Candidates need to have good experience in Tessant tools Candidates need to have good experience in ATPG pattern generation and simulation(both timing and no timing) Candidates need to have good experience in Scan insertion Experience should be more than 6+ years Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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8.0 - 13.0 years

7 - 11 Lacs

Bengaluru

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We are seeking a highly skilled and experienced Lead Verification Engineer with expertise in USB/LPDDR and a strong knowledge of Cadence VIP. The ideal candidate will have a deep understanding of low-power design and verification techniques. Responsibilities: Develop and execute comprehensive verification strategies for USB/LPDDR subsystem designs, considering low-power design requirements. Collaborate with cross-functional teams to define verification goals and ensure alignment with project objectives. Design and implement reusable, scalable, and efficient verification testbenches using SystemVerilog/UVM or C based . Leverage Cadence VIP and other verification IPs to accelerate the verification process. Low-Power Design VerificationApply expertise in low-power design and verification techniques to ensure accurate and reliable verification of power management features, including power states, power domains, and power-aware verification methodologies. : Extensive experience (8+ years) in verification. Strong knowledge of Cadence VIP and verification methodologies (SystemVerilog/UVM). Proficiency in low-power design techniques and power-aware verification methodologies. Hands-on experience with industry-standard simulation and verification tools (e.g., Cadence Incisive, Synopsys VCS, Mentor Questa). Solid understanding of verification languages (SystemVerilog, VHDL) and scripting languages (Perl, Python, TCL). Familiarity with industry standards and protocols related to USB (USB 2.0, USB 3.x) and LPDDR (LPDDR4, LPDDR5). Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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7.0 - 12.0 years

4 - 8 Lacs

Hyderabad, Bengaluru

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Job Location: Bengaluru (BLR) and Hyderabad (HYD) Experience: 7 to 20 years : We are seeking a highly skilled and experienced RTL Design Engineer with a strong knowledge of ARM Micro Architecture to join our team. In this role, you will play a key role in the development of complex digital designs and contribute to the success of our cutting-edge projects. The ideal candidate will have a proven track record in RTL design and a deep understanding of ARM Micro Architecture. Key Responsibilities: Collaborate with cross-functional teams to define and develop RTL designs for advanced microprocessor-based projects. Design, implement, and verify digital logic blocks and modules in accordance with project specifications and quality standards. Utilize your expertise in ARM Micro Architecture to optimize and enhance design efficiency. Perform RTL simulations and conduct thorough functional and timing analysis. Identify and resolve design issues, ensuring the delivery of high-quality RTL designs. Stay up-to-date with industry trends and emerging technologies to continually improve design methodologies. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience as an RTL Design Engineer with 7 to 20 years of relevant work experience. Strong knowledge of ARM Micro Architecture and its application in RTL design. Proficiency in RTL design tools and methodologies. Experience with simulation and verification tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS). Excellent problem-solving skills and attention to detail. Effective communication and collaboration skills. Ability to work effectively in a dynamic and fast-paced environment. If you are a highly motivated and experienced RTL Design Engineer with a passion for innovation and a strong background in ARM Micro Architecture, we encourage you to apply for this exciting opportunity. Join our team and contribute to the development of cutting-edge technology solutions. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore IndiaHyderabad

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5.0 - 10.0 years

6 - 9 Lacs

Bengaluru

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Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification and possess a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). This role specifically requires expertise in GLS (Gate-Level Simulation). Key Responsibilities: IP and SOC Verification Conduct IP and SOC verification activities to ensure the functionality and correctness of integrated circuits. SystemVerilog (SV) and UVM Proficiency Demonstrate strong knowledge of SystemVerilog and Universal Verification Methodology for efficient and effective verification processes. Gate-Level Simulation (GLS) Proficiency in Gate-Level Simulation is a mandatory requirement for this position. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 5 to 12 years of relevant industry experience in IP and SOC verification. Strong expertise in SystemVerilog (SV) and Universal Verification Methodology (UVM). Proficiency in Gate-Level Simulation (GLS). If you are a talented Design Verification Engineer with a passion for ensuring the reliability and performance of integrated circuits, we encourage you to apply. Join our dynamic team and contribute to the advancement of cutting-edge technology. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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7.0 - 12.0 years

2 - 4 Lacs

Hyderabad

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Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Excellent communication skills, both verbal and written Experience: Minimum of 7 years of experience in the field Proficiency in DVT pattern experience Experience with ATE and functional vectors generation Understanding of Stimgen flow Prior experience with AMD is preferred Skills: Strong debugging skills Experience with MBIST, JTAG, and Phy-loopback NoteCandidates are encouraged to provide a detailed resume showcasing their relevant experience and skills. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore IndiaHyderabad

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18.0 - 23.0 years

3 - 7 Lacs

Bengaluru

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Redefine how verification is done!Were hiring Functional Verification Engineers for Bangalore to tackle IP/SoC verification, cache coherency, and more.Experience Required4"“18 YearsKey Skills: High-speed protocols, low-power simulations (UPF), System Verilog/UVMBe a part of the innovation journey! Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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4.0 - 9.0 years

4 - 7 Lacs

Hyderabad

Work from Office

Number of Open Positions4 Experience: 4+ years Location Hyderabad : We are looking for a highly skilled and experienced Gate-Level Simulation Engineer to join our team. The ideal candidate should have a minimum of 4 years of experience and possess a strong background in gate-level simulation (GLS). Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM) is essential for this role. Key Responsibilities: Collaborate with cross-functional teams to define and execute gate-level simulation test plans. Develop and implement gate-level simulation strategies for complex digital designs. Conduct gate-level simulations to verify the functionality and performance of digital designs. Work closely with design and verification teams to identify and resolve issues at the gate level. Utilize your expertise in SV and UVM to optimize and enhance the gate-level simulation process. Ensure compliance with industry standards and best practices in gate-level simulation. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 4+ years of experience in gate-level simulation. Strong proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM). Prior experience in gate-level simulation is essential. Familiarity with gate-level simulation tools and methodologies. Excellent problem-solving skills and attention to detail. Effective communication and collaboration skills. Ability to work in a dynamic and fast-paced environment. If you are a motivated and experienced Gate-Level Simulation Engineer with a strong background in SV, UVM, and a passion for ensuring the quality and reliability of digital designs at the gate level, we encourage you to apply for this position. Join our team and contribute to the success of our cutting-edge projects. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaHyderabad

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4.0 - 7.0 years

4 - 8 Lacs

Bengaluru

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Number of Open Positions: 7 Experience: 4 to 7+ years Location: Bangalore : We are seeking highly skilled and motivated DFT-DV Engineers to join our dynamic team in Bangalore. As a DFT-DV Engineer, you will play a pivotal role in ensuring the quality and reliability of our digital designs through Design for Test (DFT) and Design Verification (DV) methodologies. The ideal candidates should possess a minimum of 4 to 7+ years of experience in the field, with a strong background in DFT DV flow, JTAG, MBIST, SCAN, PG, PHY-LP, and BSCAN. Key Responsibilities: DFT Implementation: Collaborate with design and verification teams to define and implement DFT strategies and methodologies that enable efficient testing of complex digital designs. Scan and ATPG: Develop and maintain scan insertion, Automatic Test Pattern Generation (ATPG), and compression methodologies to achieve high test coverage. Memory BIST: Implement and verify Memory Built-In Self-Test (MBIST) solutions for embedded memories in the design. JTAG and Boundary Scan: Develop JTAG and Boundary Scan solutions to facilitate efficient testing and debugging of digital designs. Power Management: Work on Power Gating (PG) techniques to optimize power consumption during testing. PHY-LP Integration: Collaborate with PHY teams to ensure seamless integration of low-power features into the design. BSCAN Integration: Implement Boundary Scan (BSCAN) infrastructure to enhance testability and debug capabilities. Verification: Verify DFT features and ensure their correctness through simulation and formal verification. Documentation: Prepare detailed documentation, including DFT specifications, test plans, and reports. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field. 4 to 7+ years of experience in DFT-DV engineering. Strong expertise in DFT methodologies, including scan, ATPG, MBIST, JTAG, BSCAN, and PG. Proficiency in industry-standard EDA tools for DFT implementation. Experience with low-power design and PHY-LP integration is a plus. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. If you are a proactive and results-oriented engineer with a passion for ensuring the quality and reliability of digital designs, we encourage you to apply. Join us in our mission to develop cutting-edge technology and make a significant impact in the semiconductor industry. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

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