608 Vhdl Jobs - Page 4

Roles & Responsibilities: Proficient in Low/High Voltage Electronic Circuit design (Analog & Digital) with various circuit analyses. Must have worked on any one of electrical engineering CAD tools like PCAD, ORCAD, ZUKEN, Cadence or equivalent CAD packages for circuit design & simulation. Familiar with communication protocols such as I2C, SPI, UART, CAN and Ethernet. Familiar with Safety standards like - UL 508, IEC 60947, SEMI S22, NFPA79. Experience Requirement: 7-10 years of experience with capital equipment or similar (for e.g., Semiconductor, Process industries, Medical instrumentation, Automotive, Aerospace, etc.) industry in a sub-system / module design projects. Experience in selecting Electronic components & Sensors. Experience with Microcontrollers, Microprocessors and FPGA/CPLD based designs. Hands-on experience in writing firmware/software code using Assembly, Embedded C, C++ and VHDL/Verilog. Very good understanding of Analog/Digital/Power PCB design constraints and applicable standards. Experience in setting up equipment for experimentation and testing in laboratory environment. Knowledge in Engineering Change & Configuration Management Process. Good Communication, Problem Solving and Mentoring skills.

Role: FPGA Engineer Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in FPGA design and development, with a focus on RTL coding using Verilog or VHDL. Deep understanding of computer architecture, digital design principles, and hardware/software co-design concepts. Experience with high-frequency trading systems and ultra-low latency design techniques is highly desirable. Proficiency in FPGA development tools and workflows, such as Xilinx Vivado or Intel Quartus. Strong analytical and problem-solving skills, with the ability to optimize designs for performance, power, and resource utilization. Excellent communication and collaboration skills, with the ability to work effectively in a fast-paced, team-oriented environment.

About this Opportunity We are seeking a Tech Lead FPGA Designer to join the Ericsson Silicon organization. In this pivotal role, you will provide technical leadership to a group of dedicated engineers committed to developing world-class Radio and RAN Compute products. You will lead the FPGA team in designing, integrating, and optimizing complex systems for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking. What you will do Lead the design and implementation of advanced FPGA-based Radio and RAN Compute solutions. Lead efforts to optimize FPGA designs for maximum performance, power efficiency, and cost-effectiveness. Guide hardware and software engineers in the integration of FPGA solutions into larger systems, ensuring seamless collaboration and execution. Apply and refine industry-standard tools and methodologies for FPGA development and implementation. Conduct research and provide thought leadership on the latest advancements in FPGA technology, including AI and Machine Learning trends in academia and industry. Author key documents such as comprehensive requirements and design specifications Lead design reviews and champion innovative ideas to enhance FPGA solutions and drive technological advancement. Collaborate closely with FPGA suppliers to ensure alignment and integration Work closely with verification and lab engineers, as well as hardware design and verification teams, to ensure comprehensive testing and validation Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA development, including leadership roles. Extensive knowledge of: o FPGA technology, design environments, and advanced design methodologies. o FPGA design tools (e.g., Vivado, Quartus, or similar) and emerging technologies. o Hardware description languages (HDL), such as Verilog or VHDL. Proven expertise in various communication protocols such as Ethernet with IPSec/MACSEC, PCIE gen6, I2C/I3C, SPI, etc. Advanced proficiency with scripting languages such as Python, Tcl, shell scripting, etc. Strong familiarity with hardware architecture and digital signal processing, with a strategic vision Exceptional problem-solving and analytical skills, with a track record of driving innovation. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelor s degree in Electrical or Computer Engineering or equivalent.

Grow with us About this opportunity We are seeking a Senior FPGA Designer to join the Ericsson Silicon organization. In this pivotal role, you will provide technical leadership to a group of dedicated engineers committed to developing world-class Radio and RAN Compute products. You will lead the FPGA team in designing, integrating, and optimizing complex systems for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking. What you will do Lead the design and implementation of advanced FPGA-based Radio and RAN Compute solutions. Lead efforts to optimize FPGA designs for maximum performance, power efficiency, and cost-effectiveness. Guide hardware and software engineers in the integration of FPGA solutions into larger systems, ensuring seamless collaboration and execution. Apply and refine industry-standard tools and methodologies for FPGA development and implementation. Conduct research and provide thought leadership on the latest advancements in FPGA technology, including AI and Machine Learning trends in academia and industry. Author key documents such as comprehensive requirements and design specifications Lead design reviews and champion innovative ideas to enhance FPGA solutions and drive technological advancement. Collaborate closely with FPGA suppliers to ensure alignment and integration Work closely with verification and lab engineers, as well as hardware design and verification teams, to ensure comprehensive testing and validation Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA development, including leadership roles. Extensive knowledge of: o FPGA technology, design environments, and advanced design methodologies. o FPGA design tools (e.g., Vivado, Quartus, or similar) and emerging technologies. o Hardware description languages (HDL), such as Verilog or VHDL. Proven expertise in various communication protocols such as Ethernet with IPSec/MACSEC, PCIE gen6, I2C/I3C, SPI, etc. Advanced proficiency with scripting languages such as Python, Tcl, shell scripting, etc. Strong familiarity with hardware architecture and digital signal processing, with a strategic vision Exceptional problem-solving and analytical skills, with a track record of driving innovation. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelor s degree in Electrical or Computer Engineering or equivalent. Join our Team About this opportunity We are seeking a Senior FPGA Designer to join the Ericsson Silicon organization. In this pivotal role, you will provide technical leadership to a group of dedicated engineers committed to developing world-class Radio and RAN Compute products. You will lead the FPGA team in designing, integrating, and optimizing complex systems for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking. What you will do Lead the design and implementation of advanced FPGA-based Radio and RAN Compute solutions. Lead efforts to optimize FPGA designs for maximum performance, power efficiency, and cost-effectiveness. Guide hardware and software engineers in the integration of FPGA solutions into larger systems, ensuring seamless collaboration and execution. Apply and refine industry-standard tools and methodologies for FPGA development and implementation. Conduct research and provide thought leadership on the latest advancements in FPGA technology, including AI and Machine Learning trends in academia and industry. Author key documents such as comprehensive requirements and design specifications Lead design reviews and champion innovative ideas to enhance FPGA solutions and drive technological advancement. Collaborate closely with FPGA suppliers to ensure alignment and integration Work closely with verification and lab engineers, as well as hardware design and verification teams, to ensure comprehensive testing and validation Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA development, including leadership roles. Extensive knowledge of: o FPGA technology, design environments, and advanced design methodologies. o FPGA design tools (e.g., Vivado, Quartus, or similar) and emerging technologies. o Hardware description languages (HDL), such as Verilog or VHDL. Proven expertise in various communication protocols such as Ethernet with IPSec/MACSEC, PCIE gen6, I2C/I3C, SPI, etc. Advanced proficiency with scripting languages such as Python, Tcl, shell scripting, etc. Strong familiarity with hardware architecture and digital signal processing, with a strategic vision Exceptional problem-solving and analytical skills, with a track record of driving innovation. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelor s degree in Electrical or Computer Engineering or equivalent. Why join Ericsson? What happens once you apply? Primary country and city: India (IN) || Bangalore Req ID: 768496

Position: Lead RTL Design Engineer (ASIC/FPGA) Location: Bangalore Experience: 7+ years Senior / Lead Level Role Overview Were seeking a proactive Lead RTL Engineer to define micro-architectures, implement robust RTL, guide integration, and collaborate across ASIC and FPGA domains. You will architect complex subsystems and mentor a high-performing team. Key Responsibilities Micro-architecture & Specifications: Create block-level design docs & detailed RTL micro-architecture for highcomplexity IP/subsystems. RTL Coding & Review: Develop clean, synthesizable RTL in Verilog/SystemVerilog/VHDL. Ensure code quality via lint/CDCC/static timing checks. Integration & IP Subsystems: Integrate with SoC/FPGA subsystems—protocols like AMBA/AXI, interconnects, memory, serial interfaces. Synthesis & Timing Closure: Lead flows using Design Compiler, Primetime, STA tools to meet timing and area goals. Verification & Debug: Coordinate with verification leads, support testbench development, and debug RTL—functional, wavebased, simulation. Leadership & Mentorship: Mentor engineers, lead reviews, steer integration, and liaise across RTL, verification, physical design, and architecture teams. Toolchain & Scripting: Script for automation (Tcl, Python, Perl, Shell); manage version control (e.g. Perforce, Git) . Innovation & Best Practices: Drive RTL design best practices, stay current with EDA tools, lowpower (UPF), CDC, linting, and continuous improvement. Required Qualifications Bachelor’s/Master’s in EE/CE or similar. 7+ years in RTL for ASIC/FPGA, +3 years in a leadership role. Expert in Verilog/SystemVerilog/VHDL, microarchitecture, FSMs, datapaths, CDC. Experienced with SoC/IP integration—AXI, AHB, APB, PCIe, USB, Ethernet, DDR, etc. Proficient with synthesis, STA, CDC, lint tools, DFT flows. Solid scripting with Tcl/Python/Perl/Shell and version control systems. Strong communication, documentation, team leadership, and cross-team collaboration skills. Preferred Skills FPGA prototyping and hardware bring-up expertise. Low-power methodologies (UPF, power gating). ASIC methodology experience (synthesis, timing, DFT, PPA closure). Familiarity with UVM verification, formal methods. Integration experience with high-speed or accelerator IP (NoC, memory controllers, etc.). What You’ll Get High-impact leadership in advanced RTL design for ASIC/FPGA cutting-edge chips. Opportunity to mentor and build a top-tier RTL team. Collaborative culture working with architecture, verification, PD, and system teams. Learning, ownership, and visibility across end-to-end chip delivery.

Role Description Role Proficiency: Independently execute mid sized customer projects in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor owning any one task of RTL Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams On time quality delivery approved by the project manager and client Automate the design tasks flows and write scripts to generate reports Come up with novel ideas to reduce design cycle time and cost accepted by UST Manager and client Measures Of Outcomes Quality –verified using relevant metrics by UST Manager / Client Manager Timely delivery - verified using relevant metrics by UST Manager / Client Manager Reduction in cycle time cost using innovative approaches Number of papers published Number of patents filed Number of mandatory trainings attended adhering to training goals Outputs Expected Quality of the deliverables: Ensure zero bugs are present in the design / circuit design. Clean delivery of the design/module in-terms of ease in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation of tasks and work performed Timely Delivery Ensure project timelines as laid out by the client or program manager are met Meet intermediate tasks delivery for other team members to progress Calling out for help and support in the case of delay in tasks delivery New Skills Development Participate in training – skilling someone and also getting skilled in newer technologies Take up new areas of project development learn on the job and deliver Team Work Participation in team work and supporting team members at the time of need Able to take up additional tasks in-case of any team member(s) not available Able to hand hold junior team members to explain the project tasks and support to deliver Work dedication to go beyond the call of duty to ensure deadlines and quality are met Innovation & Creativity Approach towards repeated work by automating tasks to save design cycle time Participation on technical discussion training forum white paper etc Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills and ability to interact with team members and clients equally Strong analytical reasoning and problem-solving skills with attention to details Ability to understand the standard specs and functional documents Ability to deliver the tasks on-time in a quality fashion per quality guidelines and GANTT Well versed with the available EDA tools and able to use them efficiently Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present at a level needed to execute the project Knowledge Examples Knowledge of project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Understanding of the design flow and methodologies used in the designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills Additional Comments JD:- Asic RTL Design: Digital Design Knowledge RTL coding – System Verilog/Verilog/VHDL SoC integration experience is preferred CDC, Linting knowledge Synthesis, STA, DFT, Layout reviews experience Skills Rtl Coding,SOC integration,CDC Show more Show less

This role is for one of Weekday's clients Min Experience: 4 years Location: Bengaluru JobType: full-time Requirements About the role Digantara is a leading Space Surveillance and Intelligence company focused on ensuring orbital safety and sustainability. With expertise in space-based detection, tracking, identification, and monitoring, Digantara provides comprehensive domain awareness across all regimes, enabling end-users to gain actionable intelligence on a single platform. At the core of its infrastructure lies a sophisticated integration of hardware and software capabilities, aligned with the key principles of situational awareness: perception (data collection) , comprehension (data processing) , and prediction (analytics) . This holistic approach empowers Digantara to monitor all Resident Space Objects (RSOs) in orbit, thereby fostering comprehensive domain awareness. Digantara seeks a highly skilled Senior Embedded Software Engineer to design and develop embedded software solutions tailored specifically for real-time image processing. You will leverage your expertise to enable the development of state-of-the-art embedded software with applications such as tracking objects from both space and the ground. Why Us? Be part of a collaborative and innovative environment where your ideas and skills make a real difference to the entire space realm Push the boundaries with hands-on experience, greater responsibilities, and rapid career advancement Competitive incentives, galvanizing workspace, blazing team—pretty much everything you have heard about a startup Responsibilities Design, develop, and implement embedded software for real-time image processing for satellite payload applications Translate and optimize image processing algorithms to FPGA/SoC platforms to achieve low latency and high throughput Collaborate with system-level designers and hardware designers, generate software functional requirements and architecture, and ensure seamless integration of software and hardware Collaborate effectively with cross-functional teams to conceptualize, design, and implement optimal embedded software solutions for image processing Define and implement interface and communication protocols for data handling between the satellite payload and bus systems Develop clean, well-structured, maintainable code and execute comprehensive testing according to space industry standards (e.g., the ECSS software engineering standard) Implement rigorous software quality assurance practices, including static analysis, code coverage analysis, and other verification techniques Develop efficient embedded software for high-performance embedded systems with the ARM Cortex processor architecture Leverage AMD-Xilinx/Microchip EDA tools (e.g., Vivado/Vitis IDE, Libero SoC design suite) to develop efficient embedded software solutions Troubleshoot and resolve embedded software defects and hardware interface issues Required Qualifications B.Tech/B.E in Electronics Engineering or M.Tech/M.E or PhD degree in Embedded Systems/VLSI 4+ years of experience in Embedded software design and development, with a strong focus on image processing and experience in handling communication protocols Strong proficiency in bare-metal and RTOS programming for embedded systems, with expertise in real-time scheduling, interrupt handling, and device drivers Proven ability to optimize embedded software implementation, including code optimization, memory management, and power efficiency techniques Proficiency in Embedded C and C/C++ programming languages Strong understanding of data communication protocols such as I2C, UART, SPI, CAN, Gigabit Ethernet, LVDS, RS422, etc Working knowledge of software configuration management tools and defect tracking tools Preferred Skills Prior experience in embedded software implementation, particularly in areas such as satellite imaging payloads or ground-based imaging systems, is highly preferred Working knowledge of FPGA/SoC-based embedded systems designed for image processing applications is highly valued Experience in hardware-related programming of FPGA interfaces and high-level synthesis Knowledge of implementing fault-tolerant embedded systems for satellite applications Familiarity with digital image processing and implementation Experience in the Python programming language and knowledge of Verilog/VHDL Experience with various camera interfaces, including USB3, CoaXPress, CameraLink, PCIe, and Gigabit Ethernet General Requirements Ability to work in a mission-focused, operational environment Ability to think critically and make independent decisions Interpersonal skills to enable working in a diverse and dynamic team Maintain a regular and predictable work schedule Writing and delivering technical documents and briefings Verbal and written communication skills, as well as organizational skills Travel occasionally as necessary Show more Show less

Siemens EDA, a part of Siemens Digital Industries Software, is a global technology leader in electronic design automation. Our technologies enable companies around the world to develop new, highly innovative electronic products faster and more cost-effectively. Our customers use our solutions to push the boundaries of technology to deliver better products in the increasingly complex world of chip, board, and system design. Listener, Understander, Doer. Customers around the world trust in our products and our application engineers significantly contribute to that. You are the first on the scene to tackle any technical problem. You are a competent adviser, team player, and make things possible. Unsolvable is a foreign term, and you dont do unfair. Your focus on the customers needs makes you an invaluable partner. When you join our team, you will reach one hundred percent in your career. As an integral part of the technical team, you will contribute to Siemens EDA by increasing productivity and customer satisfaction Siemens EDAs Verification platform. This is an ambitious position that will assist in growing Siemens's business in India. Your new role: results-oriented and futuristic You will be working collaboratively with customers as well as customer support and engineering teams to optimally deploy Siemens EDAs Questa products and services. Youll fosters a climate conducive to help grow customer satisfaction with Siemens tools by helping them successfully deploy new flows and methodologies. Optionally mentor and lead a team of application engineers, supervise and guide them on the accounts and engagements that they are working on. Youll be working with customers with varying design styles and methodologies to craft the most effective technical solutions. Youll provide key expert advice and contribute to technical campaigns in other regions. Identify and qualify potential new business opportunities and work the account teams to build an engagement plan. Work with Account Managers and the world-wide teams for forming strategies and driving Siemens tools for customer projects to enable business success for Siemens EDA. Become a trusted advisor to your customers. Will have moderate travel within India and abroad We are not looking for superheroes, just super minds Youre a Graduate / Post Graduate (Bachelors/Masters) Electronics and Communication (E&C) / Electrical / Telecom Engineering / Computer Engineering with 4 - 10 years of meaningful experience in Digital design and Clock Domain Crossing or Lint EDA tools. Youve solid understanding on VHDL/Verilog, SystemVerilog and Assertions. Well versed with Multiple Clock and Reset Domains and Asynchronous clock or reset domain crossing verification ( Clock Domain Crossing - CDC & Reset Domain Crossing - RDC ) on designs Expertise in CDC tools like Questa/0in CDC, Spyglass or VC- CDC, or other CDC products is expected Expertise in Formal Verification products like Questa Formal, Jasper or any other Formal products is a plus Low power verification techniques using UPF and CPF is a plus Exposure to static timing analysis (STA) flows involving SDC is a plus

Looking for Siemens EDA Ambassadors- QuestaSim (Simulation) R&D team (strong AI/ML background) This is your role In this role, you will, craft and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Qualifications We are seeking a graduate with Bachelors or Masters degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. We value your experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven track record to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus!

Sr.Lead Silicon Design Engineer - FPGA Design Hyderabad, India Engineering 66386 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER T HE ROLE : As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented and verified Build Requirements Spec, Design spec, test plan and test spec documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to implement the new features and write the new feature tests and any required changes to the test environment Debug test failures to determine the root cause; work with other RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Minimum of 15 years of design and development experience, preferably in a customer facing role Minimum of 10 years of experience in FPGA VHDL and/or Verilog design, AMD technology and tools, FPGA verification and test Experienced in analysing customer requirements, effort estimation and committing a schedule for delivery Interaction with Architects, other RTL engineers and SW engineers to define system level requirements and usecases Leading a group of RTL engineers to deliver on customer commitments Experienced with Verilog, System Verilog, and C programming Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Developing UVM based verification frameworks and testbenches, processes and flows Experience in HW testing, including working with test equipment, logic and traffic analyzers, test generators, etc. Experience in designing complex systems involving one or more of the following technologies: PCIe, Ethernet, TCP/IP, Packet processing, USB, etc. Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Scripting language experience: Perl, Python, Makefile, and shell are preferred. ACADEMIC CREDENTIALS: Top class Bachelors or Master's degree in Electronic Engineering Track record of high academic achievement #LI-PS1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Lead Silicon Design Engineer - FPGA Design Hyderabad, India Engineering 66384 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented and verified Build Requirements Spec, Design spec, test plan and test spec documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to implement the new features and write the new feature tests and any required changes to the test environment Debug test failures to determine the root cause; work with other RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Minimum of 8 years of design and development experience, preferably in a customer facing role Minimum of 5 years of experience in FPGA VHDL and/or Verilog design, AMD technology and tools, FPGA verification and test Experienced with Verilog, System Verilog, and C programming Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Developing UVM based verification frameworks and testbenches, processes and flows Experience in HW testing, including working with test equipment, logic and traffic analyzers, test generators, etc. Experience in one or more of the following technologies: PCIe, Ethernet, TCP/IP, Packet processing, USB, etc. Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Scripting language experience: Perl, Python, Makefile, shell preferred. Exposure to leadership or mentorship is an asset ACADEMIC CREDENTIALS: Top class Bachelors or Masters degree in Electronic Engineering Track record of high academic acheivement #LI-PS1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Location: Bangalore Location: 1-15 Years Preferred Education B.Tech/M.Tech Area of Expertise RTL / Logic Development in VHDL/Verilog Full FPGA development flow from logic design, place route, timing analysis closure Experience with advanced Xilinx/Intel FPGA families and the Xilinx/Intel development tools including Vivado/Quartus Making testbenches for functional simulation of IP/FPGA design Troubleshooting and debugging FPGA implementations on boards Knowledge of any scripting language such as bash/Perl/python Highly motivated, self-starter with good interpersonal skills and a strong team player Excellent communication, critical thinking, and problem-solving skills Show more Show less

#Hiring FPGA Design Engineer Exp-5- 8Years Notice Period- 0 to 15Days Location- Bangalore Job Description: RTL and FPGA design, implementation, and timing closure using Xilinx & Synopsys development tools. Bring up and validate the design in the lab and generate test reports. Perform hardware validation tasks and debug IPs. Read, understand, and modify software drivers and scripts. Skills RTL Design & FPGA Implementation: Verilog, System Verilog, Vivado , ISE, Synplify, Design Compiler FPGA Platforms: Xilinx 7-series, Ultrascale/Ultrascale+, Zynq Toolchain Expertise: Xilinx Vivado, Synopsys DC/PT, ModelSim, VCS Hardware Validation: Bitstream generation, on-board debugging, performance tuning Lab Equipment: Oscilloscopes, logic/protocol analyzers, JTAG debuggers Software & Scripting: C, C++, Python, Perl, TCL, Bash Operating Systems: Linux (device driver understanding), embedded systems Interested candidates share your resume to sreeja.s@sasnee.com ,

About NCR Atleos TBA EEO Statement NCR Atleos is an equal-opportunity employer. It is NCR Atleos policy to hire, train, promote, and pay associates based on their job-related qualifications, ability, and performance, without regard to race, color, creed, religion, national origin, citizenship status, sex, sexual orientation, gender identity/expression, pregnancy, marital status, age, mental or physical disability, genetic information, medical condition, military or veteran status, or any other factor protected by law. Statement to Third Party Agencies To ALL recruitment agenciesNCR Atleos only accepts resumes from agencies on the NCR Atleos preferred supplier list. Please do not forward resumes to our applicant tracking system, NCR Atleos employees, or any NCR Atleos facility. NCR Atleos is not responsible for any fees or charges associated with unsolicited resumes.

Job title: Software Technical Trainer – VLSI, EV, IoT, Robotics & Embedded Systems. Job Location: Puducherry Job type: Full-time Job Description: We are seeking a dynamic and knowledgeable Technical Trainer to conduct practical, engaging training sessions for students and early-career professionals in the fields of VLSI, Electric Vehicles (EV), Internet of Things (IoT), Robotics, and Embedded Systems . The trainer will be responsible for developing training materials, delivering technical sessions, mentoring participants, and preparing them for industry requirements. Key Responsibilities: Design and deliver hands-on training modules in VLSI, EV, IoT, Robotics, and Embedded Systems. Conduct theory and lab sessions using relevant hardware and simulation tools. Evaluate and monitor trainees’ performance through assessments, assignments, and project work. Stay updated with the latest industry trends and technologies in the mentioned domains. Customize training content to match the audience's learning levels (college students, fresh graduates). Provide mentorship and career guidance to trainees. Collaborate with academic and placement teams for effective delivery and outcomes. Required Skills & Qualifications: Bachelor's/Master's degree in ECE, EEE, Mechatronics, Computer Science, or related fields. Strong foundational and practical knowledge in: VLSI : Verilog/VHDL, FPGA, ASIC design Embedded Systems : Microcontrollers (8051, ARM, etc.), RTOS, C/C++ IoT : Sensors, Raspberry Pi/Arduino, MQTT, Cloud integration EV Technologies : EV components, Battery Management Systems, Motor control Robotics : Actuators, Control Systems, Automation Proficient in simulation/design tools like Xilinx, MATLAB, Proteus, Keil, Arduino IDE , etc. Good programming skills in C/C++ , Python, or Embedded C. Excellent communication and presentation skills. Prior experience in technical training/mentoring is an advantage. Job Type: Full-time Pay: ₹300,000.00 - ₹500,000.00 per year Ability to commute/relocate: Puducherry, Puducherry: Reliably commute or planning to relocate before starting work (Required) Experience: Software Technical Trainer: 3 years (Required) Location: Puducherry, Puducherry (Preferred) Work Location: In person Application Deadline: 25/06/2025 Expected Start Date: 20/06/2025

Silicon Design Engineer (RTL Design and Development) Responsible for RTL design and development Experience in FPGA VHDL and/or Verilog design, Xilinx technology and tools Perl, Python or TCL Scripting Email id- ta6@nipppondata.com

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. * Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU * Develop the features, present the proposed architecture in the High level design discussions * Estimate the overall effort to develop the feature. * Estimate silicon area and wire usage for the feature. * Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature * Signoff the Pre-silicon Design that meets all the functional, area and timing goals * Participate in post silicon lab bring-up and validation of the hardware * Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) * Hands on experience of different Branch Prediction techniques * Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA * Experience with high frequency, instruction pipeline designs * At least 1 generation of Processor Core silicon bring up experience * In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) * Proficiency of RTL design with Verilog or VHDL * Knowledge of at least one object oriented or functional programming language and scripting language.

Job Title : FPGA Backend Engineer Experience : 3 to 6 Years Location : Bangalore Notice Period : Immediate to 15 Days Job Description : We are looking for a highly motivated FPGA Backend Engineer with 36 years of experience to join our engineering team in Bangalore . The ideal candidate will be responsible for implementing and optimizing FPGA designs from synthesis to bitstream generation, with a strong focus on timing closure and physical design. Key Responsibilities : Perform RTL synthesis and optimization using industry-standard tools (Vivado, Quartus, Synplify). Execute floorplanning, place & route (P&R) , and static timing analysis (STA) . Manage XDC/SDC constraint development for timing, clocks, I/O, and area. Conduct power and area analysis and apply optimization techniques. Run Design Rule Checks (DRC) and resolve physical implementation issues. Generate and validate bitstreams for FPGA deployment. Collaborate with RTL, verification, and system teams to ensure clean handoffs and design integrity. Maintain and automate flows using TCL, Python, or Shell scripts . Required Skills : Strong experience with FPGA backend flow (Synthesis, STA, P&R). Good understanding of FPGA architecture (preferably Xilinx or Intel). Proficiency in XDC/SDC constraints , timing reports, and debugging violations. Experience with TCL scripting and automation of implementation flows. Familiarity with Verilog/VHDL for understanding RTL structure. Hands-on experience with tools like Vivado, Quartus, Synplify, TimeQuest . Ability to work independently and drive tasks to closure. Nice to Have : Exposure to multi-clock domain designs and CDC analysis . Experience in timing closure for high-speed interfaces. Knowledge of low-power design techniques in FPGA. Experience with version control systems (e.g., Git). Why Join Us? Opportunity to work on cutting-edge FPGA projects. Fast-paced and technically challenging environment. Collaborative team and growth-focused culture. Job Details : Position Type : Full-Time / Permanent Work Location : Bangalore (Hybrid/On-site depending on project needs) Joining Requirement : Candidates with Immediate to 15 Days notice preferred

Roles and Responsibilities Develop RTL code using Verilog/VHDL Work with Mentor DfT tools and Cadence tools for design and verification Perform scan insertion, JTAG, ATPG DRC, and coverage analysis Debug simulations using timing and SDF Contribute to LBIST and Mixed Signal Radar IC-related projects (preferred) Investigate simulation failures and perform root cause analysis Collaborate with cross-functional teams; work independently and proactively Communicate effectively with both written and verbal communication

Bangalore,Karnataka,India Job ID 768496 Grow with us About this opportunity We are seeking a Senior FPGA Designer to join the Ericsson Silicon organization. In this pivotal role, you will provide technical leadership to a group of dedicated engineers committed to developing world-class Radio and RAN Compute products. You will lead the FPGA team in designing, integrating, and optimizing complex systems for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, you'll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking. What you will do Lead the design and implementation of advanced FPGA-based Radio and RAN Compute solutions. Lead efforts to optimize FPGA designs for maximum performance, power efficiency, and cost-effectiveness. Guide hardware and software engineers in the integration of FPGA solutions into larger systems, ensuring seamless collaboration and execution. Apply and refine industry-standard tools and methodologies for FPGA development and implementation. Conduct research and provide thought leadership on the latest advancements in FPGA technology, including AI and Machine Learning trends in academia and industry. Author key documents such as comprehensive requirements and design specifications Lead design reviews and champion innovative ideas to enhance FPGA solutions and drive technological advancement. Collaborate closely with FPGA suppliers to ensure alignment and integration Work closely with verification and lab engineers, as well as hardware design and verification teams, to ensure comprehensive testing and validation Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA development, including leadership roles. Extensive knowledge of: o FPGA technology, design environments, and advanced design methodologies. o FPGA design tools (e.g., Vivado, Quartus, or similar) and emerging technologies. o Hardware description languages (HDL), such as Verilog or VHDL. Proven expertise in various communication protocols such as Ethernet with IPSec/MACSEC, PCIE gen6, I2C/I3C, SPI, etc. Advanced proficiency with scripting languages such as Python, Tcl, shell scripting, etc. Strong familiarity with hardware architecture and digital signal processing, with a strategic vision Exceptional problem-solving and analytical skills, with a track record of driving innovation. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelor’s degree in Electrical or Computer Engineering or equivalent. Join our Team About this opportunity We are seeking a Senior FPGA Designer to join the Ericsson Silicon organization. In this pivotal role, you will provide technical leadership to a group of dedicated engineers committed to developing world-class Radio and RAN Compute products. You will lead the FPGA team in designing, integrating, and optimizing complex systems for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, you'll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking. What you will do Lead the design and implementation of advanced FPGA-based Radio and RAN Compute solutions. Lead efforts to optimize FPGA designs for maximum performance, power efficiency, and cost-effectiveness. Guide hardware and software engineers in the integration of FPGA solutions into larger systems, ensuring seamless collaboration and execution. Apply and refine industry-standard tools and methodologies for FPGA development and implementation. Conduct research and provide thought leadership on the latest advancements in FPGA technology, including AI and Machine Learning trends in academia and industry. Author key documents such as comprehensive requirements and design specifications Lead design reviews and champion innovative ideas to enhance FPGA solutions and drive technological advancement. Collaborate closely with FPGA suppliers to ensure alignment and integration Work closely with verification and lab engineers, as well as hardware design and verification teams, to ensure comprehensive testing and validation Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA development, including leadership roles. Extensive knowledge of: o FPGA technology, design environments, and advanced design methodologies. o FPGA design tools (e.g., Vivado, Quartus, or similar) and emerging technologies. o Hardware description languages (HDL), such as Verilog or VHDL. Proven expertise in various communication protocols such as Ethernet with IPSec/MACSEC, PCIE gen6, I2C/I3C, SPI, etc. Advanced proficiency with scripting languages such as Python, Tcl, shell scripting, etc. Strong familiarity with hardware architecture and digital signal processing, with a strategic vision Exceptional problem-solving and analytical skills, with a track record of driving innovation. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelor’s degree in Electrical or Computer Engineering or equivalent. Why join Ericsson? At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next. What happens once you apply?

- Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise - 8 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

4+ years of experience in RTL design and verification. Proven experience with digital logic design using Verilog, VHDL, or System Verilog. Experience with simulation tools such as VCS, QuestaSim, or similar. Hands-on experience with RTL design tools (e.g., Synopsys Design Compiler, Cadence Genus). Develop RTL code based on system-level specifications using Verilog, VHDL, or SystemVerilog. Implement complex digital functions and algorithms in RTL. Create and execute detailed test plans to verify RTL designs. Proficiency in writing and debugging RTL code. Experience with synthesis, static timing analysis, and linting tools.

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges. Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role! Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and improve these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will cooperate with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We don’t need superheroes, just super minds We seek a graduate with an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute Phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. We value sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. Knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. You are a phenomenal teammate, resilient and candid, Enjoy learning new things and build knowledge base in new area. We’ve got quite a lot to offer. How about you This role is based in Noida but you’ll get the chance to work with teams impacting entire cities, countries – and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the world’s most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-EDA #LI-Hybrid

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! This is your role This role involves developing and implementing emulation test plans to validate sophisticated semiconductor products. The engineer will leverage hardware description languages such as Verilog and VHDL to design, implement, and debug emulation models. Teamwork is a key aspect of this role, as it requires close coordination with design, verification, and software teams to troubleshoot and resolve technical issues optimally. The position plays a meaningful role in ensuring the functionality, performance, and reliability of products before they reach the market. Key Responsibilities Develop and implement emulation test plans for product validation. Use HDL languages (Verilog, VHDL) to design, implement, and debug emulation models. Collaborate with design, verification, and software teams to identify and resolve issues. Requirement We are looking for candidates with Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field. We are seeking Candidates with 2+ Years of Experience. We need someone who has experience with HDL languages (Verilog, VHDL) and digital design. Strong background in emulation and validation of complex digital systems. Excellent problem-solving skills and attention to detail! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #LI-EDA #LI-Hybrid

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Aprisa offers complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. The detail-route-centric architecture and hierarchical database enable fast design closure and optimal quality of results at a competitive runtime. This role is based in Bangalore. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. This is your role Lead a Team of Engineers working on solving the latest design challenged in Logic Synthesis Collaborate with RnD and drive the roadmap for next generation RTL2GDSII solution. Work with design community in solving critical designs problems to achieve desired performance, area and power targets. Deployment of Synthesis solution with various customers working on cutting edge technologies (7nm and forward). Develop & deploy training and technical support to customers using Siemens EDA tools. We don’t need superheroes, just superminds! Typically requires minimum of 9+ years of experience in Logic Synthesis flows Proficiency in Verilog, System Verilog & VHDL. Strong knowledge of RTL2GDSII flow with strong fundamentals in digital design & implementation. Prior experience in IC digital design flows and front-end EDAT tools including Synthesis, DFT, Formal Verification, Logic Equivalence Checks Hands-on experience using commercial synthesis tools like Synopsys-DC/FC, Cadence-Genus is a must. Experience with advance technology nodes 7nm and below. Hands-on experience in debug & deliver solutions to critical design issues related to synthesis. TCL, Perl or Python scripting is a plus. Self-motivated team player with a zeal to drive high team performance. Good problem solving and debugging skills. Strong verbal & written communication skills We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #LI-EDA #LI-Hybrid