649 Vhdl Jobs - Page 3

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Design For Testability - DFT. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Design For Testability - DFT. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Analog Layout. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt

Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Board Design. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Board Design. Experience1-3 Years.

Role Purpose The purpose of the role is to support process delivery by ensuring daily performance of the Production Specialists, resolve technical escalations and develop technical capability within the Production Specialists. Do Oversee and support process by reviewing daily transactions on performance parameters Review performance dashboard and the scores for the team Support the team in improving performance parameters by providing technical support and process guidance Record, track, and document all queries received, problem-solving steps taken and total successful and unsuccessful resolutions Ensure standard processes and procedures are followed to resolve all client queries Resolve client queries as per the SLAs defined in the contract Develop understanding of process/ product for the team members to facilitate better client interaction and troubleshooting Document and analyze call logs to spot most occurring trends to prevent future problems Identify red flags and escalate serious client issues to Team leader in cases of untimely resolution Ensure all product information and disclosures are given to clients before and after the call/email requests Avoids legal challenges by monitoring compliance with service agreements Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations as per SLA and quality requirements If unable to resolve the issues, timely escalate the issues to TA & SES Provide product support and resolution to clients by performing a question diagnosis while guiding users through step-by-step solutions Troubleshoot all client queries in a user-friendly, courteous and professional manner Offer alternative solutions to clients (where appropriate) with the objective of retaining customers and clients business Organize ideas and effectively communicate oral messages appropriate to listeners and situations Follow up and make scheduled call backs to customers to record feedback and ensure compliance to contract SLAs Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client Mentor and guide Production Specialists on improving technical knowledge Collate trainings to be conducted as triage to bridge the skill gaps identified through interviews with the Production Specialist Develop and conduct trainings (Triages) within products for production specialist as per target Inform client about the triages being conducted Undertake product trainings to stay current with product features, changes and updates Enroll in product specific and any other trainings per client requirements/recommendations Identify and document most common problems and recommend appropriate resolutions to the team Update job knowledge by participating in self learning opportunities and maintaining personal networks Deliver NoPerformance ParameterMeasure1ProcessNo. of cases resolved per day, compliance to process and quality standards, meeting process level SLAs, Pulse score, Customer feedback, NSAT/ ESAT2Team ManagementProductivity, efficiency, absenteeism3Capability developmentTriages completed, Technical Test performance Mandatory Skills: FPGA Design. Experience5-8 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Semiconductor Platform Engineering. Experience3-5 Years.

The ASIC Back-End Head is responsible for leading the physical design and implementation of Application-Specific Integrated Circuits (ASICs), ensuring optimal performance, power efficiency, and manufacturability. Key Responsibilities Strategic LeadershipDefine and execute the ASIC back-end design roadmap. RTL to GDSII Flow ManagementOversee synthesis, floorplanning, placement, routing, timing closure, and sign-off. Physical Design OptimizationEnsure Power, Performance, and Area (PPA) targets are met. EDA Tool ExpertiseWork with Synopsys, Cadence, Mentor Graphics tools for ASIC implementation. Cross-functional CollaborationCoordinate with design, verification, DFT, and packaging teams. Tape-Out & Manufacturing SupportEnsure smooth transition from design to fabrication. Key Skills & Qualifications Extensive experience (15yrs+) in ASIC physical design and implementation. Expertise in timing analysis, power optimization, and physical verification. Strong leadership, communication, and problem-solving skills. Bachelor's/Master's degree in Electronics, Electrical, or related Engineering discipline. Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

The ASIC Front-End Head is responsible for leading the front-end design team, ensuring high-quality Application-Specific Integrated Circuit (ASIC) designs, and driving innovation in digital chip development. This role requires expertise in RTL design, verification, synthesis, and architecture development, along with strong leadership and strategic planning skills. Key Responsibilities Technical LeadershipDefine and implement best practices for front-end ASIC design, ensuring efficiency and performance. Architecture & DesignOversee the development of digital circuits, including RTL coding, synthesis, and timing analysis. Verification & ValidationEnsure robust design verification methodologies using tools like UVM, SystemVerilog, and simulation frameworks. Cross-Team CollaborationWork closely with back-end design, physical design, and fabrication teams to optimize chip performance. Innovation & R&DStay updated with emerging semiconductor technologies and drive research initiatives. Mentorship & Team DevelopmentGuide and mentor engineers, fostering a culture of learning and technical excellence. Technical Project ManagementOversee front-end development timelines, ensuring timely delivery of high-quality designs. Required Qualifications EducationBachelor's or Master's degree in Electrical/Electronics Engineering, VLSI Design, or a related field. Experience15+ years in ASIC front-end design, with a proven track record of successful projects. Technical Skills: Expertise in HDLs (Verilog, VHDL), synthesis tools, timing analysis, and low-power design techniques. Leadership & CommunicationAbility to lead teams, manage projects, and communicate effectively with stakeholders. Problem-SolvingAnalytical mindset with a passion for optimizing digital designs for performance and efficiency. Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client 1. ASIC RTL Engineer : RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One scripting languages like Make flow, Perl ,shell, python - Any One LocationBangalore / Hyderabad / Kochi Experience - 7+ - Lead/Architect 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Deliver No. Performance Parameter Measure 1. Verification Timeliness, Quality and coverage of verification, Compliance to UVM standards, Customer responsiveness 2. Project documentation and MIS 100% on time MIS & report generation Complete Project documentation (including scripts and test cases) 3. Team % trained on new skills, Team attrition %, Employee satisfaction score (ESAT) Mandatory Skills: ASIC Design. Experience5-8 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Analog Layout. Experience1-3 Years.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and better? Join us – whichever path you take, we’re looking forward to seeing your point of view! As an integral part of the R&D team, you will contribute to Siemens’ success by crafting state of the art power analysis and optimization solutions. This is your role Analyzer team is working on the development of front end (Analyzer and Elaborator) of different Mentor Compilers. This module takes care of various HDL languages like Verilog, System Verilog and VHDL. As a member of the team, one will be working primarily on C++ and flex/bison and will be responsible for the design, development modify, and implementation of various pieces of the overall software with focus on surpassing customer expectations, on achieving high quality and timely delivery. Responsible for ensuring the overall functional quality of the released product on all required platforms and mechanism. Ability to understand complex products, solutions, and problems. Builds, documents, and executes software designs which may involve complicated workflows or multiple product areas. We are not looking for superheroes, just super minds We are seeking a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/Computer Science (CS) from top reputed Engineering colleges with significant experience in software development with 1-4 Years of experience. We value sound understanding of C/C++ languages, design patterns along with data structure and algorithms will be key to development of software. Experience in parallel algorithms, job distribution. Experience in development of Front End EDA software is a plus! Proficiency in HDL languages – Verilog/VHDL/System Verilog - low power aware synthesis and power formats - UPF/CPF – will supplemental. We are looking for knowledge of flex/bison and understanding of gate level digital logic design. Good analytical, abstraction and interpersonal skills will help in crafting bigger and balanced solutions for complex systems. Ability to work individually and as a team player will help in crafting good solutions and should be able to guide other towards project completion. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Define and develop verification environments Write verification plans, and documentation Generate test bench and automatic regression plans Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs Complete block-level verification and chip level verification Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges Able to work mostly independently and handle complex SoC Verification platform. Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities Requirements/Qualifications: Minimum of 8 years related proven silicon design or verification work experience Hands on project experience with leading edge verification methodologies like OVM/UVM One of the Protocol knowledges AXI/AHB/DDR/PCIe is must Hands on project experience in coverage/assertion driven verification Knowledge of IC chip design, development flow, process, and methodology Knowledge of CMOS logic design, circuit design, and circuit analysis Proficient in HDL languages System Verilog, Verilog and VHDL Good knowledge of UNIX shell scripting, Perl and TCL scripting. Good knowledge and understanding of CMOS device operation and characteristics Proven experience in writing verification plans and test bench development, simulation, and debugging Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification Must be able to learn new technology Good analytical and problem-solving skills Excellent written and verbal communication in English. Experience dealing with and communicating at different levels of the organization Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

In your new role you will: Be in continuous and intensive contact with our development sites worldwide; Advise and support the experts from our business units in verification projects; Drive the internal exchange of know-how and experience at Infineon; Work out optimization opportunities in the area of verification methodology and verification coverage through integrating the results achieved into Infineons design system and supporting their implementation in the development of new products; Collaborate with other disciplines (e.g. Application Engineering) to define the verification methodology and the verification plan; Design and develop the verification environment for ICs using the Universal Verification Methodology (UVM); Independently identify sub-modules that are particularly suitable for formal Verification and apply this methodology; Implement test scenarios using System Verilog and verify functionality using a Constrained Random Approach; Use the Unified Power Format (UPF) to verify the low-power aspects of our designs; Your Profile You are best equipped for this task if you have: You are best equipped for for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener

DIGITAL & FPGA design engineer shall provide technical support in the domains of design and development, realizing & testing of signal conditioning, digital interfaces, control electronics, handling and implementation of signal processing and communication system design as well as implementing designs on FPGAs through automatic HDL code generation and verification techniques. Design Development digital designs/ FPGA programming to implement algorithms for image capture, data processing /analysis and data transmission in an embedded real-time control environment utilizing the latest FPGA technologies. Good understanding of digital, analog or radio frequency circuits, components, and subsystems Designs, knowledge of Performing preliminary and detailed analyses/simulations on Analog & Digital or mixed signal Interfaces. Responsibilities include specification generations, architecture/micro-architecture definition hands-on implementation work for every aspect of ASIC/FPGA design, working closely with the system engineers and ASIC/FPGA design implementations and verification. Delivery of expert level technical support in the resolution of FPGA application issues at all levels of realization of designs, The proactive aspects of the position will require participation in development projects, possibly as part of an international, cross organizational team and may include the generation of collateral and reference designs. Ownership of all aspects of the design verification of the FPGA chips and/or its functional blocks,design tools and its verification equipment. Should Support the design, development and testing, including upgrades, parts reliability requirements, failure analysis/corrective action investigations, special laboratory tests, performance evaluations, and design audits of in-house. Intend to work closely with FW and SW Engineers to test and verify electrical interfaces and protocols between the FPGA and embedded system devices Working knowledge in System Verilog/UVM environment platforms and be responsible for generating FPGA verification plan, verification matrix and coming up with verification environments for test and verification of flight FPGA code/modules. Relevant Bachelors or Masters Degree in Electronics Design, Embedded Electronics, Electronics & communication Engineering, Electrical Engineering.

The selected candidate will be responsible for implementing high speed high volume data processing requirements on high density FPGA based hardware. These subsystems are the hearts of satellites and store data gathered on the eternal sojourns of satellites in orbits and send the data down interactively with ground commands. Azista is engaged in the making of state-of-the-art spaceborne payloads for high performance applications in indigenous private sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding onboard image data processing, encryption and packetization (CCSDS) needs and the nuances of indexing, annotating, and storing data and evolving efficient architectures for implementing such functions in FPGA code. Be responsible for coding the above functionalities, porting the successful code and complete the in-situ validation process for the subsystems for flight readiness Be a team contributor, code for parts of a larger functionality and seamless integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcome in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) and with MATLAB, and porting from it Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience of actually porting developed code into the hardware platforms and test the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high reliability engineering Specific successful design experience with at least two of the following: Encryption, AES standards; desirable exposure to custom encryption with significantly longer keys Data compression techniques, especially image data CCSDS standards for data handling The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully in high volume data handling including Encryption/Compression/CCSDS etc Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain / frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures of FPGA designs even before a full design is evolved Note: Interviews are likely to be multi-level very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA based firmware design and coding (6 to 10 years at least) with exposure to high density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs FPGA Firmware Designer (FFW-004) Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

The selected candidate will be responsible for implementing high-speed high-volume data generation and handling requirements on FPGA-based hardware, including storage in and playback from SSDs/SSRs and high-speed serial (SERDES, going to several Gbps) / Parallel (LVDS exceeding a hundred MHz). The subsystems are for use in state-of-the-art spaceborne payloads for high-performance applications in indigenous private-sector satellites in India. The work typically may involve, but not necessarily be limited to, the following activities: Understanding hardware component/environment capabilities, requirements and limitations and evolving firmware architectures and coding for required performance goals. Be a team contributor, code for parts of a larger functionality and seamlessly integrate and test the integrated firmware Partake in the full development cycle and not just design or verification, and be responsible for subsystem level outcomes in an integrated system Prepare documents necessary at different stages and be able to interact with QA/QC guidelines and facilitate assurance of code compliance to a given standard As a general rule, Azista requires that all engineers take an enthusiastic part in whatever activity they are required to contribute to in order to make the missions and the company successful. The knowledge base required in the candidate will in general be a clear understanding of the fundamentals of Coding for FPGA environment, a significant experience profile of doing this. Excellent familiarity and skill in VHDL (or Verilog) Knowledge of the architectures of modern high-density FPGAs and SoC Devices from Xilinx (Now AMD) or Actel (Now Microchip) FPGAs and familiarity with the use of these Excellent familiarity with the development environments for these devices and the simulation and pre-burn performance validation tools Very good experience in actually porting developed code into the hardware platforms and testing the same for target performance characteristics, and the skill in spotting problems and be able to relate observations in tests back to necessary refinements in code Exposure to safe coding practices and high-reliability engineering Specific successful design experience with at least one of the following: Implementation of high-speed SERDES data links going to several Gbps and testing for the same Implementation of SSD interfaces and familiarity with modern SSD interface standards Implementation of gigabit ethernet solutions in FPGA environments and testing for the same The successful candidate is likely to have An electronics degree, masters preferred but not necessary A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Good experience in debugging systems, including the ability to probe hardware and make sense of the time domain/frequency domain observations A good knowledge of how to estimate rough-order-of-magnitude power consumption figures even before a full design is evolved Note: Interviews are likely to be multi-level and very detailed. Please who do not check most of the points above may not be suitable at all. A consistent career in FPGA-based firmware design and coding (6 to 10 years at least) with exposure to high-density Xilinx (Now AMD) or Actel (Now Microchip) FPGAs with many designs turned out successfully Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

FPGA design engineer will take part in the design domains of signal processing and data processing, image processing, other high-speed and control applications, implementing these functions on high-density state of the art FPGAs. Work may include specifying, architecture/microarchitecture definition and hands-on implementation work for every aspect of FPGA design, working closely with the system, software, and FPGA design and verification, guide and mentor juniors in the areas and Delivery of expert level technical support in the resolution of FPGA application issues at programming level. In addition to the FPGA implementation, the engineers are expected to understand subsystem/algorithm level behaviour of such designs and be able infer the necessary hardware design/resources necessary for a given subsystem level specification. Work may involve HDL level coding/verification/testing and/or System C coding levels and taking ownership of all aspects of the design verification of the FPGA chips and/or its functional blocks. Examples of possible micro streams of work: CCD/CMOS Image array readout at high speeds Formatting such data and serial or parallel transmission of the same to other subsystems Implementation of complex image or signal processing algorithms Implementation of i/o rich control functions to interface a large number of subsystems to central controllers. Working closely with microcontroller programmers, instantiation of controllers with sequential code inside FPGAs etc mapping algorithms and standards (PCIe, NVMe, SATA,USB, Ethernet, TCP/IP, TCP/IP off load engine (TOE), SERDES, LVDS, and Memory Controllers DDR2/DDR3 ) to hardware and architecture/system design trade-offs standard bus protocols, including I2C, SPI, USB, PCIe. Candidates should preferably have good quantitative aptitude and understand analy Content coding like Verilog/VHDL, or System C or equivalent, exposure to complex/high density FPGAs and FPGA-SoCs Familiarity with Matlab and Simulink Vitis Unified Software Platform - Xilinx or similar Bachelors in Electronics or equivalent stream and a minimum of 10 years experience or Masters Degree in a related specialization with a minimum of 8 years experience in Electronics Design/Embedded Electronics, out of which the most recent 6 years must have been in state of the art high density FPGA environments. FPGA Design Engineer Azista BST Aerospace Plot No. 16, Sanand Land Industrial Estate Corporation, Sarkhej-Sanand Road, Ularia, Sanand, Ahmedabad, Gujarat, India - 382 210. Registered Office Sy.No 80-84, Melange Towers, 4th Floor, C Wing, Patrika Nagar, Madhapur, Hyderabad, Telangana, India - 500 081.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advantage. Knowledge of tensilica Worked with sub-system verification with tensilica Experience in C based system modelling. Debug with C based reference model. Have exposure to the other verification tasks gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Verification & Validation team is currently looking for self-motivated engineers who will perform ARM or DSP based SOC Pre-Si and Post Si validation including system level validation and debug. The ideal candidate should leverage his knowledge and experience to provide leadership, technical guidance, and execution of silicon validation of ARM or DSP based multiple SOC projects and platforms Experience in SoC pre/post silicon validation. ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 2-6yrs experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advantage. Knowledge of tensilica Worked with sub-system verification with tensilica Experience in C based system modelling. Debug with C based reference model. Have exposure to the other verification tasks gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. : Would be working on Qualcomm SoC System level Power and Performance in bare-metal validation environment. Develop comprehensive testplan for power and performance validation of the SoC both from a usecase requirement as well as design delta motivated. Determine Key Performance Indicator for the performance study by working closely with the respective IP teams in Design, DV and validation. Validation of System Low Power Modes, SoC shared rail power collapse validation Responsible for driving deep dive analysis on performance issues, bottlenecks and validating fixes or workarounds on subsystem and related SOC Modules. The ideal candidate would have a strong SoC architecture background along with good embedded system concepts on modern ARM/X86 based chipsets. Interface with subsystem validation, debug tools and SW teams during debugs. Develop low-level custom code on ARM and Hexagon Q6 processors using C/C++ and validate functionality and performance KPIs using debug trace dump Job : Bachelor's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 5+ years of full time experience ORMasters's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 3+ years of full time experience Familiar with CPU and SoC Architecture and micro-architecture, preferably ARM or ARM processor-based systems, clocking schemes, hierarchical memory systems, cache configurations and coherency issues in multi-core systems. Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design Experience with workload performance characterization, bandwidth and latency analysis, and driving microarchitecture investigations on CPU/GPU/Multimedia Systems with relevant performance metrics. Logical thinking and problem-solving ability with focus on performance centric validation Familiar with pre-silicon validation environments with Emulation and Virtual Bring-Up, etc. Basic statistics and data analysis skills to identify performance trends from large data sets and the technical bent to investigate anomalies (Good to have) Strong programming experience in at least one languageC,C++, Python (Must have) Good communication, English speaking/writing and team work attitude