210 Power Management Jobs - Page 9

To carry out commissioning / installation / repair / maintenance and upgrading of large rotating electrical machines and their associated control equipment. As a Global Electrical Field Services Engineer, you will be responsible for: Commissioning HV Generators, Motors, Synchronous condensers, Power management systems (PMS), Electrical protection systems, Excitation Controllers (AVRs), and Synchronising equipment. Conducting upgrades to AVRS, PMS systems, Synchronisers, Protection relays and other control elements. Carrying out electrical testing on high and low voltage equipment and machine windings in the field. Delivering training on Brush Power Gen products to clients and field service colleagues. Interpreting technical drawings, specifications and technical requirements. Attend technical meetings on site and at customers premises. Preparing method statements and risk assessments in relation to client sites where needed. Assisting mechanical service engineer(s) on assignments, which will not necessarily involve electrical related activities. Fuel your passion To be successful in this role you will: Have an accredited Electrical or Electronic qualification or relevant experience Have knowledge of networking systems. Such as, Modbus, Ethernet, 61850, Fibre would be advantageous Have knowledge of concepts, practices and procedures of Health, Safety & Environment Have a high-level knowledge of electrical power generation and distribution systems Be Self-reliant, resourceful and a problem solver with well-developed commercial awareness Be an effective communicator, fluent in both spoken and written English. Able to undertake extensive overseas and offshore working - working away approximately 29 weeks per annum Have experience in dealing with external stakeholders on site and operating remotely on own initiative Be a good team player with the ability to work independently

About Company Founded in 2011, ReNew, is one of the largest renewable energy companies globally, with a leadership position in India. Listed on Nasdaq under the ticker RNW, ReNew develops, builds, owns, and operates utility-scale wind energy projects, utility-scale solar energy projects, utility-scale firm power projects, and distributed solar energy projects. In addition to being a major independent power producer in India, ReNew is evolving to become an end-to-end decarbonization partner providing solutions in a just and inclusive manner in the areas of clean energy, green hydrogen, value-added energy offerings through digitalisation, storage, and carbon markets that increasingly are integral to addressing climate change. With a total capacity of more than 13.4 GW (including projects in pipeline), ReNew’s solar and wind energy projects are spread across 150+ sites, with a presence spanning 18 states in India, contributing to 1.9 % of India’s power capacity. Consequently, this has helped to avoid 0.5% of India’s total carbon emissions and 1.1% India’s total power sector emissions. In the over 10 years of its operation, ReNew has generated almost 1.3 lakh jobs, directly and indirectly. ReNew has achieved market leadership in the Indian renewable energy industry against the backdrop of the Government of India’s policies to promote growth of this sector. ReNew’s current group of stockholders contains several marquee investors including CPP Investments, Abu Dhabi Investment Authority, Goldman Sachs, GEF SACEF and JERA. Its mission is to play a pivotal role in meeting India’s growing energy needs in an efficient, sustainable, and socially responsible manner. ReNew stands committed to providing clean, safe, affordable, and sustainable energy for all and has been at the forefront of leading climate action in India. Job Description Position Title – Manager- Power Evacuation (Substation) Experience- 8-10 years Qualification- Degree- Electrical Engineering Location- Gurugram Role & Responsibilities- 1. Pooling Substation Equipment Sizing calculations and finalization of ratings. 2. Delivery of Pooling Sub-station primary engineering Drawings and Documents. 3. Co-ordination with execution team and prioritize technical bid closure. 4. Review of design and Drawings to meet ReNew standards and specifications, good engineering practice with excellent constructability. 5. Supporting for Substation Electrical Design & Drawings tools – Dialux 6. Supporting and involvement in pre - bid engineering of PSS Equipment activity. 7. New initiative for PSS Cost reduction. 8. Involvement in Equipment standardization and procurement activity. 9. Maintain project documentation. 10. Analyzing Deviation from Technical Specification, Standard in design and equipment selection. 11. Construction design approval. 12. Vendor Equipment document and design approval. 13. Technical closure with Equipment manufacturer/ Supplier 14. Manage new initiatives corrective actions, o Prototype installation support identified the risk, and risk mitigation. o Productivity measure to review and improve the design o Product/Design failure RCA review and CA capability. o Improve design process flow timeline. Profile & Eligible Criteria • Having 5-10 years of experience in Electrical design & engineering. • Knowledge in primary design of Sub-Station, Plant & Equipment layout, Electrical equipment specifications. • knowledge of CAD and AutoCAD software Main Interfaces • Wind infra- Pooling Sub-Station primary and secondary engineering team. • Technical support to SCM and Execution team. Vendor finalization. • Technical assistant to Project development team for Pre engineering. • Construction design finalization to Site Execution team

Job Category: Design Verification Job Type: Full Time Job Location: Bangalore Requirements: Bachelor s / Master s degree in Electrical Engineering or Computer Science with 6+ years of relevant experience Verilog / System Verilog based verification experience at Subsystem and Full chip level. Experience with digital system based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols. Experience with System Verilog Assertions with industry standard tools a plus Experience with SOC bot flow, clocking and platform bring up in Emlators or Silicon Desired Experience with Low Power Verification and power management flows. Experience with RTL, GLS level simulations Knowledge and experience working on PCIE/Ethernet and other HSIO desired Experience in UVM/OVM based methodology Development. Responsibilities: Be part of a team to verify complex system on a chip designs. Interact with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using UVM/Sytem Verilog Create complex C/SV tests using reusable test libs Team player and mentor who is self-driven, motivated and guides a team of junior engineers Responsible for quality and timeliness of the team output

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: Job function: Target Power team works on achieving industry leading Power management solution on Qualcomm Mobile chips. In this position, the candidate will be working with cross-functional teams to analyze and identify power optimizations and provide SW solution to fix the issues. Skills/experience: Embedded systems background with a good understanding of microprocessor architecture and common SoC hardware blocks (Interconnects, Display, Graphics, etc.), operating systems concepts - scheduling, memory management and device drivers, Hands on experience in C/C++, assembly language programming, GIT, Perforce(p4), debug tools like JTAG debugger, oscilloscopes, logic analyzers, understanding of mobile power management and SW development. Responsibilities: Identified candidate will need to perform system level analysis of target power use cases, expected to collaborate with Architecture, HW design, Performance, power and various software teams to work towards system level power optimizations. In addition, the candidate will need to develop tools and methodologies for competitive analysis to learn about competitors strengths and weaknesses, and come up with optimal solutions that are best in the industry. Education requirements M.Tech/B.Tech or equivalent degree in Electronics and Communication. 2-6 year experience preferred. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Applications Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Job Function Qualcomm is looking for candidates to support its customers in designing solutions using Qualcomm Hardware and Software. The Individual will contribute to the dynamic HW Applications engineering team for end product designs. The Individual will also be responsible for supporting Qualcomm's growing portfolio of platforms/applications and the job involves working closely with internal partners in Product definition as appropriate. About The Role The PMIC "“ H/W application Engineer will be responsible for supporting Qualcomm"™s growing portfolio mobile phone platforms. The job involves working closely with partners and customers of Qualcomm to define the specifications of the mobile phone handset products, part selection, system design, design reviews, support while doing system debug, partner deliverables etc. As a member of Qualcomm customer engineering team, the individual will be responsible for successful integration of Qualcomm solution into customer end products in mobile, PC, and consumer electronics markets. Individual will be responsible to work closely with cross function teams in Qualcomm, including design engineering, systems engineering, characterization team, ATE test team, SW team, product marketing, program management and peers in customer engineering organization across multiple regions. Individual will be responsible to create chipset documentation, reference schematics, training material, application notes for worldwide customer support. Individual will be responsible to engage with customer designs, assist customers in feature definition and design reviews, provide in-depth technical responses to customer queries, do troubleshooting of customer designs and provide necessary training to customers. Past expertise in interacting with multiple teams in HW, SW domains, skills in Digital/Baseband and sound technical knowledge of Qualcomm PMICs are desirable. . Preferred Qualifications Sound understanding of LDO/SMPS - Must to have Experience on power management for portable devices will be a plus Strong understanding PCB Signal/power integrity "“ Should be comfortable reviewing schematic/suggest changes for improvement - Experience with Schematic entry will be a plus . Should be fluent with CAD tools like Allegro/PADs to review customer layout . Knowledge on crystals/Clocks - Must to have Knowledge on display backlighting schemes - Must to have Knowledge on LabVIEW/python "“ Will be a plus Experience on Analog and mixed signal bench validation "“ Will be a plus Knowledge on battery charging and Fuel gauge will be a plus Good communication skills Keywords Power Management, Applications, Analog, PMIC, SMPS, DC/DC Converter, Buck, Boost, LDO, charger, fuel gauge/gas gauge, LED driver, ADC, oscillator, amplifier, Educational Requirements Bachelor's or Masters in Electronics and/or Electrical Engineering with 3 -5 years of relevant industrial experience

Experienced embedded Linux engineer with strong expertise in software architecture design, xPON ONT system development, and L2/L3 forwarding software. Skilled in ARM/MIPS architecture, device driver development, and debugging in embedded systems. Proficient in C, scripting languages, and Linux kernel programming, with hands-on experience in board bring-up and peripheral integration. Focused on delivering high-quality, customer-oriented features and maintaining effective cross-team collaboration. You Have: Graduate or Postgraduate in Engineering stream with 7-10 years of experience in embedded Linux development and device driver programming (Linux kernel, U-Boot). Hands-on experience with ARM/MIPS architecture, including board bring-up and peripheral driver development (UART, I2C, SPI, etc.). Proficiency in debugging tools such as ARM Real View ICE, Lauterbach Trace32, and Greenhill Multi Debugger. Cross-team interaction skills, collaborating with architects, PLMs, and test engineers to deliver features and resolve issues effectively. Experience working with configuration management tools such as Git, SVN, and ClearCase. It would be nice if you also add: Knowledge in xPON ONT system development, specifically in the context of Ethernet PHY, USB, SPI-NOR flash, and CAN protocol. Familiarity with OpenWRT and Yocto Build systems, enabling efficient system packages and integration. Knowledge in low-level driver development for peripherals like SLIC audio chips, NAND flash, and power management for USB devices. Leverage your embedded Linux and software architecture expertise to develop high-quality features for xPON ONT systems, ensuring that customer requirements and quality targets are met. Using your experience, you will analyze customer use cases, network topology, and service requirements, ensuring that solutions align with expectations. Engage with cross-functional teams, including product architects, PLMs, and test engineers, to ensure smooth project execution and feature delivery. You will be responsible for designing and documenting feature architectures and specifications, contributing to the development of robust solutions. Develop and integrate the xPON ONT E2E environment, helping refine processes and systems for better product functionality. Use your skills in troubleshooting embedded development environments to solve complex issues and improve system performance. Deepen your knowledge in new protocols and technologies, including ARM/MIPS architecture, embedded Linux development, and advanced debugging tools. Gain more experience in quality process management, working closely with teams to deliver stable, reliable features while understanding and applying industry best practices.

An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design. You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structure, and interconnect failure modes in advanced finfet technology nodes. You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology. You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation. You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution. What you'll Be Doing: Leading Serdes analog design and development. Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction. Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes. Collaborating with silicon test and debug experts for Sim2Sil correlation. Building and nurturing a team of analog design talent. Working with experienced teams locally and globally. The Impact You Will Have: Driving innovation in mixed-signal analog design. Enhancing the performance and efficiency of high-speed physical interfaces. Contributing to the development of cutting-edge technology in High Speed PHY IP. Improving quality and reliability through collaboration and Sim2Sil correlation. Growing the business impact by building and leading a talented team. Advancing Synopsys leadership in chip design and IP integration. What you'll Need: BE 18+ years of relevant experience or MTech 15+ years of relevant experience in mixed signal analog, clock, and datapath circuit design. Strong knowledge of RF architecture and blocks such as transceivers, VCOs, LNA, and up/down converters. Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits. Proficiency in high-speed digital circuit design and timing/phase noise analysis. Ability to create behavioral models of PLL to drive architectural decisions. Who You Are: Strong fundamentals of CMOS, device physics, and sub-micron design methodologies. Experience with PLL designs and high-speed digital circuit design. Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques. Experience in LC VCO/DCO design and performance parameters of VCO. Familiarity with digitally assisted analog circuit techniques. The Team you'll Be A Part Of: You will be joining an expanding analog/mixed-signal serdes team involved in the design and development of cutting-edge High Speed PHYSICAL Interface Development. You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

We are seeking a seasoned SoC Architect with expertise or significant interest in System Architecture. You have had significant success driving architecture, product roadmaps and product requirements. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives. THE PERSON: You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features, optimizing for performance and power Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements Knowledge sharing and other contributions to Platform & System Architecture As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs Support Post-Si teams for Product Performance, Power and functional issues debug/resolution PREFERRED EXPERIENCE: Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels Excellent communication, management, and presentation skills. Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies ACADEMIC CREDENTIALS: bachelors or masters degree in related discipline preferred

Senior Technologist : Energy Job Purpose: To lead energy optimization and efficiency initiatives across the petrochemical complex, including Captive Power Plant (CPP), process units, and Effluent Treatment Plant (ETP). The role ensures effective utilization of energy resources, drives sustainability goals, supports regulatory compliance, and enhances plant energy performance. Job Accountabilities Energy Management & Optimization Lead the energy performance improvement roadmap across all utilities and process units. Drive energy optimization in power generation (CPP), steam systems, HVAC, cooling towers, and compressed air systems. Monitor specific energy consumption KPIs and benchmark against industry standards. Captive Power Plant (CPP) Oversight Analyze the performance of turbines, generators, boilers, and auxiliaries to enhance power generation efficiency. Identify and implement heat rate improvement and fuel optimization projects. Collaborate with CPP operation teams to maintain grid stability and energy security. Effluent Treatment Plant (ETP) Efficiency Monitor energy and chemical consumption of ETP operations. Identify opportunities for energy conservation in aeration, pumping, and sludge management systems. Recommend process improvements or technology upgrades in ETP for sustainable operations. Energy Data Analytics & Reporting Implement real-time monitoring systems for energy consumption (e.g., Energy Management Systems – EMS, DCS, SCADA). Prepare energy dashboards and monthly MIS reports for management. Conduct gap analysis, energy audits, and track closure of audit findings. Project Development & Execution Lead implementation of energy conservation and waste heat recovery projects. Evaluate technical and financial viability of new energy initiatives including renewables (solar, bioenergy). Support preparation of CAPEX proposals and track ROI metrics. Regulatory Compliance & Certification Ensure compliance with statutory norms under Energy Conservation Act, PAT scheme, and local regulations. Lead ISO 50001 implementation, audits, and surveillance activities. Liaise with external consultants, auditors, and government bodies on energy matters. Cross-functional Engagement & Training Collaborate with operations, maintenance, sustainability, and environment teams for integrated solutions. Conduct training and awareness programs on energy efficiency for plant personnel. Champion a culture of continuous improvement and innovation in energy use. Key Skills & Competencies: Strong data analysis Familiarity with regulatory & statutory guidelines Good understanding of process integration and pinch analysis. Excellent communication and cross-functional collaboration skills. Key Attributes (Experience and Qualifications) Bachelor's degree in Chemical Engineering/Environment (mandatory). Certified Energy Manager/Auditor (BEE India) preferred. 10–15 years of relevant experience in energy management in large-scale petrochemical or process plants, including exposure to CPP and ETP operations.