210 Power Management Jobs - Page 8

Introduction As a Hardware Engineer at IBM, youll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in todays market. Your role and responsibilities Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 1-3 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification : Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

2 Y+ Experience in Energy Automation & electrical distribution. Passionate about Sustainability, Energy Efficiency and new Energy landscape topics. Expertise in Industrial automation software, PLC programming & SCADA - Knowledge of Schneider PLCs and tools is preferred. Expertise in Industrial communication protocols including Modbus TCP/IP Programming in Structured text and or Ladder logic in compliance with IEC61131. Programming in IEC61499 Automation Expert - (Preferred) Knowledge of Electrical systems and Power Management Systems (Controls, Power inverters, BESS, PV inverters, Gensets, etc.).

Requirement: 2Y+ Experience in Energy Automation & electrical distribution. Passionate about Sustainability, Energy Efficiency and new Energy landscape topics. Expertise in Industrial automation software, PLC programming & SCADA - Knowledge of Schneider PLCs and tools is preferred. Expertise in Industrial communication protocols including Modbus TCP/IP Programming in Structured text and or Ladder logic in compliance with IEC61131. Programming in IEC61499 Automation Expert - (Preferred) Knowledge of Electrical systems and Power Management Systems (Controls, Power inverters, BESS, PV inverters, Gensets, etc.)

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-6years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

locationsIndia, Bangalore time typeFull time posted onPosted 5 Days Ago job requisition idJR0274956 Job Details: About The Role : Foundry Services (FS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply. This job opportunity in FS will be part of the Customer Solutions Engineering (CSE) group which is responsible for the portions of the system foundry that brings the best of Intel technologies to FS customers, differentiating and accelerating their solutions from architecture to post-silicon validation. We are looking experienced Floorplan Engineer to work on Foor plan, die estimation, Power planning of high performance designs . Responsibilities include Establishes the integration plans for die with optimization for package and board constraints. Bump planning, Die file generation , closing loop with package team on signal and power bump placement restrictions Create physical database for the IP or SoC. Collaborate with architects to optimize the placement of IPs for latency as well as die area/aspect-ratio. Collaborate with the design teams on clocking and dataflow to deliver the physical block level floorplans for APR. Derive specifications and collaterals for the IP blocks to execute the floorplan and automatic place and route (APR) at subsequent hierarchies. Coordinate with power delivery team on trade-offs for metal allocation for signal and power. Have excellent understanding on, die-per-reticle/good-die-per-wafer maximization, and right technology selection on metal layers usage maximization Good knowledge on RDL routing and efficient usage higher metal layers Performs integration of all dies in a package and completes the relevant checks before tape-out. Qualifications: Qualification : 12+ Years of relevant Experience After a Bachelor or Master of Engineering degree in Electrical/ Electronic/VLSI Engineering or related field. Must have led multiple SOCs in capacity of SOC Floorplan lead. Strong Expertise in Design planning, die estimation, Good understanding on package and board level requirement . Must have knowledge on clocking , high speed design signal routing, industry standard protocols and IP architecture; Good understanding on relevant areas of Library / Memory / technology/submicron issues . Teamwork / flexibility / ability to thrive in a dynamic environment are very important Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

locationsIndia, Bangalore time typeFull time posted onPosted 30+ Days Ago job requisition idJR0270512 Job Details: About The Role : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 5+ years of industry experience, or Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 3+ years of industry experience Years of experience must include at least three of the following skills: Hardware architectures, system level IC design implementation knowledge of how to create end use scenarios IP level or SoC level validation experience Processor-based SoC level verification, in native Verilog, SystemVerilog and UVM mixed environments Verification tools such as VCS, waveform analyzer and/or third-party VIP/BFM integration (e.g. Synopsys VIPs) UVM verification Strong understanding of design concepts and ASIC flow Preferred Qualifications and experience that will make you stand out: Prior work on GDDR memory, power management, peripherals, datapath verification or PCIe Protocol is desirable Understanding of AXI-AMBA. Protocol variants is desirable Strong technical background in FPGA prototype emulation and debug Proven technical background in silicon validation, failure analysis and debug Validating system level designs based on embedded processors and peripherals such as SPI, I2C, UART Prior hands-on automation script development and optimization using C/C++, Python Good understanding of embedded firmware/software development process Functional knowledge and experience in JTAG Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Qualcomm is building on its core strengths in wireless and compute technologies and is in the middle of the biggest technology revolution in the Automotive space. While Qualcomm has pioneered connected car technologies for over a decade, it is now playing a critical role in the evolution of Automotive Infotainment, Telematics, ADAS/Autonomous Driving & its supporting technologies. We are investing in several bleeding edge technologies such 5G, Cellular V2X, Computer Vision, AI/Deep Learning etc., and are working closely with global Automakers/Tier-1s, standards bodies, consortiums and operators on pushing the boundaries. Qualcomm Automotive Team is looking for dynamic individuals who can make difference on many technology forefronts in Automotive space, join our growing multisite engineering organization. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. 3+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Bachelors or Masters in Engineering At-least 9 to 16 years experience in below areas. Hands on experience of driver development on any RTOS Handson Experience in Autosar software development Detailed understanding SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), power management Experience in Linux kernel architecture, device drivers and memory management. Embedded multimedia product development experience in Android Smartphones, Network based Graphics/Video/Camera/Display/Computer Vision products Experience in ISO26262/functional safety Exposure to one or more of below technology areas is a plus:- Multiprocessor Architecture, ARM processors, caching, interrupts, etc., Virtualization technologies across CPU and MM hardware accelerators

General Summary: Qualcomm is seeking experienced Design Verification (DV) engineers to verify high-performance and low-power CPUs, focusing on power management features including boot, reset, clock gating, power gating, voltage/frequency management, limit management, and throttling. Roles and Responsibilities: Develop and execute comprehensive power management verification plans, collaborating closely with CPU design and verification teams. Use simulation and formal verification methodologies, including writing checkers, assertions, and stimulus generation. Verify power intent with methodologies such as UPF (Unified Power Format). Work with system architects, software, and SoC teams to validate system-level use cases. Collaborate with emulation teams to enable verification on emulators and FPGA platforms. Debug and triage failures occurring in simulation, emulation, or silicon testing. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years experience, OR Master's degree with 3+ years experience, OR PhD with 2+ years experience in Hardware Engineering. Strong experience in power management verification (clock gating, power gating, UPF, DVFS/DCVS, throttling). Skilled in embedded firmware programming with assembly and C language. Proficient in C/C++, scripting languages, Verilog/SystemVerilog. Solid understanding of power management features in CPUs and CPU-based SoCs. Preferred Qualifications: Good understanding of CPU architectures and microarchitectures. Deep knowledge of digital logic design, microprocessor debug features, DFT architecture, and microarchitecture. Experience with advanced verification techniques such as formal verification and assertions. Familiarity with DFT and structural debug methodologies including JTAG, IEEE1500, MBIST, scan dump, and memory dump.

General Summary: Qualcomm is at the forefront of the automotive technology revolution, leveraging its expertise in wireless and compute technologies to drive innovation in Automotive Infotainment, Telematics, ADAS/Autonomous Driving, and related domains. The Automotive Compute Platform team seeks a seasoned Senior Technical Lead to guide multi-site engineering teams in delivering cutting-edge automotive software and hardware solutions. This leadership role will focus on optimizing embedded compute platforms, driving compliance with ASPICE and ASIL standards, and collaborating closely with global automakers, Tier-1 suppliers, and standards bodies. Key Responsibilities: Lead and mentor multiple teams of architects, technical leads, and engineers specializing in compute hardware and software optimization for automotive platforms. Define and execute strategic roadmaps aligned with Qualcomm's vision for best-in-class automotive service capabilities. Drive robust processes for requirement specification, prioritization, solution development, and system validation methodologies within a global engineering context. Manage stakeholder alignment across product roadmaps, delivery schedules, and feature capabilities. Oversee release management processes ensuring quality and compliance. Engage hands-on with embedded software development, including low-level drivers, firmware, kernel and user-space components on multi-core ARM/CPU, GPU, DSP, and specialized accelerators. Lead design and development efforts for heterogeneous embedded SoC platforms, utilizing JTAG/ICE debugging tools. Spearhead compliance efforts for automotive functional safety standards including ISO26262. Facilitate cross-geography collaboration with partners, customers, and senior management. Drive business process improvements and digitization initiatives in automotive software engineering. Minimum Qualifications: Bachelor's degree or higher in Engineering, Computer Science, Information Systems, or related field. 13+ years of experience in embedded software design, development, and support for multi-core ARM/CPU platforms. Strong programming skills in C and C++. Hands-on experience with embedded platforms including low-level driver and firmware development, real-time OS (RTOS), and kernel architecture. Experience leading medium to large technical teams. Proficient in driver development for RTOS environments and Autosar software stacks. In-depth understanding of SoC hardware blocks (clocks, PLLs, GPIO, interrupt controllers, peripherals such as SPI/I2C/PCIe/CAN/Ethernet/USB/UFS, and power management). Experience with Linux kernel architecture, device drivers, and memory management. Proficient in debugging and development using JTAG or In-Circuit Emulators (ICE). Preferred Qualifications: Demonstrated leadership experience working with senior management and distributed global teams. Excellent verbal and written communication skills. Experience in ISO26262/functional safety compliance. Exposure to multiprocessor architectures, virtualization technologies, caching, and interrupt handling. Experience driving process transformations and digital service enablement. Self-motivated, hands-on leader who actively engages in technical details to steer team success. Additional Skills: Familiarity with programming languages such as Java and Python. Ability to work across geographies and cultures effectively.

Job Area Engineering Group > Hardware Engineering General Summary Qualcomm is looking for strong Design Verification (DV) engineers in Bangalore to verify power management features in high-performance, low-power CPUs. Roles and Responsibilities Verify power management features including Boot, Reset, clock gating, power gating, voltage/frequency management (DVFS/DCVS), limit management, and throttling Develop comprehensive test plans in collaboration with CPU design and verification teams Use simulation and formal verification methods to execute test plans; write checkers, assertions, and develop stimulus Verify power intent using Unified Power Format (UPF) methodologies Collaborate with system architects, software, and SoC teams to validate system-level use cases Work with emulation teams to run verification on emulators and FPGA platforms Debug and triage failures in simulation, emulation, and silicon environments Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years hardware engineering experience OR Master's degree with 3+ years experience OR PhD with 2+ years experience Additional Requirements: 3+ years experience with power management verification in CPU or SoC environments Proficiency in assembly, C, C++ programming and scripting languages Experience with Verilog/SystemVerilog Strong understanding of CPU architectures and power management features such as clock gating, power gating, UPF, DVFS/DCVS, throttling Experience in embedded firmware implementation Preferred Qualifications Deep knowledge of CPU microarchitecture, digital logic design, debug features, and DFT (Design for Testability) architecture Experience with advanced verification techniques including formal verification and assertions Knowledge of DFT methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump

Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. This position will be responsible for Technical and hands on role mainly for high level architecture and micro-architecture development. Design the prototype or experiments for proof of concept for initial power, area or latency benefits Candidate ready to learn new protocol and sub-systems to support different segments of infra solutions Work with design team to resolve queries and ensure the completeness of design Participate in development of the testplan and test scenarios for bug free RTL Preferred Qualifications 8+ years of experience in IP architecture, micro-architecture and design. Good understanding of SOC. Possesses expertise in any one of the following technical areas is a plus:DDR, Interconnects, SOC power management, clock/reset, UBWC, Encryption, ECC Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution) Good communication and work with minimal supervision Collaborate with Perf, Design and System team stakeholders in developing solutions Experience with Verilog, logic design principles with timing, area and power implications. Experience in testplan development, UVM, will be a great asset Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI. Good Understanding of concurrency, bandwidth, latency and system level aspects Education Requirements:Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred

General Summary Qualcomm is a global leader in wireless and compute technologies, now accelerating innovation in the Automotive space . The Automotive Compute Platform Team is seeking a Senior Technical Lead to drive the evolution of Automotive Infotainment, Telematics, ADAS/Autonomous Driving, and other cutting-edge technologies like 5G, Cellular V2X, Computer Vision, and AI/Deep Learning. Key Responsibilities Lead multiple teams of architects, technical leads, and engineers across compute hardware and software in optimization efforts. Drive compliance with ASPICE and ASIL functional safety standards. Define strategic roadmaps aligned with Qualcomm's vision for automotive services. Manage requirements specification, prioritization, and solution development with global stakeholders. Define automotive use cases and system validation methodologies. Oversee robust release management processes. Hands-on involvement in technical issues and active leadership to drive team success. Minimum Qualifications Education: Bachelor's in Computer Engineering, Computer Science, Electrical Engineering, or related field with 8+ years of software engineering experience OR Master's degree with 7+ years experience OR PhD with 6+ years experience Experience: 20+ years in embedded systems software design, development, and support on multi-core ARM/CPU platforms. Strong C/C++ programming skills. Experience with embedded platforms, including low-level drivers, firmware, kernel, and user-space components. Software development for heterogeneous SoC platforms with ARMs, GPUs, DSPs, and hardware accelerators. Proficiency in JTAG or ICE debugging tools. Real-time embedded software development experience. Hands-on leadership of medium to large technical teams. Experience with driver development on RTOS. Autosar software development experience. Detailed understanding of SoC hardware blocks (Clocks, PLLs, GPIO, Interrupt Controllers, Peripherals such as SPI, I2C, PCIE, CAN, Ethernet, USB, UFS). Linux kernel architecture, device drivers, and memory management. Preferred Qualifications Self-motivated with excellent verbal and written communication skills. Proven experience collaborating with cross-geography engineers, partners, and customers. Experience engaging with senior management in corporate settings. Expertise in business process transformation and digitized service enablement. Willingness to dig into technical details and lead hands-on. Knowledge of ISO 26262 / functional safety highly preferred. Exposure to multiprocessor architecture, ARM processors, virtualization technologies. Programming Languages Experience C, C++, Java, Python (4+ years)

Position: ASIC RTL Design Lead (SI90FT RM 3217) Job Description: Innovate, implement, and verify RTL code for complex PHY sub systems dealing with high speed blocks using Verilog/System Verilog knowledge of Power Intent format (UPF) and Timing Constraints (SDC) is a must. Collaborate with DFT, PD, Hardware and Firmware teams for delivering the most optimal solution Previous experience with storage systems, protocols, in NAND flash /DRAM controller PHY Basic understanding of PHY system level concepts Experience in PHY architecture, power management and Registers understanding to interact with FW design. Proficient in C, C++, Lint Excellent interpersonal skills and Team Player High level of integrity and commitment to quality and timeliness. Understanding of Hardware Block Diagrams, Schematics Understanding of PHY Architecture document and programming guidelines Understanding of PHY integration guidelines implementation Strong can-do attitude Job Category: Embedded HW_SW Job Type: Full Time Job Location: Bangalore Experience: 9+ YEARS Notice period: 0-30 days

We are now looking for a Senior Architect - Tegra. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI the next era of computing. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities which are hard to seek, which only we can pursue, and which matter to the world. This is our life s work: to amplify human inventiveness and intelligence. Make the choice to join us today. NVIDIA develops outstanding solutions in the automotive, embedded and mobile spaces through its low-power high-performance Tegra System On Chips. What youll be doing: In the key role of a System Architect in the Architecture team, the candidate will be responsible for invention, development and solving state of the art boot, power management and security architecture problems. The profile includes definition and specification of System on Chip Boot sequences from reset, wake up from deep sleep states, analyzing platform security considerations, evaluating HW and SW security attacks and suggesting mitigations that fit the SoC Architecture. Define BootROM software flows, design boot staging and key association choices, and apply crypto algorithms to a secure boot sequence for the platform. You would be required to specify complex hardware and software interactions, perform architecture validation and use-case analysis towards meeting the requirements of various products. The role may need you to architect power management hardware, state machines to sequence sleep states, order various units in power up and shutdown usecases for the SOC. The role may also include platform modeling of the above interactions in addition building / debugging / maintaining the models, and developing validation tools for next generation secure boot software. Work with multiple multi-functional teams in the organization including but not limited to Architecture, Security, ASIC design, SW, product/marketing, and customer facing teams. What we need to see: Bachelors in Electrical Engineering or Computer Science (Masters degree or higher preferred). 5+ years of experience Past experience in C++ development, embedded software, and at least some exposure to system level design. Processor architecture, system bus architecture, ARM processor-based architecture fundamentals, strong software design fundamentals, strong hardware architecture fundamentals. Exposure to security architecture and applied cryptography is a plus. Exposure to low power SOC architecture is a big plus Strong analytical skills and aptitude, eager to tackle complex problems. Good communication/articulation skills and ability to work across multi-geographical teams. NVIDIA is an equal opportunity employer and we value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Join Qualcomm's design verification team in verifying the Digital Low Power IPs for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle (including Functional, Low Power Verification, Gate Simulation, Formal Verification) from system-level concept to tape out and post-silicon support.Responsibilities:Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team.Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Low power verification, Formal verification and Gate level simulation to ensure high design quality.Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure.Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful IP level verification, integration into subsystem and SoC, and post-silicon validation.Minimum Qualifications:Master's/Bachelors degree in Electrical Engineering, Computer Engineering, or related field.8+ years ASIC design verification, or related work experience.Knowledge of a HVL methodology like SystemVerilog/UVM.Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others.Preferred Qualifications:Experience with Low power design verification, Formal verification and Gate level simulation.Knowledge of standard protocols such as Power Management Flows, PCIe, USB, MIPI, LPDDR, etc. will be a value addExperience in scripting languages (Python, or Perl). Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5+ years RTL Design/Hardware Engineering experience or related work experience. Strong Domain Knowledge on RTL design(Verilog/VHDL/System Verilog) , implementation, and integration, micro-architecture & designing cores and ASICs Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc Exposure in scripting (Pearl/Python/TCL) Strong debugging capabilities at simulation, emulation, and Silicon environments Collaborate closely with cross-functional teams to research, design and implement performance and power management strategy for product roadmap Knowledge on Designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows Work closely with system/software/test team to enable the low power feature in SoC products Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 8+ years RTL Design/Hardware Engineering experience or related work experience. Strong Domain Knowledge on RTL design(Verilog/VHDL/System Verilog) , implementation, and integration, micro-architecture & designing cores and ASICs Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc Exposure in scripting (Pearl/Python/TCL) Strong debugging capabilities at simulation, emulation, and Silicon environments Collaborate closely with cross-functional teams to research, design and implement performance and power management strategy for product roadmap Knowledge on Designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows Work closely with system/software/test team to enable the low power feature in SoC products Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Details: : 1) Defines, develops, and performs functional validation in SoC power management for GPUs focusing on validation of IP integration, interaction between IPs, and system level features.2) Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. 3) Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. 4) Develops Power Management validation methodologies and Validation plans for SoC power management for GPUs, executes validation plans, and collaborates with engineers for feature verification, troubleshooting and failure analysis. 5) Tests interactions between various GPU features using validation infrastructure. 6) Develops post silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. 7) Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC Power management in GPUs. 8) Develops content to create or increase specific IP interactions, engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (emulation, FPGA) to ensure silicon readiness Qualifications: Bachelors or masters degree in computer science, Electrical Engineering, or a related field with 5 to 10 years of experience. Proven experience in SoC validation specifically in Power management areas Test content development with focus on reset/boot/Active Power/Idle Power/ Thermal areas. Strong understanding of server architectures, hardware components, and operating systems (Windows, Linux) Proficiency in programming like C, C++, Python for test automation, debugging, and test content development. Experience with validation, debug tools involving ITP/JTAG, Test content development tools and frameworks (e.g., Jenkins, GDB, WinDbg). Excellent problem-solving skills and attention to detail. Familiarity with version control systems (e.g., Git) and issue tracking tools (e.g., JIRA). Knowledge of industry standards and best practices related to server reset, platform validation, debugging, and test content development. Good team player, Candidate should have excellent interpersonal skills / strong communication and collaboration skills w/ the ability to work effectively in team environment Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: About The Role Required: Bachelor's degree in computer engineering/computer science/electrical engineering or equivalent PreferredMaster's degree in computer engineering/computer science/electrical engineering Additional About The Role Qualcomm is building on its core strengths in wireless and compute technologies and is in the middle of the biggest technology revolution in the Automotive space. While Qualcomm has pioneered connected car technologies for over a decade, it is now playing a critical role in the evolution of Automotive Infotainment, Telematics, ADAS/Autonomous Driving & its supporting technologies. We are investing in several bleeding edge technologies such 5G, Cellular V2X, Computer Vision, AI/Deep Learning etc., and are working closely with global Automakers/Tier-1s, standards bodies, consortiums and operators on pushing the boundaries. Qualcomm Automotive Compute Platform Team is looking for senior technical lead who can make difference on many technology forefronts in Automotive space, join our growing multisite engineering organization. Responsibilities will include but not limited toLeading multiple teams' architects, technical leads, compute hardware and software engineers in optimization efforts and driving ASPICE, ASIL Compliance. Defining strategic roadmap and delivering to the vision of best-in-class service capabilities of Qualcomm"™s Automotive Engineering teams. Driving robust processes for requirements specifications, prioritization and solution development that supports a larger Automotive Global team. This includes active management of stakeholder alignment of capabilities, product roadmap and delivery plans. Defining and implementing Automotive use cases, driving system validation methodologies and robust release management processes Minimum Qualification- 20+ Years of Experience in the embedded domain to design, develop and support software solutions on multi-core ARM/CPUs, Strong C/C++ programming skills. Embedded Platforms experience including low-level drivers and firmware, kernel and user-space components. Design and development of software for heterogeneous compute platforms consisting of ARMs, GPUs, DSPs, and specialized hardware accelerators in an embedded SoC systems with J-TAG or ICE debuggers; Experience in real-time SW development for embedded products. Hands on experience in leading medium to large technical teams. Hands on experience of driver development on any RTOS Handson Experience in Autosar software development Detailed understanding SoC hardware blocks - Clocks, PLLs, GPIO, Interrupt Controllers (GIC), Peripherals (SPI/I2C/PCIE/CAN/Ethernet/USB/UFS), power management Experience in Linux kernel architecture, device drivers and memory management. Preferred Qualifications- Motivated self-starter with excellent verbal and written communication skills, demonstrated ability to work with engineers/partners/customers across different geographies. Demonstrated experience working with senior management in a corporate environment. Demonstrated experience in business process streamlining and transformation that includes disciplined approach to digitized services enabling. Hands-on technical lead who is not hesitant to dig into the details where needed to get first-hand knowledge of the issues and play an active and personal role in steering team success. Experience in ISO26262/functional safety is highly recommended. Exposure to one or more of below technology areas is a plus:- Multiprocessor Architecture, ARM processors, caching, interrupts, etc., Virtualization technologies across CPU and MM hardware accelerators Minimum Qualifications: "¢ Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Engineering or related work experience. "¢ 4+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Power Management Engineer in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is looking for a qualified design engineer on power analysis, optimization, and validation, to contribute in designing our high-performance power-efficient microprocessor chipset. This person will be a part of the Silicon Engineering team and work across multiple groups to drive the power requirements, and power optimization from micro-architecture to final silicon. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Power analysis engineer is expected have strong CMOS design fundamentals and deep knowledge of power reduction techniques at various levels of abstraction. Expertise in analyzing the results given by various power estimation tools and create actionable items for power reduction. Experience in developing flows and post processing scripts to help in analysis and rollup. Setup power analysis environment for at the RTL-level, and gate-level for power analysis of all design blocks at the pre-silicon stage. Determine tests and benchmarks to run on all blocks for pre-silicon power analysis Develop tests in DV test environment to certain use cases interesting for power analysis and reduction Run and review power analysis reports at the RTL-level and gate-level on all design blocks. Identify areas of improvements at the architecture-level, RTL-level, and synthesis. Analyze power from activities from workloads run on emulation environment Determine power optimization budgets for all blocks, and setup runs to validate them as the design progresses. Understand the different CPU use cases, Memory and Pcie workloads. Work with industry standard power analysis tools like Spyglass/Power Artist/Joules/PrimePower etc. Maintain and improve existing power modeling and analysis flows. Experience with power analysis using gate-level and RTL-power analysis tools Good understanding of power analysis and optimization on CMOS designs Good understanding of clock-gating, power-gating, DVFS, etc. used for power optimization Good understanding of processor designs, processor work-loads. Solid programming and scripting skills using Perl/Python/Tcl Experience running power analysis on activity from emulation environment Owned CPU or SOC design blocks and familiar with design flows (synthesis, place & route, power, timing, EM/IR) Owned power analysis methodology and/or automation in previous role Hands-on working experience with Power analysis tools and flows (one or more of the following industry-standard tools: Primepower, PTPX, Power Artist, Joules, Voltus) Advanced knowledge of Python, TCL and shell scripting M.Tech in Electronics Engineering or Computer Engineering with 1+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Min 5 Years of Experience in Python ; Strong background in developing application and related Frameworks [PyQt ,Tkinter ,Pytest] . Adv Python for Data Analysis is advantage : Skilled resource for Trouble shoots ,Debug ,Optimize the code. Should be aware of the project life cycle (SDLC & STLC) Should be aware of the defect flow and defect management Should have scripting knowledge - in both test development and execution using any automation tool. Should be aware of integration and system testing concepts and methods and tools Automotive Infotainment knowledge in features like Vehicle, CAN, Diagnostics, Power management. Should have managed a small team of atleast 4-5 members. Early onboarding

Responsible for development of Digitalization business in Low Voltage industry from End Users and Infrastructure customers across India . - Promote Energy Monitoring solutions , Power Manager / Power Mind / Cloudbased Apps . - Promote Power Metering as well as Power Quality solutions from Siemens . - Support Sales in promoting / developing EP business in the above mentioned customer segment / area - Identify new opportunities / customers and work closely with regional sales to provide support in developing the Customer - Plan and execute promotional activities for End users and Infrastructure customers

Looking for challenging role? If you really want to make a difference - make it with us Can we energize society and fight climate change at the same time? At Siemens Energy, we can. Our technology is key, but our people make the difference. Brilliant minds innovate. They connect, create, and keep us on track towards changing the world"™s energy systems. Their spirit fuels our mission. Our culture is defined by caring, agile, respectful, and accountable individuals. We value excellence of any kind. Sounds like you? Siemens Energy is focused on helping customers navigate the world"™s most pressing energy problems. As a world leader in developing and producing the most advanced engineering technologies, we improve lives and further human achievements worldwide, while also protecting the climate - all thanks to our employees. With us, you can do something significant that benefits society and human progress . As a member of an international team working on automation, electrification and digitalization solutions, and within an editorial team, your responsibility is to produce technical documentation of one or more products, with the Siemens Energy quality. During your day you"™ll process technical documents using CCMS or Latex-based solutions. You will handle all the inherent complexities of a such systems, creating and updating document type definitions and style templates, based on SE guidelines. You will apply information architectures and standards to facilitate information transfers from knowledge bases and ensure high reuse of templates and content. Most of the times you"™ll see yourself crafting and maintaining documents, by constantly creating, importing, updating, revising and organizing the technical content, and tailoring each document to the target audience. For that you"™ll adopt a highly efficient workflow, leveraging the CCMS capabilities, using AI tools for quick reviews and improvements, applying international standards, as well as your customer-oriented writing skills and technical expertise for the perfect final touch, eventually consulting technical experts for accuracy. All of that for documents in paper-based and online formats. Documentation is becoming modern and interactive, so you will play an important role ensuring the best user experience for our customers and end users in all media formats. Your new role challenging and future- oriented Deliver pristine reader-friendly technical documents in Englisherror free, grammatically and syntactically correct; writing style tailored to the target audience; content is logic, coherent, and accurate, in the right quantity, with the right amount of contest and structured from general to the detail CCMS / Latex specialisthandles all the complexities in document creation / editing Handles paper-based and digital based documentation Document quality inspection observes standards and ensures content is on point Revise technical content for an entire document or just changes ("˜deltas"™) with focus on terminology and style Implements document type definitions and style templates in editorial tools Support setup of CCMS or Latex based editorial solutions Support management of editorial processesmanage reviews and archiving of content components Devise and test basic user flows and storyboards for the user journey through product documentation Import multimedia and other types of content from engineering applications (Autodesk, Siemens NX, EPlan, COMOS), directly or by using middleware or APIs Translation assistancetranslation previews with AI; manages peer support for translations; reimport translations Communicate with authors, subject matter experts, and other stakeholders for clarifying and addressing content-related issues. We don"™t need superheroes, just super minds University degree in IT, computer science, engineering, or similar education Minimum of 3 years writing technical documentation, preferably 5 Proven writing and editing skills in English organizes information logically and systematically proper grammar, syntax and style adapt language to suit the understanding level of the target audience digest complex information and break it down into understandable parts attention to detailspot inconsistencies, and inaccuracies in content provide context as needed Customer and end user orientednotions of User Experience and best practices for technical content media (paper and digital). Familiarity with style guidelines and document type definitions, and experience implementing them in editorial tools, for paper and online formats Technical knowledge and experience in tools CCMS solutions such as COSIMA and Schema ST4 Latex solutions XML-based architectures and Markup languages (XML, DITA, or Markdown) Version control systems such as Git Basic scripting, to handle information transfer through APIs Basic media editing for quick fixesraster and vector graphics, audio, video Other software for inspections and fixespdf editors, Excel Export settings on known CAD applications Using AI tools for content review Knowledge and experience using documentation related standards ISO/IEC/IEEE 26511, IEC/IEEE 26514, ISO/IEC 82079-1, ISO/IEC 18019, ASD- STE100 (Simplified Technical English) CCMS standards such as ISO/IEC 26531 General experience in technical domainsautomation systems, software development Preferably experienced in DCS (Distributed Control Systems), PCS (Process Control Systems), PCS 7 and / or TIA Knowledge, PMS (power management systems) OR Information-dense dashboard-style applications for analysis of real-time and historical data, such as Omnivise. Experience working in international development teams Experience working in agile environments and good knowledge of agile processes Experience with task management and tools (Azure DevOps, Jira, Asana) Personal Proactive and continuous learner Highly organized and systematic Ability to handle complexity Communicative, and collaborative Can take constructive criticism, appreciates feedback on own work . We"™ve got quite a lot to offer. How about you? This role is based at Site (Gurgaon). You"™ll also get to visit other locations in India and beyond, so you"™ll need to go where this journey takes you. In return, you"™ll get the chance to work with teams impacting entire cities, countries and the shape of things to come. We"™re Siemens. A collection of over 379,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and imagination and help us shape tomorrow.

We at Smart Infrastructure Division in Siemens Ltd. is one of the top tier global suppliers of products, systems, solutions, and services for the efficient, reliable, and intelligent transmission and distribution of electrical power. As the trusted partner for the development and extension of an efficient and reliable power infrastructure that industry and the portfolio they need. JOIN US! WE MAKE REAL WHAT MATTERS. THIS IS YOUR ROLE. The primary role requires the candidate to act as a Technical Consultant for Sales & Operations and hence should work collaboratively with the direct sales team, Operations team, Clients and Business Partners (Internal / External) in order to undertake and support the corresponding Sales teams to explore newer opportunities to enhance the present portfolio basket by possible integration of various system integrations. The candidate is expected to act as a Solution Architect, wherein he/she should drive the system solutions with an intent of system lifecycle manager. The job profile requires experience in the following activities Detailed Requirement Study Solution Architect (Enabler for integrating of various systems with the Power SCADA/SAS & PMS to drive new opportunities) Offer evaluation and optimization Opportunity & Proposal Support Execution Support (Engg, Configuration & Commissioning) Demo / PoC support Responsibilities Include Supporting Sales and Execution team in building and executing solutions Like PMS, Loadshedding, SCADA, SAS and other complex requirement in Power system. Drive revenue growth and create sales opportunities by contributing and managing pre-sales technical process. Collaborate with Sales team and educate customers about benefits of Siemens solutions. This includes presentations, technical evaluations, proposals and follow up on customer related issues. Design of System Architectures for IT/OT integrated Systems, Integration of different Systems, estimating the Bill of material (including the required SW licenses) and optimization of designed system architecture in order to achieve business goals. Verifications of technical compliances of HW/SW systems"™ offer received from vendors. Supporting the execution cycle of the new system solutions. Collaborating for new solutions and technologies required in the business to drive new product and offerings. Experience/Profile Minimum 8 to 10 years of overall working experience in the field of Substation Automation Systems, Power management System (PMS), Loadshedding and SCADA applications. 3+ years in Technical pre-sales/design activities shall be preferred. Hands-on experience with the below shall be preferred ? PMSABB/Siemens/GE ? RTUABB/Siemens/GE/Synergy ? SCADAWINCC/Siemens and/or IFIX/GE ? SASSiemens PAS, GE, ABB or equivalent systems Must have experience in building technical system architectures required for Substation Automation system/Data Centers / Control Centers / Integrated Command Centre Must have Relevant experience in working with System Integrators. Must have understanding of security solutions and required configuration of firewalls, NMS systems and Web systems Hands on experience and knowledge on working if different HW configurations of Data Centers / real-time Control Center setups including storage, servers, networking and security equipments Knowledge and know-how of IoT solutions, Cloud and Big Data will be a desired skillset. Background of handling Utilities / Industry / Infrastructure end-customer is desired Soft Skills Excellent Communication (Both written & verbal) & Inter-personal Skills Should be an accomplished presenter of Sales and/or Technical material to small / large audiences. Critical thinking, reasoning and problem solving are an essential part of this position. Enjoys learning new things and build knowledge base in new area. Enjoys working in Team environments, Exhibits collaboration in multiple stake holder interactions. Job LocationGurgaon/Mumbai/Chennai Job entails travellingYes WE"™VE GOT QUITE A LOT TO OFFER, HOW ABOUT YOU? We"™re Siemens. A collection of over 379,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow.