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Sr Principal Design Engineer

15 - 18 years

0 Lacs

Posted:6 days ago| Platform: Linkedin logo

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On-site

Job Type

Full Time

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

BTech/ MTech in Engineering with 15 to 18 years of actual work experience in Hardware Design Architect.Worked on PCIE/LPDDR5/UCIE/Ethernet/MIPI Protocol Designs. Prepare SOC hardwareArchitecture Specification to Start the Design and Verification Implementation. Verilog / System-Verilog RTL logic design, debug, and functional verification supportN/A

We’re doing work that matters. Help us solve what others can’t.

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Cadence
Cadence

Software, Electronic Design Automation

San Jose

Approx. 8,000 Employees

209 Jobs

    Key People

  • Anirudh Devgan

    President and CEO
  • Tom Beckley

    Senior Vice President

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