544 Uvm Jobs - Page 17

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5-7 years of experience in SOC Verification. Hands on experience in SOC level test bench and test plan development. Good knowledge of UVM, System Verilog, PSS Knowledge of Amba Protocols such as CHI, ACE. Hands on experience in PCIe, USB4, DDR4/5 Experience in bare metal post silicon Good Communication. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [HIDDEN TEXT] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Be part of a world-class XR team researching and developing mobile Augmented and Virtual Reality enabling technology Develop low latency, high quality rendering algorithms, and deploy them on mobile GPUs Understand and analyze XR algorithms and map them to standard constructs in graphics Develop custom graphics content for critical testing of algorithms, and benchmark and validate these algorithms Collaborate across functional boundaries in defining architecture, APIs, design and schedule See their design in action on industry-leading chips embedded in the next generation of AR and VR devices and adjacent markets Critical Skills Strong understanding of fundamental concepts in graphics - perspective and orthographic geometry, coordinate axes transformations, image filtering, anti-aliasing, ray-tracing, etc. Well versed in graphics implementation and mapping algorithms to the GPU - knowledge of and experience developing various types of shaders C++ and Matlab/Python experience Experience implementing graphics shaders including compute shaders either in OpenGL/DirectX/Vulkan Good communication skills - writing and presentation 8+ years of industry experience if Bachelors, 6+ years of industry experience if Masters, or 3+ years after PhD The degree should be in Electrical Engineering, Information Systems, Computer Science, Computer Engineering or related field. Preferred skills Experience in software development, incl. testing and debugging on XR devices, mobile platforms or other embedded systems Development of content on Unity, Unreal or similar platform Understanding of ML concepts applied to content rendering Education Text Required: Bachelors or higher degree in Electrical Engineering, Information Systems, Computer Science, Computer Engineering or related field Keywords Virtual reality, Augmented reality, computer graphics, multimedia, image processing, rendering Minimum Qualifications: Bachelors degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Masters degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

General Summary: As a Qualcomm Hardware Engineer, you will contribute to the planning, design, optimization, verification, and testing of electronic systems spanning Digital, Analog, RF, Optical, FPGA, DSP, and mechanical domains. You will work closely with cross-functional teams to meet performance and quality goals on cutting-edge products. Key Responsibilities: Execute unit and subsystem level verification with strong emphasis on coverage-driven constrained random verification methodologies. Develop and maintain testbenches including stimulus generators, agents, monitors, and checkers using SystemVerilog and UVM. Collaborate on test planning to ensure comprehensive verification coverage and quality. Integrate C-based reference models within verification environments. Utilize scripting languages such as Perl and Python to automate verification tasks and support test infrastructure. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of experience, OR Master's degree with 3+ years of experience, OR PhD with 2+ years of experience in Hardware Engineering. 8+ years of unit and subsystem verification experience. Proficiency in SystemVerilog, UVM, and testbench development. Experience with coverage-driven constrained random verification. Familiarity with C-based reference models integrated within verification environments. Scripting experience in Perl and Python.

General Summary: As a Qualcomm Hardware Engineer, you will design, verify, and test complex electronic systems including Digital, Analog, RF, FPGA, DSP, and SoC subsystems. You will collaborate with cross-functional teams to optimize designs, ensure performance, and enable successful product launches at scale. Key Responsibilities: Develop and implement SoC-level verification testbenches and comprehensive test plans. Perform hands-on SoC verification across multiple interfaces and protocols. Work with UVM, SystemVerilog, and Portable Stimulus Standard (PSS) for verification environment development. Validate complex AMBA protocols such as CHI and ACE within SoCs. Conduct verification of high-speed interfaces including PCIe, USB4, and memory interfaces DDR4/DDR5. Support bare-metal post-silicon bring-up and verification activities. Collaborate across teams with clear communication to ensure timely delivery and quality. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 4+ years of hardware engineering experience, OR Master's degree with 3+ years experience, OR PhD with 2+ years experience. 8+ years of relevant SoC verification experience. Strong knowledge and hands-on experience with UVM, SystemVerilog, and PSS. Experience with AMBA protocols (CHI, ACE), PCIe, USB4, DDR4/5. Good communication skills for effective teamwork.

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary Were looking for a frontend CAD developer to produce scalable software solutions for in-house EDA flows. As part of a cross-functional team, youll be responsible for the full software development life cycle, from conception to deployment. Must have hands-on experience in developing the large software systems with structured development cycles. Should have good problem-solving skills, strong communication skills and a flair to work in a challenging environment Education B.E/B.Tech or M.E/M.Tech in VLSI/EE/EC/Computer Science Skills/Experience: 8 years of experience in EDA Tool/Flow Development, Deployment and Support Strong experience in Scripting languages like Perl, Tcl, Python, GUI development on Linux platform Should be well versed with VLSI frontend Design/Verification steps, RTL/System Verilog and UVM methodologies Knowledge of Clearcase Perforce, GIT, Makefiles Database design, Computer Architecture is a plus Desirable Scripting and automation skills:Unix/Linux shell programming, Perl/Python, Makefile Should be sincere, fast learner, committed, having good communication skills, and willing to take up new challenges

Perform verification for high-speed FPGA digital design using UVM/OVM for complex mathematical and control logic algorithms. Developing Verilog/VHDL code. Full testing of FPGA design which include testing of complete design with PS.

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . AMS Verification Lead - Isolation group Analog Devices is seeking an experienced Analog Mixed Signal Verification engineer to join its Interface Isolation group based at its Bangalore Research Development offices in India. The group is the market leader in galvanic safety isolation products due to its proprietary iCoupler transformers and More Than Moore wafer fabrication technologies. As these technology capabilities advance there is an emerging need for greater complexity in the digital and mixed signal verification requirements to bring next generation ground-breaking products to the Medical, Industrial and Test Measurement markets. Role Lead the AMS verification effort of devices Contribute towards verification strategy and methodology improvement Understand device requirements and come up with traceable AMS verification plan Hands on contribution to AMS top level verification effort Lead a team of AMS engineers/contractors Code/generate SVRNM models of required analog blocks and validate against schematic. Develop directed tests in AMS environment or reuse constrained random UVM testcases Interface with global design teams through various phases of verification File and track bugs to closure in Jira Document results of assigned blocks and review the results with the team Requirements Bachelor of Engineering degree in electrical/electronic engineering or comparable degree 8+ years experience in chip level AMS (analog mixed signal) verification of SOC Familiarity with latest digital verification methodologies like digital mixed signal verification(DMS) using UVM Experience with mixed signal simulators such as Cadence AMS or equivalent Experience in running GLS and scan sims from top level Experience with SVRNM or verilogams behavioural model coding for analog blocks Team player with good analyzing and debugging skills Open to adopting new tools and flows Must have good verbal and written communication skills to work effectively with teams spread geographically

We are currently seeking Verification Engineer with strong verification fundamentals to work in Switch Silicon group. Youll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips. In this position, youll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency! The Networking Chip Design team in India is a new team which is growing at a fast pace. What youll be doing: Verify Switch designs architecture and micro-architecture using advanced methodologies. Build reference models, verify and simulate chip blocks/entities according to specifications. Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. You are encouraged to understand the design and implementation, define the verification scope, develop the verification infrastructure, test plans and tests and verify the correctness of the design at SOC level. Use sophisticated verification methodologies like e-specman, SV-UVM etc. What we need to see: BS (or equivalent experience) / MS with 4+ years of experience in design verification. Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.). Perl/python scripting language experience desirable. Ways to stand out from the crowd: Prior experience of Ethernet or InfiniBand Switches, and/or smartNICs or DPUs, and/or high-speed interconnects. Strong debugging, problem-solving and analytical skills. Scripting knowledge (Python/Perl/shell). Good social skills and ability desire to work as an excellent teammate. Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #LI-Hybrid

Position: Design Verification Engineer (SI70FT RM 3214) Basic qualifications Bachelor s/ Master s degree or higher in EEE/ECE 7+ years or more of practical semiconductor design verification including System Verilog, UVM, GLS, assertions and coverage driven verification. Experience using multiple verification platforms: UVM test bench, emulator, software environments Experience with industry standard IO interfaces like AMBA, CXL, USB, MIPI, PCIE, DDR etc. Experience defining verification methodologies Experience with test plan development, test bench infrastructure, developing tests and verifying the design Experience with writing directed/constrained-random tests Experience identifying bugs in architecture, functionality, and performance with strong overall debug skills Experience verifying at multiple levels of logic from SoCs to full system testing Experience with industry standard tools and scripting languages (Python) for automation Experience in SOC Architecture is a strong plus Experience with ARM/RISCV Experience with debugging system level issues Experience with industry standard IO interfaces like AMBA, USB, MIPI, PCIE etc. Job Category: Others Job Type: Full Time Job Location: Bangalore Experience: 7 Years Notice period: 0-30 days

Position: Design Verification Ethernet MAC (SI80FT RM 3219) Required Skills Experience Ethernet Expertise: Strong understanding of 100G/400G Ethernet architecture. Hands-on experience with MAC, PCS, PMA, Auto-Negotiation, and Link Training. Working knowledge of IEEE 802.3 (100GBASE-KR, 400GBASE-R, etc.). Experience level: 5-10 years. Proficiency in SystemVerilog and UVM methodology. Job Category: Others Job Type: Full Time Job Location: Bangalore Experience: 8+ years Notice period: 0-30 days

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . AMS Verification Lead - Magnetic Sensors The mission of the Magnetic Sensor (MAG) team within the Industrial and Multi-Markets (IMM) Business Group is to develop highly innovative, differentiated and industry leading magnetic sensing technology for industrial and automotive markets. The novel and ground-breaking sensor products are defined and developed by the MAG team, leveraging proprietary processes in the Limerick Fab, meeting the emerging needs of our strategic customers. To help us accelerate our ambitious goals in bringing these emerging technologies to commercial success, the MAG team is seeking a highly driven and dynamic engineer to take a role as AMS Verification Lead responsible for leading package level design verification. The candidate will be responsible for formulating verification strategies, defining verification architecture, flow, methodology and leading, driving and completing verification of our sensor/ASIC solution. Requirements Bachelors/Masters degree in Electronics engineering or equivalent with 8+ years of experience Proven experience in leading full-chip level design verification of mixed signal devices Must have hands on experience in top level metric driven analog mixed signal (AMS) simulations Must have experience in modelling and validation of analog blocks (RNM, Verilogams etc.) Experience in developing verification collateral Familiarity with latest digital verification methodologies like digital mixed signal verification(DMS) using UVM Strong communication skills and ability to collaborate with a global team Role Setup mixed signal verification methodology/flow by interacting with methodology and CAD groups Understand device requirements and come up with traceable AMS and DMS verification plans Lead a team of AMS and DMS verification engineers/contractors Hands on contribution to modelling and AMS top level verification effort Technical support to team members Supervision of the DMS verification effort Interface with global design teams through various phases of verification

Memory ControllerVerification- Principal Location: Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. Memory Controller - Principal / Senior Staff Verification Engineers: looking for experienced and talented professional for DDR Memory Controller Verification. Minimum Qualifications: BE/BTech in Electrical/Computer engineering with 10+ years of experience or ME/MTech in Electrical/Computer engineering with 8+ years of experience Should have hands on experience in System Verilog, UVM/OVM and Object-Oriented Programming Proven track record in DDR5/LPDDR5X/LPDDR6/HBM4 IP verification from environment and tests development to validation closure Work closely with RTL designers and SOC team to scope out integration and verification requirements Proficiency in bus protocols AXI/AHB Integration and verification of complex System IP features. Proficiency in scripting languages like Perl, Python etc. Strong communication, collaboration, and interpersonal skills Strong analytical and problem-solving skills Preferred Qualifications: Experience in Memory controller, DDR4/5, LPDDR4/5, HBM memory protocols Knowledge of Fabric/Network on chips, Cache Coherency Experience in GLS is added advantage. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Memory Controller - Staff Verification Engineers Location : Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. Memory Controller - Staff Verification Engineers: looking for experienced and talented professional for DDR Memory Controller Verification. Minimum Qualifications: BE/BTech in Electrical/Computer engineering with 6-8+ years of experience Should have hands on experience in System Verilog, UVM/OVM and Object-Oriented Programming Proven track record in DDR5/LPDDR5X/LPDDR6/HBM4 IP verification from environment and tests development to validation closure Work closely with RTL designers and SOC team to scope out integration and verification requirements Proficiency in bus protocols AXI/AHB Integration and verification of complex System IP features. Proficiency in scripting languages like Perl, Python etc. Strong communication, collaboration, and interpersonal skills Strong analytical and problem-solving skills Preferred Qualifications: Experience in Memory controller, DDR4/5, LPDDR4/5, HBM memory protocols Knowledge of Fabric/Network on chips, Cache Coherency Experience in GLS is added advantage. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Staff PCIe / CXL / D2D based memory expander Verification Location: Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. PCIe/CXL based memory expander - Verification Engineer: looking for experienced and talented professional for CXL based memory expander. Minimum Qualifications: BE/BTech in Electrical/Computer engineering with 6-8+ years of experience or Should have hands on experience in System Verilog, UVM and Object-Oriented Programming Proven track record in USB / PCIe / CXL / D2D IP verification both on FPGA and ASIC, with ability to bring up testbenches from scratch to defining test plan and sign-off for tape out. Integration and verification of complex System IP features. Work closely with RTL designers and SOC team to scope out integration and verification requirements. Good understanding of any memory protocol like DDR, ONFI, NAND, Flash SPI/QSPI. Proficiency in bus protocols AXI/AHB Proficiency in scripting languages like Perl, Python etc. Strong communication, collaboration, and interpersonal skills Strong analytical and problem-solving skills Preferred Qualifications: Experience in verification of PCIe/CXL based sub-system/SoC/IP. Knowledge of SoC with processor boot-flow. Knowledge of FPGA setup and running FPGA simulations. Experience in GLS is added advantage. Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL protocols. Experience with compliance at the physical and transaction layers for PCIe/CXL endpoints or root ports. Analysing performance metrics of CXL / PCIe / D2D System-level verification experience for PCIe / CXL / D2D Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

About Analog Devices . Position: Staff Engineer, Digital Verification Experience: Minimum 6 years Requirements: Extensive hands-on experience (6+ years) in digital verification using SystemVerilog (SV) and UVM methodology Proven expertise in developing verification plans for complex digital blocks Proficiency in creating testbench environments at IP and/or Subsystem levels Experience in constrained random stimulus generation and coverage closure Competence in Gate-Level Simulation (GLS) setup and debugging Strong debugging skills and analytical problem-solving capabilities Familiarity with ARM-AMBA protocols Advantageous: Experience in formal verification and SystemVerilog Assertions (SV-Assertion) coding Advantageous: Exposure to mixed-signal verification Advantageous: Exposure to Ethernet interface standards Responsibilities: Collaborate with cross-functional teams to review and refine architecture and design specifications Develop comprehensive verification plans for complex digital modules at IP, Subsystem, and SoC levels Design and implement reusable testbench components, including drivers, monitors, and scoreboards using SV-UVM Work closely with design teams to achieve coverage closure Coordinate with silicon test and evaluation teams to develop and deliver test patterns

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Place and Route. Experience1-3 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: Semiconductor Integration. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Design Planning. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Physical Place and Route. Experience3-5 Years.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Function You would be joining a team with deep expertise in designing IP and wireless sub-systems for market leading products. You would work on cutting edge next-generation Wireless PAN technologies (Bluetooth, UWB, Thread, etc.) for connectivity solutions within mobile phones, wearables, IOT and Voice & Music chips. In this role you will be working with the IP designers, Verification engineers, Validation engineers, Firmware and SoC engineers to validate the next generation Bluetooth and other PAN IPs on Qualcomm proprietary as well as industry standard emulation platforms. You will be responsible for taking the IP through the entire FPGA design implementation cycle. You will code the necessary emulation specific RTL needed to exercise the IP. You will be directly responsible for adapting the design for FPGA, come up with the timing constraints, run synthesis, floorplan the design for the target FPGA, run place & route tools and generate bit files. You will work closely with validation and Firmware engineers to instrument test structures for observing and logging signals during debug using ILA/Chipscope, Logic Analyzer, Oscilloscope and other lab equipment. Skills/Experience 8-12 years of hands-on experience in implementing designs on FPGA Strong expertise in RTL coding of complex designs using Verilog/SV Expertise in all aspects of FPGA design; constraint definition, synthesis, floor planning, P&R, Timing closure, bitfile generation Strong proficiency with FPGA EDA toolsSynplify, Vivado, ISE, Chipscope Knowledge of the latest FPGA architectures and partitioning designs across multiple FPGAs Exposure to scripting languages Familiarity with lab equipment Familiarity with interface protocols desired Strong debugging, analytical and written/oral communication skills Minimum Qualifications Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field 8 years of industry experience in Digital Design Preferred Qualifications Exposure to Bluetooth/BLE Technologies and scripting languages like Perl and/or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Function The candidate would be joining a team with deep expertise in designing IP and wireless sub-systems for market leading products. In this role, the candidate would be working on cutting edge next-generation Wireless PAN technologies (Bluetooth, UWB, Thread etc.) for connectivity solutions within mobile phones, wearables, IOT and Voice & Music chips. The candidate would be a part of Bluetooth IP Design team and will be involved in IP and sub-system development. The role requires working on IP & sub-system development, latest technology nodes and on all aspects of the VLSI development cyclearchitecture, micro architecture, RTL design and integration. Close interactions with system architecture, verification, SoC Design, Validation, Synthesis & PD teams are required for design convergence. Skills/Experience 3-6 years of experience in the design of complex ASICs Strong expertise in RTL; coding complex designs using Verilog/SV Exposure to low power design methodology and designs with multiple clock domains Strong debugging, analytical skills and strong communication skills, both verbal and written Hands-on experience in front-end design tools Minimum Qualifications Bachelors or Masters Degree in Engineering in Electronics, VLSI, Communications or related field 3 years of VLSI industry experience in Digital Design Preferred Qualifications Exposure to Bluetooth/BLE Technologies and scripting languages like Perl and/or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Our team here works on the Verification of advanced IP's, HW Accelerators and Subsystem for AI/ML/DL Applications Being part of this team will give you exposure to the design and verification of latest Qualcomm AI/ML/DL IP's/Core Being a part of the DV Team, you will work on Functional , Formal Power aware and Gate level simulation Get to work on the latest and cutting-edge tech nodes Required to work on IP verification and own various DV tasks from Test plan creation, coverage model development, test case writing and coverage closure. Should be proficient in System-Verilog and scripting language like Shell, Perl . Must have RTL/gate level simulation debug experience. Should have a working knowledge of bus protocols like AHB/AXI . Candidates should have 5-8 years experience. Good in SV, UVM, Assertions, GLS Solid knowledge of C and Scipting language like python Working knowledge of bus protocol like AHB/AXI Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Requirements Looking for a highly talented and a technically strong leader with an eye for quality to lead a high performing and talented team of engineers in the implementation domain for Display Sub-System. Able to handle multiple project execution that are time critical and complex Able to communicate effectively with all stakeholders across the organization Able to collaborate with cross functional teams for upholding the best practices and enabling smooth execution Focus on improving execution efficiency and improve on the optimizations in area, power and performance. Able to grow the team in terms of technical depth and size as we do more and more projects Able to innovate and bring fresh ideas Bachelors or masters degree in engineering with 9-13+ Years of experience. Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Responsibilities include Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 13+ Years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5-7 years of experience in SOC Verification. Hands on experience in SOC level test bench and test plan development. Good knowledge of UVM, System Verilog, PSS Knowledge of Amba Protocols such as CHI, ACE. Hands on experience in PCIe, USB4, DDR4/5 Experience in bare metal post silicon Good Communication. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.