320 Silicon Jobs

Confiz is hiring: Senior Software Engineer- React JS & Angular Senior Software Engineer- React JS & Angular We are seeking a skilled Senior Software Engineer- React JS & Angular to join our dynamic team Confiz is looking for candidates with 3+ years of experience: Responsibilities: Responsible for the development, deployment, and maintenance of React JS & Angular web applications Primary focus will be development of web applications and their integration with back-end services Will be working alongside other engineers and developers working on different layers of the infrastructure. Commitment to collaborative problem-solving, sophisticated design, and the creation of quality products is essential. Translate designs, wireframes, and mockups into highly composable code Ensure the performance, quality, and responsiveness of applications Collaborate with a team to define, design, and ship new features Identify and correct bottlenecks and fix bugs Help maintain code quality, organization, and automation Deployments using docker containers Requirements: Must-have: 3+ years of hands-on experience in React JS and related ecosystems (Web pack, Redux, ES6, Flow, Jest) Working experience with Angular 9+ Strong JavaScript concepts and design patterns. Experience with docker and containers Experience working with Rest APIs Experience with performance and memory tuning with tools Experience with NPM/Yarn Experience with a project tracking tool like JIRA Familiarity with UX concepts (Responsive, Mobile first) Proficient understanding of code versioning tools (GIT will be preferred) Familiarity with continuous integration and GitHub pipelines We have an amazing team of 700+ individuals working on highly innovative enterprise projects & products. Our customer base includes Fortune 100 retail and CPG companies, leading store chains, fast-growth fintech, and multiple Silicon Valley startups.

About Marvell . Your Team, Your Impact Marvell innovates in Ethernet switching technology across a broad portfolio of segment-focused product families. Marvell switches power next-generation campus, industrial, 5G, cloud and AI networks. What You Can Expect Develop and document SW features for a software development kit. Deliver SW releases, sample codes, and patches to customers and involved in the SW integration into their platform. Troubleshoot complex software problems (SW API, GUI, SW Tools/Drivers) and recommend corrective action. Closely follow and check customer technical issues, provide remote or on-site troubleshooting. Support customer lab/field trial, able to understand customer application environment and provide insightful advice on customer products. Help/train customer to understand Marvell product architecture and features, promote and demo Marvell products functionalities with Sales and Marketing. Work cross functionality with silicon development, system validation, and marketing team to deliver SW solution. Develop technical collateral material including application notes, user guide/manual, release notes, white papers and other technical documents. Articulate technology and product positioning to both business and technical users. Assist sales team through preparation and delivery of technical presentations and statements of work by matching specific client business requirements with effective technical solutions. Create relationships with key decision makers and serve as external technical spokesperson. Provide customer feedback to executive and development teams to participate in functionality roadmap planning. What Were Looking For Bachelor s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience. Master s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience. Must possess excellent written and verbal communication skills. Be able to present and clearly articulate solutions to customers. Previous experience of working as an Application Engineer or any equivalent Customer interacting role (i. e. ability to handle customers) is a must. 5-10 years of experience in networking, with a focus on AI infrastructure. 5 - 10 years of experience in customer-facing roles, providing technical support and solutions. Preferred Qualifications: Experience with switch driver development and community software such as SAI/Sonic. Proficiency in developing and debugging device drivers and silicon. Understanding of system-level switch and hardware requirements. Familiarity with networking protocols and VLSI design. Strong leadership and communication skills, with the ability to inspire and guide teams. Working with internal and external customer teams. Wide knowledge in code review, debug, and preparing patches. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

Performance Benchmarking Lead Job Description We are seeking an experienced engineer to lead Performance Benchmarking of RISC-V CPUs. This position requires a candidate with knowledge and interest in performance benchmarking, computer architecture, and experience working on pre- and post-silicon platforms. The candidate will contribute to the advancement of MIPS high-performance designs through their benchmarking and analysis work, as part of the MIPS Performance and Architecture team. Responsibilities Provide Technical Leadership to a team of Performance Benchmarking engineers. Create and maintain the infrastructure to carry out benchmarking on RTL Simulation, FPGA and Silicon. Carry out Competitive Analysis and Research industry trends. Analyze and debug performance issues. Work closely with Product and Design teams to help improve performance of MIPS products. Ideal Candidate Profile Strong Background in Performance Benchmarking and CPU Microarchitecture. Familiarity with industry standard benchmarks including SPEC, Lat-mem, Stream. Background in programming - C, Python. Hands-on experience working with FPGAs, Boards, Linux. Hands-on experience setting up and improving automation frameworks. Prior experience in leading teams. Plus Familiarity with microarchitecture constructs - for e.g. TLBs and caches. Experience with RISC-V and,or MIPS CPU architecture. Linux Kernel experience. Compiler toolchain experience.

Grow with us We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrows mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport - to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we dont just follow industry trends we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, youll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, youll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What We Offer: Creative Freedom: Immerse yourself in an environment that champions innovation and critical thinking. Youll have the opportunity to explore advanced design technologies alongside skilled experts. Global Impact: Contribute to projects with far-reaching impacts, transforming industries, advancing digital economies, and enhancing communication worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you excel professionally without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. What you will do Key Responsibilities: Develop ASIC IP blocks and subsystems, contributing to the advancement of 5G and 6G communication technology. Take full ownership of a design, whether at the block or subsystem level. Generate comprehensive documentation throughout the design lifecycle. Perform digital design and conduct all RTL sign-off checks. Continuously enhance and optimize design methodologies and processes. Collaborate with IP Architects to break down requirements and create detailed IP architecture and design specifications. Work closely with verification engineers to review and refine verification plans. Build competence in the technical domain. Engage in cross-team collaboration to ensure successful project delivery. Required Qualifications: Bachelor s degree in electrical or computer engineering. 5+ years industry experience in ASIC design. Additional experience will allow placement at higher job levels. Strong Experience in/with: Understanding of ASIC technology, design environments, and methodologies. SystemVerilog RTL static sign-off tools such as SpyGlass. Scripting languages like TCL, Python, or similar. SystemVerilog Assertions. The skills you bring Additional Requirements: Experience with Cadence and Synopsys front-end and middle-end design suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Expertise in low-power design, including specifying power intent using UPF or similar standards. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience designing one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Primary country and city: India (IN) || Bangalore Req ID: 768630

Minimum qualifications:. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.. 3 years of experience with functional tests for silicon validation (e.g., C, C++ or Python) or developing embedded software.. Experience in silicon bring up, functional validation, characterizing, and qualifying silicon.. Experience with board schematics, layout, and debug methodologies using lab equipment.. Preferred qualifications:. Experience in hardware/software integration (i.e. pre-silicon use of emulation and software-based test and diagnostics development).. Experience in scripting languages, such as Python for Automation development.. Experience with Power Characterization, PCIe, DDR.. Experience in RTL design, verification or emulation.. Knowledge of SoC architecture, including boot flows.. About the jobIn this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.. In this role, you will be responsible for post-silicon validation of the Cloud TPU projects. You will create test plans and test content for exercising the various subsystems in the AI/ML SoC, verify the content on pre-silicon platforms, execute the tests on post-silicon platforms, and triage and debug issues. You will work closely with engineers from architecture, design, design verification, and software/firmware teams. You will be validating the functional, power, performance, and electrical characteristics of the Cloud Tensor Processing Unit (TPU) silicon to help deliver quality designs for next generation data center accelerators.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.. Responsibilities. Develop and execute tests in post-silicon validation and on HW emulators and assist in bring-up processes from prototyping through post-silicon validation.. Drive debugging and investigation efforts to root-cause cross-functional issues. This includes pre-silicon prototyping platforms as well as post-silicon bring up and production.. Ensure validation provides necessary functional coverage for confident design.. Help operate and maintain our hardware emulation platform for pre-silicon integration and validation.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Minimum qualifications:. Bachelor’s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.. 15 years of experience in ASIC RTL design.. Experience with RTL design using Verilog/System Verilog and microarchitecture.. Experience with ARM-based SoCs, interconnects and ASIC methodology.. Preferred qualifications:. Master’s degree in Electrical Engineering or Computer Engineering.. Experience driving multi-generational roadmap for IP development.. Experience leading interconnect IP design team for low power SoCs.. About The Job. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.. Responsibilities. Lead a team of people to deliver fabric interconnect design.. Develop and refine RTL design to aim power, performance, area, and timing goals.. Define details such as interface protocol, block diagram, data flow, pipelines, etc.. Oversee RTL development, debug functional/performance simulations.. Communicate and work with multi-disciplined and multi-site teams.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Minimum qualifications:. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.. 5 years of experience in architecture, hardware, digital design, and software co-design. 3 years of experience in Verilog/SystemVerilog.. Experience in computer architecture and digital design or Internet Protocol (IP) integration (e.g., Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR) memory).. Preferred qualifications:. Master's degree in Electrical Engineering, Computer Science, or a related field.. 4 years of experience working on Field Programmable Gate Array (FPGA) platforms or Emulation platforms with Internet Protocols (IPs) (e.g., Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR) memory, Gigabit Ethernet, Flash).. Experience in developing architectures for Machine Learning Accelerators.. Experience in writing or debugging Verilog/Register-Transfer Level (RTL) code for ASIC/FPGA designs, waveform debug skills with knowledge of chip design flows.. About the jobIn this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.. In this role, you will integrate hardware and software stacks and operate them on emulation platforms for pre-silicon validation of our Google Cloud Tensor Processing Unit (TPU) projects. You will create software-based custom test cases, workloads, test generators, infrastructure, analysis tools, and debugging tools. You will be responsible for silicon bring-up, validation, characterization and qualification, and sustaining programs and their quality. You will help ensure our fleet runs at maximum efficiency, and help debug and root when causing issues. You will collaborate with Product Firmware, System Software and Application-Specific Integrated Circuit (ASIC) Design in the development of tools, validation firmware, functional and performance tests, and testing infrastructure for our platforms and Google Cloud data center systems.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.. We prioritize security, efficiency, and reliability across everything we do from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.. Responsibilities. Enable bring-up of chip features through firmware and driver stack. Integrate and validate hardware and software designs in pre-silicon.. Architect and design Application-Specific Integrated Circuit (ASIC) models for Emulation/Field Programmable Gate Array (FPGA) Prototypes. Design Register-Transfer Level (RTL) transformations to optimize mapping to Emulation/FPGA platforms and design solutions to improve Internet Protocol (IP) modeling.. Design solutions to improve hardware modeling accuracy and scale to various system configurations and enable serving of ASIC models for software and validation teams.. Bringup chip features on software reference models and hardware prototypes (e.g., Emulation/FPGA) and drive debug discussions with design/design validation/physical design/software/architecture teams and help root-cause failures.. Develop the integration plan with software and system partners, coordinate hardware and software delivery and benchmark performance.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Minimum qualifications:. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.. 5 years of experience in High Bandwidth Memory/Double Data Rate (HBM/DDR).. Experience in silicon bringup, functional validation, characterizing, and qualification.. Experience with board schematics, layout, and debug methodologies with using lab equipment.. Preferred qualifications:. Experience in hardware emulation with hardware/software integration.. Experience in coding (e.g., Python) for automation development.. Experience in Register-Transfer Level (RTL) design, verification or emulation.. Knowledge of SoC architecture including boot flows.. Knowledge of HBM/DDR standards.. About the jobIn this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.. In this role, you will be responsible for post-silicon validation of the Cloud Tensor Processing Unit (TPU) projects. You will create test plans and test content for exercising the various subsystems in the Artificial Intelligence/Machine Learning (AI/ML) System on a Chip (SoC), verify the content on pre-silicon platforms, execute the tests on post-silicon platforms, and triage and debug issues. You will work with engineers from architecture, design, design verification, and software/firmware teams. You will be validating the functional, power, performance, and electrical characteristics of the Cloud Tensor Processing Unit (TPU) silicon to help deliver high-quality designs for next generation data center accelerators.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.. We prioritize security, efficiency, and reliability across everything we do from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.. Responsibilities. Develop and execute tests for memory controller High Bandwidth Memory (HBM) post-silicon validation and on hardware emulators and assist in bring-up processes from prototyping through post-silicon validation.. Drive debugging and investigation efforts to root-cause, cross-functional issues. This includes pre-silicon prototyping platforms as well as post-silicon bringup and production.. Ensure validation provides necessary functional coverage for skilled design.. Help operate and maintain our hardware emulation platform for pre-silicon integration and validation.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor , you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The V erification Engineering team furthers and encourages continuous technical innovation to showcase successes as we'll as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ time zone s . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: we'll versed with timing signoff methodology and corner definitions Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Requires a mix of SDC knowledge, EDA timing tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts) Responsible for Timing closure of one or multiple sub chip/subsystem OR Full chip. Ensuring block/SS level Interface timing closure along DRV closure Generating timing ECO using tools DMSA/Tweaker and leading subsystem/Subchip/FC timing closure PREFERRED EXPERIENCE: 3+ years of experience for timing closure of block/SS Experience with analyzing the timing reports and identifying both the design and constraints related issues. Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail, Tweaker etc Experience in timing closure of high frequency blocks & subsystems (> Ghz range ) Strong Understanding of DFT modes requirements for timing signoff Good understanding of physical design flow and ECO implementation. Strong understanding of SDC constraints, OCV,AOCV,POCV analysis. Strong TCL/scripting knowledge is mandatory. Good understanding of SDC construct ( clock generation , false path , multi cycle paths..) ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

About Tekion: Positively disrupting an industry that has not seen any innovation in over 50 years, Tekion has challenged the paradigm with the first and fastest cloud-native automotive platform that includes the revolutionary Automotive Retail Cloud (ARC) for retailers, Automotive Enterprise Cloud (AEC) for manufacturers and other large automotive enterprises and Automotive Partner Cloud (APC) for technology and industry partners. Tekion connects the entire spectrum of the automotive retail ecosystem through one seamless platform. The transformative platform uses cutting-edge technology, big data, machine learning, and AI to seamlessly bring together OEMs, retailers/dealers and consumers. With its highly configurable integration and greater customer engagement capabilities, Tekion is enabling the best automotive retail experiences ever. Tekion employs close to 3,000 people across North America, Asia and Europe. Job Description: We are looking for a data-driven and customer-obsessed Product Engagement Specialist to join our Product Solutions Marketing team. In this role, you ll own the strategy and execution of in-app engagement initiatives using Pendo to drive user activation, product adoption, and long-term retention. You ll collaborate closely with Product, UX, Engineering, and Customer teams to shape a best-in-class user experience through analytics,segmentation, and targeted in-app messaging. Key Responsibilities: Define, implement, and manage tagging strategies and analytics frameworks in Pendo to measure user behavior, feature adoption, and product engagement. Build and maintain real-time dashboards to surface insights for key stakeholders across Product, Marketing, Partner Success, and Leadership. Design, deploy, and optimize in-app experiences including onboarding flows, walkthroughs, tooltips, and announcements that enhance user understanding and value realization. Partner cross-functionally with Product Managers, Product Marketing,UX Designers, and Engineers to embed Pendo analytics into the product development lifecycle. Conduct regular audits of tags and guides to ensure data accuracy and maintain high usability standards. Establish and maintain governance standards, documentation, and best practices for Pendo usage across the organization. Support segmentation, targeting strategies, and A/B testing to deliver personalized user experiences and measure impact. Translate behavioral data and customer insights into actionable recommendations to improve product usability and customer satisfaction. Skills and Experience 3+ years of experience in product engagement, digital adoption, or customer success roles using platforms like Pendo, WalkMe, Appcues,or Gainsight PX. Strong understanding of SaaS business models and user behavior analytics, preferably in a B2B or enterprise setting. Demonstrated ability to work cross-functionally and influence without authority across Product, Marketing, and Engineering teams. Familiarity with behavioral segmentation, user journey mapping, and digital experimentation (e.g., A/B testing). Clear, confident communication skills with the ability to turn complex data into compelling, actionable insights. Experience with tools such as JIRA, Confluence, or other product collaboration platforms. Basic understanding of HTML/CSS/JavaScript is a plus Preferred Skills: Experience implementing or governing large-scale digital adoption platforms across multiple product teams. Familiarity with customer lifecycle metrics and KPIs (e.g., activation rate, time to value, retention). Strong organizational skills and attention to detail when managing large sets of tags, segments, and guides. A passion for improving the user experience and making products easier to understand and use. Perks and Benefits: Competitive compensation Generous stock options Medical insurance coverage Work with some of the brightest minds from Silicon Valley s most dominant and successful Companies

Grow with us About Us: We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrows mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport - to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we dont just follow industry trends we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, youll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, youll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What you will do Creative Freedom: Immerse yourself in an environment that champions innovation and critical thinking. Youll have the opportunity to explore advanced verification technologies alongside skilled experts. Global Impact: Contribute to projects with far-reaching impacts, transforming industries, advancing digital economies, and enhancing communication worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you excel professionally without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. An international work environment with opportunities for professional growth and development. A collaborative and inclusive culture that values diversity and innovation. A competitive compensation and benefits package. Key Responsibilities: Take part of the verification of designs, whether at the block or subsystem level. Participate in defining and implementing UVM-based test environments. Support the creation of Verification Strategies and contribute to the development and execution of Verification Plans. Develop, run, and debug test cases to ensure design quality under supervision. Contribute to the improvement and optimization of verification methodologies. Generate documentation throughout the verification lifecycle. Collaborate closely with other verifiers, designers, and architects. Build competence in the technical domain. Engage in cross-team collaboration to ensure successful project delivery. Required Qualifications: Bachelor s degree in electrical or computer engineering. 5+ years industry experience in verification using SystemVerilog and UVM. Additional experience will allow placement at higher job levels. Strong experience in / with: development of verification test plans and create directed/randomized test cases. formal verification. in implementing scoreboards, checkers, bus functional models in existing testbench environment. SystemVerilog Assertions. Additional Requirements: Experience with Cadence or Synopsys verification suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Experience in low-power design verification. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience in verification in one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Why join Ericsson? What happens once you apply? Primary country and city: India (IN) || Bangalore Req ID: 768626

As a MTS - NAND Design Enablement in Process Integration, primary responsibility is to drive and contribute to next generation 3D NAND development efforts. You will be working with several peer groups to define, complete, and coordinate effective actions to enable a node and shepherd it to production. Responsibilities include but are not limited to the following: Drive vertical integration with a network of collaborators varying from Business Units, Pathfinding, Design, Device, Process, Integration, Reliability, Product Engineering, Probe, Test, Assembly, mask tech, etc Drive node health tracking, communication and documentation of key achievements delivery starting from project kick off till product qual. Ensure all node enabling teams have responsible owner for each node Collaborate with responsible owner to populate crystal clear specifications in the database Publish score cards of work from accountable owner in the health report Create timeline charts to provide clear visibility of project timelines and relative dependencies across node enabling teams Champion test structure definition for all designs within a node starting from test chip to final production design Aim for high quality proliferation of test structures from test chip to product designs. Responsible for requesting TCAD, structure, OPC, electrical and Reliability simulations Ensure all test structures are validated on silicon and are readily available for product debug Qualifications: Minimum of 10+ years of experience in semiconductor industry in the areas Process Integration, Device Engineering, Compact Modeling, Product Engineering, Test Structure Development, or Unit Process Development Project management experience with a highly collaborative personality Proven track record of coordinating high level roll up meetings Proven track record to think and communicate clearly in urgent and stressful situations In depth understanding of the 3D NAND process flow is a plus

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. THE PERSON: A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Work with PD team on subsystem and block level physical verification and signoff Work closely with physical design implementation and signoff team to achieve faster TAT Work closely with CAD team to come up with new flows and methodologies in the physical verification domain PREFERRED SKILLSET: 3+ years of relevant experience Sound knowledge of physical verification and design flows Hands on experience on industry standard tools such as Calibre and ICV Sound understanding for DRC/LVS decks. Should be able to make updates as required. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

CometChat OverviewOur mission: Fuel customer growth through meaningful user-to-user engagement.CometChat is an all-in-one communication platform that enables businesses to easily integrate customized ... CometChat Overview Our mission: Fuel customer growth through meaningful user-to-user engagement. CometChat is an all-in-one communication platform that enables businesses to easily integrate customized in-app messaging functionalities across text, voice, and video. This eliminates the need for businesses to start building a messaging module from scratch, and enables their end-users to communicate with each other, resulting in a unified customer experience, increased engagement and retention, and revenue growth. With CometChats ready-to-use UI kits and powerful SDKs, product teams across start-ups and enterprises alike can easily roll out a feature-rich, scalable, and secure user to user communication module. Our company has seen rapid growth, thanks to several market validations, including our participation in Techstars Boulder Accelerator in 2019, followed by investments from experienced investors such as iSeed Ventures, Range Ventures, Silicon Badia, noncapital, and Matchstick Ventures. CometChat raised a Series A round from Signal Peak Ventures. Beyond the market validation, we are fueled by real customer validation serving over 50K customers across the globe in several verticals ranging from dating apps, telehealth apps, and internet marketplaces to thriving global communities. With solid financials, strong organic growth, and increasing demand for in-app communication platforms, we are in an exciting rapid-scale phase. A global business from the start, we have 100+ team members across our Denver, Salt Lake, Mumbai, and Chennai offices. We are proud of our team and are always looking to expand our tribe! CometChat s Mission Fuel customer growth through meaningful user to user engagement. CometChat s Products CometChat offers a robust suite of cloud hosted text, voice and video options that meet businesses where they are whether they need drag and drop plugins that can be ready within 30 minutes or if they want more advanced features and can invest development resources to launch the experience that will best serve their users. We re actively expanding our platform to include and enhance AI-driven capabilities like onboarding assistants, real-time content moderation, and AI Agents that enhance user safety, guidance, and engagement. Our new Visual Builder enables teams to go from idea to live product faster than ever with minimal lines of code. Together, these innovations are shaping the next generation of in-app communication. Quickly build a reliable & full featured chat experience into any mobile or web app Fully customizable SDKs and API designed to help companies ship faster At every step, CometChat helps customers solve complex infrastructure, performance and security challenges, regardless of the platform. But there is so much more! With over 20 ready to use extensions, customers can build an experience and get the data, analysis and insights they need to drive their business forward. CometChat s solutions are perfect for every kind of user to user chat (groups & 1:1) including: Social community Allowing people in online communities to interact without moving the conversation to another platform Marketplace Enabling communications between buyers and sellers Events Bringing thousands of users together to interact without diminishing the quality of the experience Telemedicine Making connections between patients and providers more accessible Dating Keeping people engaged while they connect with one another And more! Collaborate closely with our product and engineering teams to deliver AI-powered Onboarding , Moderation , and AI Agent Experiences that redefine user-to-user interactions. You will help craft the building blocks for a platform where AI becomes a native part of the conversation/platform. CometChat is committed to fostering a culture of innovation & collaboration. Our people are our strength so we respect and nurture their individual talent and potential. Join us if you are looking to be a part of a high growth team! Position Overview & Priorities We are seeking a skilled React.js Developer to join our dynamic team to lead the development of our UI Kit built on the React framework. As a React Developer at CometChat, you will be instrumental in crafting high-quality, reusable, and scalable UI components that will integrate seamlessly into our client projects. This role involves extensive coding and requires a deep understanding of the React ecosystem, proactive problem-solving skills, and a keen eye for design. Primary responsibility would be: Actively engage in a hands-on, development-heavy role that involves extensive coding using React.js and other related technologies. Develop and maintain the CometChat UI Kit using React.js, ensuring it is scalable, responsive, and accessible. Collaborate with the design team to implement modern web designs into functional and reusable components. Optimise UI components for maximum performance across a vast array of web-capable devices and browsers. Write clean, maintainable, and efficient code that adheres to industry best practices. Participate in code reviews and provide constructive feedback to team members. Work closely with the product management team to understand end-user requirements and translate them into pragmatic and effective technical solutions. Stay up-to-date with emerging trends and advancements in React.js development, proposing and implementing new technologies or methodologies that will enhance our product offerings. Provide technical leadership and mentorship to junior developers, fostering a collaborative and inclusive team environment. Work Location In Office, Chembur, Mumbai Prioritized Experiences and Capabilities 3+ years of proven experience in React.js development, with a deep understanding of hooks and lifecycle methods in React. Strong understanding of JavaScript ES6+, HTML5, and CSS3. Experience with state management patterns and solutions (e.g., Redux, Context API) Familiarity with modern front-end build pipelines and tools such as Webpack, Create React App, and Git. Experience with responsive and adaptive design principles. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Good to have Experience with TypeScript. Prior experience working on commercial UI kits or frameworks. Experience in writing robust unit tests and test cases. A portfolio of UI/UX design work for both web and mobile platforms.. Knowledge of RESTful APIs and real-time technologies (e.g., WebSockets). Bachelor s degree in Computer Science, a related technical field, or equivalent practical experience. Here are the values that act as a guardrail of our execution culture: Go above and beyond for the customer: We are obsessed with ensuring every customer is taken care of, no matter how big or small they are. We truly believe their problems are our problems, and will stop at next to nothing to see them succeed. Be relentless: Never stop innovating. Be relentless in trying new things, and improving our product. Challenge the status quo, embrace learning curves, and don t be afraid to fail. Focus on the outcome and everything else will fall into place. Be curious: Practice empathy. Anticipate customer needs, and solve them before they get there. If you don t understand something, ask questions and learn. Have fun: Laugh. Be positive and kind. Make people feel good. Life is too short to not spend time doing what you love with folks you enjoy being around. Interview Process Our goal is to make sure you have the chance to get to know CometChat as we learn more about you. Through a series of conversations with CometChat s founders and key stakeholders, we ll want to learn more about your strategic and functional expertise, and your passion. We hope that you ll bring questions and ideas to each conversation and suggest ways that we can get to know you and your capabilities better. You have errors in applying Social Network and Web Links Provide us with links to see some of your work (Git/ Dribble/ Behance/ Pinterest/ Blog/ Medium)

Grow with us About Us: We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrows mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport - to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we dont just follow industry trends we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, youll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, youll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What you will do Creative Freedom: Immerse yourself in an environment that champions innovation and critical thinking. Youll have the opportunity to explore advanced verification technologies alongside skilled experts. Global Impact: Contribute to projects with far-reaching impacts, transforming industries, advancing digital economies, and enhancing communication worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you excel professionally without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. An international work environment with opportunities for professional growth and development. A collaborative and inclusive culture that values diversity and innovation. A competitive compensation and benefits package. Key Responsibilities: Take part of the verification of designs, whether at the block or subsystem level. Participate in defining and implementing UVM-based test environments. Support the creation of Verification Strategies and contribute to the development and execution of Verification Plans. Develop, run, and debug test cases to ensure design quality under supervision. Contribute to the improvement and optimization of verification methodologies. Generate documentation throughout the verification lifecycle. Collaborate closely with other verifiers, designers, and architects. Build competence in the technical domain. Engage in cross-team collaboration to ensure successful project delivery. Required Qualifications: Bachelor s degree in electrical or computer engineering. 5+ years industry experience in verification using SystemVerilog and UVM. Additional experience will allow placement at higher job levels. Strong experience in / with: development of verification test plans and create directed/randomized test cases. formal verification. in implementing scoreboards, checkers, bus functional models in existing testbench environment. SystemVerilog Assertions. Additional Requirements: Experience with Cadence or Synopsys verification suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Experience in low-power design verification. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience in verification in one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Primary country and city: India (IN) || Bangalore Req ID: 768626

About Us: Silcosys Solutions Private Limited is a pioneer in semiconductor innovation, committed to delivering cutting-edge analog design solutions that power the future of technology. If you are eager to work on impactful projects and advance your expertise, we invite you to join our dynamic team. Job Description: Are you an Analog Design Engineer with hands-on experience designing components like Bandgap references, High-Speed IO circuits, Low Dropout Regulators (LDOs), and Phase-Locked Loops (PLLs)? If you have a minimum of 2 years in the semiconductor industry, this role offers exciting challenges and opportunities to contribute to groundbreaking projects. Responsibilities: 1. Collaborate with multidisciplinary teams to ensure seamless integration of analog blocks into semiconductor products. 2. Design, simulate, and validate analog circuits, focusing on PLLs, LDOs, Bandgap references, and High-Speed IO circuits. 3. Perform detailed analysis, optimization, and troubleshooting to meet performance, efficiency, and reliability targets. 4. Stay informed about emerging trends and advancements in analog design and apply innovative solutions. 5. Develop and maintain comprehensive documentation to support design processes and product development. Requirements: 1. A Bachelors degree or higher in Electrical Engineering or a related field. 2. At least 2 years of experience in analog circuit design within the semiconductor industry. 3. Expertise in designing analog components such as Bandgap references, PLLs, LDOs, and High-Speed IO circuits. 4. Proficiency with industry-standard Electronic Design Automation (EDA) tools for design and simulation. 5. Strong analytical, troubleshooting, and problem-solving skills. 6. A solid understanding of semiconductor fabrication processes and technologies. 7. Excellent communication and collaboration skills. Preferred Qualifications: 1. Experience in mixed-signal circuit design and low-power techniques. 2. Familiarity with high-speed data communication interfaces. 3. Contributions to published research or patents in analog design. 4. A strong understanding of innovative methods to optimize performance and efficiency. Why Join Us? Work on industry-leading projects that make a global impact. Collaborate with a team of experts in a supportive and innovative work environment. How to Apply: If this role excites you, submit your updated resume at info@silcosys.com and any relevant project portfolios today. Join Silcosys Solutions Private Limited and shape the future of analog design!

Arm has built the worlds most pervasive compute architecture, and weve led many of the technology revolutions that impact the day-to-day lives of people everywhere The Future of Infrastructure is Built on Arm Now we are building new software teams to take us to the next level Technology built on Arm is all around us, from industrial and automotive applications, to the IoT, to the desktop and data center ?Wherever Computing Happens, we need to enable Arm by providing software solutions that interface higher-level software stacks with the hardware itself, Job Overview Arm is seeking skilled, experienced, and highly motivated Software QA expert to join our Software Engineering group As a member of the System Solutions team, you will have the opportunity to enable the evolution of Computing Infrastructure using Arm Neoverse Compute Subsystems You will be working with a distributed team spread across multiple locations Your primary responsibilities will include ensuring firmware developed for Arm Neoverse CSS platforms is product ready, Responsibilities You will be responsible for building automated test solutions to deliver production quality firmware together with established teams working on open-source software stack for server platforms You will be able to develop test cases and test infrastructure for validating firmware to both Arm internal and customer specified test specifications across various test categories Compliance, Stress, Accelerated life, Strife, Reliability, Performance, and robustness You will play a key role in developing and using appropriate tooling options for different types of testing and contribute to development of CI pipelines, Are you are looking for a unique opportunity to be part of a Firmware QA team transforming computing infrastructure landscapeWe would like to hear from you! Required Skills And Experience Proven experience in Quality Assurance and Test automation of product quality system software, preferably for server ecosystem, Hands on experience of test code development and automation for firmware or system software Excellent programming skills in C, Python and Bash scripts are required, System validation experience of platforms utilizing UEFI and ACPI for technologies such as RAS, Virtualization, Power Management, PCI-E and CXL, Both pre-silicon and post-silicon validation expertise, Verification and Validation of embedded software release candidates and releases, Good understanding of computer architecture, micro architecture concepts ideally for the Arm architecture, ?nice To Have? Skills And Experience Experience in validation of production quality firmware in server segment, Exposure to static and dynamic code analysis tools, Familiarity with Arm SystemReady SR Compliance Program Experience with Security Development Lifecycle (SDL) practices, Mentoring and line management experience Familiarity with open-source projects such as Linux Kernel, TF-A, EDK II and OpenBMC, IN RETURN Arm Neoverse is the foundation for the next era of digital infrastructure This role provides an outstanding opportunity to develop and contribute to the success of Arm Neoverse CSS based solutions, Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues We are a diverse organization of resolute and innovative individuals, and do not discriminate based on any characteristic, Accommodations at Arm At Arm, we want to build extraordinary teams If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm, To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility Please email us about anything we can do to accommodate you during the recruitment process, Hybrid Working at Arm Arms approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the teams needs Details of what this means for each role will be shared upon application In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution Please talk to us to find out more about what this could look like for you, Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues We are a diverse organization of dedicated and innovative individuals, and dont discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran,

Sodexo Food Solutions India Pvt. Ltd. is looking for Carpenter to join our dynamic team and embark on a rewarding career journey Measurement and Planning: Measure and plan the layout and design of structures or components to ensure precision and accuracy in construction Cutting and Shaping: Cut and shape wood, metal, or other materials using hand and power tools like saws, chisels, and routers Assembly: Assemble and join pieces of wood or materials using screws, nails, adhesives, and other fastening methods to create structures, such as furniture, cabinets, or buildings Installation: Install doors, windows, moldings, cabinets, and other fixtures in homes, offices, and construction projects Framing: Build structural frameworks and frames for buildings, including wall framing, roof trusses, and floor systems

As one of the technology industrys most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIAs innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for developing test methodologies of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive board design requirements, FW/SW design requirements to characterize the silicon Create methodologies for deployment of features into products. Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. Training and mentoring highly motivated engineers to solve complex challenges What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 8+ years of experience in silicon bring-up, validation, and productization. Experience with control systems, power/thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management Proficiency in Python, Perl or C programming languages is a plus Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If youre a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid

As one of the technology industrys most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIAs innovation is fueled by its great technology and amazing people. We seek a Senior Power and Thermal Engineer to join our dynamic and fast-paced Silicon Solution Group. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working, and creative individual to architect and productize next generation power and performance controllers. What You Will Be Doing: Responsible for developing test methodologies of next generation power and thermal management features and solutions working with multi-functional teams across the company. Drive board design requirements, FW/SW design requirements to characterize the silicon Develop automations and enhancements to improve characterization efficiency and robustness Create methodologies for deployment of features into products. Work alongside system architects, designers, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market. What We Need to See: B. Tech or M. Tech in Electronics Engineering, Computer Science, or related field (or equivalent experience) 5+ years of experience in silicon bring-up, validation, and productization. Experience with power and thermal controllers and management. Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management is a plus Proficiency in Python, Perl or C programming languages. Self-starter with strong skills in multi-tasking, influencing, communication, presentation, and consensus-building Enthusiastic, responsive, and keen on process improvement With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If youre a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal-opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-Hybrid

PMTS SILICON DESIGN ENGINEER THE ROLE: We are seeking a seasoned SoC DFT Design Lead with expertise or significant interest in DFT Architecture. You have had significant success driving DFT Architecture, Design for DFT, Scan/ATPG with high coverage goals, with high focus on quality pattern delivery as "First Time Right". You are meticulous about Tester Time, DFT mode Power, and high performance achievement in DFT modes. THE PERSON: You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Implement or define micro achitecture for DFT, working with functional architects and product DFT Architect, drive technical specifications and provide technical direction to execution teams Work cross with IP and Post Silicon Engineering teams, make sure to define right DFT design as First Time Right. Knowledge sharing and other contributions to ATE and Silicon Testing Teams As an overall DFT owner, responsible for post silicon debug (if any) making sure to provide right solutions for fixing the issues/provide work arounds while bringing up the silicon on Tester Work closely with Design teams for Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Signoff of patterns to ATE teams ACADEMIC CREDENTIALS: Bachelor s or Master s degree in related discipline preferred #LI-PK2 Benefits offered are described: AMD benefits at a glance .

Seeking a Senior Materials Engineer to leverage expertise in developing innovative solutions for next-generation materials for electrification, sustainability, and turbocharger materials. Roles and Responsibilities: A highly motivated and experienced materials engineer with a strong background in research and development of magnetic materials, physical and mechanical metallurgy, advanced characterization techniques, and simulation skills on thermocalc, Procast & JmatPro. Identify magnetic materials and manufacturing process technology gaps and propose solutions for maturing new technologies with high-performance magnets. Develop proposals and present new ideas to soft and hard magnets. Solve problems across the spectrum of innovation, development, and implementation of new material innovation technologies. Coordinate activities with other engineering resources, cross-functional teams, external partners, and the ecosystem to ensure timely completion of project milestones. Actively contribute high-quality IP that has business and technology importance. Participate and present in internal innovation and ideation events. Identify open innovation opportunities with universities and external institutes. Leverage lab equipment for advanced material characterization and microstructural analysis. Provide technical leadership to personnel supporting the assigned project. Document technical data generated by the assigned project consistent with engineering policies and procedures. Education: MTech/PhD in materials science and engineering MTech with 4+ years or PhD of relevant experience in research and development Preferred Skills: Strong knowledge of physical metallurgy, mechanical metallurgy, structure-property correlations, advanced characterization techniques. Exposure to advanced high-performance metals, magnetic materials, and silicon steels. Self-motivated and passionate about bringing own ideas to applications. Networking ability across the organization to understand critical business problems. Strong oral and written communication skills. Good interpersonal skills; flexibility to adapt to persons with different geographical, ethnic, and educational backgrounds. Ability to document, plan and execute programs. Established project management skills while handling multiple projects. Why you should apply? Exposure to New Growth Vectors (NGVs) Part of core materials innovation team

Participation in Domestic & International fairs with complete responsibility and involvement from ideation / conceptualisation to the implementation and closure Market research and identifying new customers globally for Leather Watch straps Required Candidate profile Result Orientation: Focus on desired results and sets and achieves challenging goals. Detailing; Attention to detailing Communication; Listening skills, strong communicator, good in oral and written

The Staff Product Designer, Design System is responsible for developing and governing the company s design system, ensuring product consistency, and improving the efficiency of design and development processes. With expert knowledge in design tokens, this role collaborates closely with designers, developers, product managers, and other stakeholders to create scalable and maintainable design systems that enhance user experience and brand coherence across all digital platforms. Key Responsibilities: Design System Development and Management: Lead the creation and ongoing enhancement of a comprehensive design system, including visual styles, components, patterns, and guidelines. Incorporate design tokens into the design system to ensure a scalable and consistent implementation of design decisions across different platforms and technologies. Collaborate with designers to convert visual designs into a set of standardized design tokens and components. Work closely with developers to integrate design tokens into front-end frameworks and libraries, ensuring seamless adoption and implementation in the codebase. Integrate design systems into AI Development tools and CI/CD pipelines Cross-functional Collaboration: Serve as the primary liaison between the design and engineering teams, facilitating a collaborative approach to design and implementation. Conduct workshops and training sessions for designers and developers on using the design system and understanding the importance of design tokens. Partner with product managers and stakeholders to ensure the design system aligns with business goals and user needs. Governance and Advocacy: Establish and maintain guidelines for using and evolving the design system and design tokens. Advocate for adopting the design system across all projects, promoting consistency and efficiency. Monitor the usage and effectiveness of the design system, collecting feedback and making iterative improvements. Research and Innovation: Stay abreast of the latest trends and technologies in design systems, design tokens, and web standards. Explore and propose innovative solutions for design scalability, performance, and accessibility. Conduct usability tests and other research methods to validate design decisions within the design system. Skills and Experience: bachelors degree in Design, Computer Science, or a related field. 7+ years of experience in digital product design, focusing on design systems and UI/UX design. Deep understanding of design tokens and their role in creating scalable and consistent design systems. Proficiency in design and prototyping tools (eg, Figma) and familiarity with front-end development languages (HTML, CSS, JavaScript). Strong collaboration and communication skills, with the ability to work effectively across different teams and disciplines. Proven track record of leading and managing design system projects from conception to implementation. Knowledge of accessibility standards and best practices in web and mobile design. Preferred Skills: Experience with version control systems (eg, Git) and design token management tools. Familiarity with agile methodologies and experience working in an agile environment. Certification or formal training in design thinking or a related methodology. Perks and Benefits: Competitive compensation Generous stock options Medical insurance coverage Work with some of the brightest minds from Silicon Valley s most dominant and successful companies

Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency power conversion for applications using GaN devices. Job Description Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies , with a particular focus on achieving high-efficiency powerconversion for applications using GaN devices. D esign and verify pre-silicon analog/mixed-signal integrated circuitblocks , including incorporating features for testing and quality assurance, and providing support for top-level integration. Assist in defining the requirements for analog and mixed-signalblocks , aligning them with IP Module architecture, and ensuring compliance with requirements through documentation. Estimate effort and planning design work packages to meet project milestones. Provide essential support to physical design engineers, post-silicon verification, production testing , and other critical activities extending beyond the design phase. You are best equipped for this task if you have: A masters degree in electrical/Electronic Engineering, Physics or equivalent field of studies. Experience in analog and mixed-signal circuit design, particularly in CMOS and Smart Power Technologies. Good Analytical skills and very good understanding of Analog Design. Familiarity with high-efficiency power conversion, such as DC-DC converters, is highly desirable. Experience in pre-silicon verification and with System Verilog would be a plus. Proficiency in computer-aided design tools and methodologies. Excellent problem-solving and communication skills. Ability to work effectively in a collaborative team environment. Detail-oriented with a commitment to quality and precision. Fluency in English