Senior Management / Leadership - Physical Design

THE ROLE: We are seeking a highly experienced and innovative SOC Physical Design Director to lead the development of Server SOC designs and very experienced physical design team . This senior level role is critical for the design development of Server SOC designs products at AMD and is responsible for delivering Server SOCs meeting challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: This role combines strong people leadership and teamwork skills driving cross functional teams across geographies. The person with strong technical expertise, Strong analytical and problem-solving skills working with both executive level technical and management leaders to influence and drive change. KEY RESPONSIBILITIES: Lead and manage a team of engineers focused on SOC Physical Design implementation and Signoff Bring deep knowledge and experience in Physical design & Timing closure and signoff and apply them to large, challenging, leading-edge Server SOC designs to ensure high quality on time delivery. Bring significant experience in effective team management to help mentor, coach and grow the Server SOC Physical Design Team with an emphasis on positive influence on team morale and culture Technically manage different aspects of Physical Design including Full Chip Floor planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off. Collaborate with cross functional teams between Architecture, Product planning, Packaging, IPs, CAD to drive SOC Implementation and PPA improvement. Experience and understanding of flow development and scripting. Strong Technical problem and debugging solving. PREFERRED EXPERIENCE: 20+ years experience in SOC Physical Design Implementation, Signoff and TapeOut Must have prior experience leading Physical Design teams of at least 50+ members Excellent analytical and problem-solving skills along with attention to details. Strong written and verbal communication, Time Management and Presentation Skills. Must be a self-starter, and able to drive independently and efficiently challenging and time critical tasks to on-time completion. Forward looking and dependable leader who proactively identifies and resolves issues and roadblocks before they become bottlenecks or showstopper. Experience in EDA tools for Physical Design and Signoff cycles - Synopsys FusionCompiler, Cadence Innovus, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk. ACADEMIC CREDENTIALS: Bachelor s or Masters degree in Electrical Engineering #LI-SK5 Benefits offered are described: AMD benefits at a glance .