Senior IP / Sub System & SOC Verification Engineer

Job Description

SE NIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC NLP & Power Management): Work on SOC level verification activities, the person will be responsible for bringup of UPF simulation at SOC. Work with testbench team to bringup NLP (UPF) simulation, debug simulation issues. He will be responsible to coordinate with Design team for UPF delivery, work with design (IP, Subsystem, SOC) for quality UPF delivery and resolve issues. He should have good understanding of power architecture and UPF s He will be responsible to create TB collaterals for NLP simulation bringup. THE PERSON: Engineer with strong self-driving ability. Need excellent communication skills (both written and oral) Strong problem-solving skills, go to person for SOC testbench, Power management, UPF, C/C++ Coding, UVM coding, Testcase coding, checkers and assertions. KEY RESPONSIBILITIES: NLP Simulation bringup (Has responsibility of TB, Testcase, coordination between design and dv team) Power verification is key responsibility. Work with power architects to resolve issues seen in simulation. PREFERRED EXPERIENCE: Expertise in IP, Subsystem and SOC Verification with specialization in NLP Simulation. NLP Simulation is must requirement. Strong hands-on experience in different SOC Verification activities, NLP Simulation, Power verification, UVM, System Verilog, X86, C++, HW/SW co-verification, Scripting (phython) Test plan review, Debug/triage, Coverage, Strong Problem Solving, Automation and Debugging Skills, System bus protocol understanding including some of the common IPs like ACE, CHI, AXI, PCIe, DDR, memory controller etc. Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc. Strong understanding of System integration, Make file flow, Verification Methodologies, Boot up sequence. JIRA based project management is a plus. ACADEMIC CREDENTIALS: BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE 5-8 years of strong DV experience in NLP simulation, IP, Sub System & SOC Verification, Power management verification #LI-SR4 Benefits offered are described: AMD benefits at a glance .