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RTL-ASIC Engineer

RTL-ASIC Engineer

Insemi Technology Services

5 - 10 years

8 - 13 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

c++ digital design vhdl smf verilog hdl rtl design fpga modelsim rtl coding debugging perl system verilog tcl architecture synthesis asic sta asic verification cdc c upf rtl timing analysis uvm verilog asic design lint system dft fpga design vlsi

Work Mode

Work from Office

Job Type

Full Time

Job Description

Experienced in rtl design using verilog / system Verilog
Asic designers with experiences in all aspects of rtl design flow from specification/microarchitecture definition to design and verification, timing analysis, dft and implementation
Integration, rtl signoff tools, upf/low power signoff and cdc/rdc, lint
Strong domain knowledge of clocking, system modes. Power management, debug, interconnect, safety, security and other architectures

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