542 Vlsi Jobs

Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 8+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs and leading projects from concept to verification closure. Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required. Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage. We re doing work that matters. Help us solve what others can t. Role: Design Verification Engineer Industry Type: IT Services & Consulting Department: Engineering - Hardware & Networks Employment Type: Full Time, Permanent Role Category: Hardware Education UG: B.Tech/B.E. in Production/Industrial PG: M.Tech in Electronics/Telecommunication Key Skills Design verification VLSI Coding Electronics Manager Technology Test planning System verilog UVM Electricals Principal

Job description At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description GCS AE Job Description Document Job Title: Principal Application Engineer - GCS Location: Bangalore / Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture builds and fosters diversity, equity and inclusion to maximize our ability to innovate, drive growth, and win with our customers.Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Summary As a member of the GCS Organization for the DSG (Digital & Sign-off Group), you will partner withworld-wide Cadence customers to provide post sales technical consultation for digital & sign-off domain products forimplementing cutting-edge designs. This involves working closely with the customers to understand and debug complex issues enabling them to proceed further with design cycle phases, help them leverage the latest tool capabilities, and guide them with implementation of software in their design methodologies. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest design practices in industry and demonstrate expertise by authoring high impact knowledge content. This role also provides opportunity to participate in the evolution of key technology solutions to the most pressing design problems. In this role, you will have the opportunity to work with product teams to identify and prioritize the product improvement initiatives with your timely feedback and observations. This an excellent opportunity to work in a supportive, flexible and friendly work environment that GCS offers, where we are vested in each other s success, and are passionate about technology and innovation. Job Responsibilities Provide technical consultation on the usage of digital & sign-off toolset to Cadence customers with high level of satisfaction Provides a proactive and creative approach to resolving problems using specialized domain knowledge and advanced business experience; obtains feedback on issues/suggestions and brings back to R&D Guides creation and publishing of high quality and impactful knowledge content in DSG domain Provides effective technical leadership and mentoring for a small team working at Cadence or customer facilities to deliver quality results according to schedule requirements Solves highly complex problems and is able to identify viable and often innovative options, and uses analytical skills and judgment to recommend an appropriate solution Qualifications Bachelor s Degree in; Electrical / Electronics / Electronics and Communication / VLSI Engineering with 10 years related experience OR Masters 8 years of related experience OR PhD 8 years of related experience Experience and Technical Skills required > 8 years of experience in Physical design and sign-off tools and/or design methodologies/flows Solid understanding of digital & sign-off tool set in the context of multiple flows; expert level skills on multiple tools; ability to analyze customers environment and evaluate appropriate solutions; able to architect flows; anticipates technical issues and develops creative solutions before they become a problem Must have excellent debugging skills and ability to separate out the critical issues from trivial ones. Behavioral skills required Must possess strong written, verbal and presentation skills Ability to establish a close working relationship with both customer peers and management Explore what s possible to get the job done, including creative use of unconventional solutions Work effectively across functions and geographies Push to raise the bar while always operating with integrity Regards Madhu kmadhup@cadence. com We re doing work that matters. Help us solve what others can t. Role: Head - Engineering Industry Type: IT Services & Consulting Department: Engineering - Software & QA Employment Type: Full Time, Permanent Role Category: Software Development Education UG: Any Graduate PG: Any Postgraduate Key Skills Analytical skills Usage Publishing VLSI Aerospace Manager Technology Technical leadership System design Automotive Physical design

As a Lead ASIC Digital Verification Engineer at Synopsys, you will be part of a dynamic team that drives innovations shaping the way we live and connect in the Era of Pervasive Intelligence. Your role will involve specifying, designing, and implementing cutting-edge verification environments for the DesignWare family of synthesizable cores. You will collaborate closely with RTL designers and a global team of expert verification engineers to ensure high-quality deliverables for IP cores. Engaging in test planning, environment coding, test case debugging, and functional coverage analysis will be key responsibilities to meet quality metric goals. Additionally, managing regression tests and ensuring comprehensive verification coverage will contribute to the reliability and performance of critical IP cores used in a variety of applications. Your impact will extend to contributing to the development of next-generation connectivity protocols for commercial, enterprise, and automotive sectors, driving innovation in verification methodologies, and enhancing the efficiency of the verification process through robust test planning and execution. You will play a crucial role in identifying and resolving complex verification challenges to ensure high-quality product releases while collaborating with diverse teams to deliver cutting-edge technology solutions to the market. To excel in this role, you will need a Bachelors/Masters degree in EE/EC/VLSI with 5-10 years of relevant experience. Your expertise in developing HVL (System Verilog) based test environments, implementing test plans, HVL coding skills, and hands-on experience with industry-standard simulators such as VCS, NC, and MTI will be essential. Knowledge of verification methodologies like VMM/OVM/UVM and familiarity with protocols like MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, and more will also be required. The ideal candidate for this role is proactive, self-motivated, and possesses strong problem-solving skills. Your excellent written and oral communication abilities will be vital in collaborating effectively in a global team environment. Detail-oriented with a focus on quality and accuracy, you should be able to demonstrate high levels of initiative and drive. Joining the R&D Solutions Group at the Noida Design Center, India, as part of the DesignWare IP Verification team, you will play a significant role in verifying state-of-the-art IP cores and delivering high-quality, reliable solutions for various applications. The team's mission is to meet the needs of commercial, enterprise, and automotive domains through innovative technology solutions. Synopsys offers a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.,

Position - Intern Experience- 0-1 Year Location- E-city, Bangalore Description- Collaborate with project leads to assist in project execution and meet deadlines. Support design tasks, including the implementation and verification of digital circuits. Apply VLSI fundamentals in design processes and problem-solving. Work with Verilog for hardware description and simulation of digital circuits. Assist in C programming for embedded systems and firmware development. Write scripts (Python/Shell) to automate tasks like simulation, testing, and data analysis. Contribute to various stages of the VLSI design lifecycle, from concept to testing and validation.

Detailed JD : Should have experience in Python scripting. Experience in VLSI frontend flow knowledge. Should have experience in Linux internals and bash scripting. Good to have: Prior knowledge about EDA tools. Experience in regex and pattern matching. TCL scripting. Verilog.

Detailed JD : Should have experience in Python scripting. Experience in VLSI frontend flow knowledge. Should have experience in Linux internals and bash scripting. Good to have: Prior knowledge about EDA tools. Experience in regex and pattern matching. TCL scripting. Verilog.

Job Title: Electronics Engineer Fresher ???? Employment Type: Full-Time, Permanent ???? Qualification: B.E./B.Tech in Electronics / Electronics & Communication ????????? Experience Level: Fresher Job Summary: We are seeking a motivated and detail-oriented Electronics Engineer Fresher to join our engineering team. In this role, you will be involved in the design, development, testing, and maintenance of electronic systems and devices. You'll work alongside experienced engineers to gain hands-on experience in both hardware and embedded systems development. Key Responsibilities: Assist in designing and testing of electronic circuits and systems Develop and debug PCB layouts and schematics using tools like Altium, Eagle, or KiCad Support in the programming and testing of embedded systems and microcontrollers Conduct diagnostics, troubleshooting, and repairs of electronic devices Participate in prototype development, validation, and testing Prepare and maintain technical documentation, test reports, and manuals Collaborate with cross-functional teams in R&D, production, and quality control Required Technical Skills: ?? Strong understanding of electronic components and circuit design ?? Basic knowledge of embedded systems / microcontrollers (e.g., Arduino, STM32, PIC) ?? Familiarity with C/C++ or Embedded C programming ?? Experience with oscilloscopes, multimeters, and basic testing tools ?? Knowledge of PCB design software (e.g., Altium, Eagle, KiCad) ?? Awareness of safety standards and quality protocols Soft Skills: Strong analytical and problem-solving skills Good verbal and written communication Passion for electronics and innovation Eagerness to learn and adapt to new technologies Ability to work individually and within a team

Job Title: Electronics Engineer Fresher ???? Employment Type: Full-Time, Permanent ???? Qualification: B.E./B.Tech in Electronics / Electronics & Communication ????????? Experience Level: Fresher Job Summary: We are seeking a motivated and detail-oriented Electronics Engineer Fresher to join our engineering team. In this role, you will be involved in the design, development, testing, and maintenance of electronic systems and devices. You'll work alongside experienced engineers to gain hands-on experience in both hardware and embedded systems development. Key Responsibilities: Assist in designing and testing of electronic circuits and systems Develop and debug PCB layouts and schematics using tools like Altium, Eagle, or KiCad Support in the programming and testing of embedded systems and microcontrollers Conduct diagnostics, troubleshooting, and repairs of electronic devices Participate in prototype development, validation, and testing Prepare and maintain technical documentation, test reports, and manuals Collaborate with cross-functional teams in R&D, production, and quality control Required Technical Skills: ?? Strong understanding of electronic components and circuit design ?? Basic knowledge of embedded systems / microcontrollers (e.g., Arduino, STM32, PIC) ?? Familiarity with C/C++ or Embedded C programming ?? Experience with oscilloscopes, multimeters, and basic testing tools ?? Knowledge of PCB design software (e.g., Altium, Eagle, KiCad) ?? Awareness of safety standards and quality protocols Soft Skills: Strong analytical and problem-solving skills Good verbal and written communication Passion for electronics and innovation Eagerness to learn and adapt to new technologies Ability to work individually and within a team

Job description About The Role This position is for an experienced, motivated, and passionate circuit design engineer with expertise in the area of custom circuits memories, SSARF SRAM, Register File, ROM design for GHI CCG SAI Circuits Team. In this position you will be working in a team responsible for delivering high quality designs for graphics projects. You would also be involved in key decisions finalizing the memory architecture that best meets the design requirements of the program, technical readiness involving circuit simulations and responsibility for implementation as well as convergence of the design while meeting high circuit quality. The key responsibilities include ownership of tools, flows, methodologies as well as coming up with innovative design implementations with focus on power and area reduction. The role would require deep understanding of transistor and circuit behavior, strong communication, problem solving skills, time management and multitasking skills. The team members have also an opportunity to diversify their skills into other custom circuits as well as working with the client in integration of the custom circuits. Qualifications Minimum QualificationsMinimum 4-7 years of experience in designing and delivering of SRAM's/RF's/ROM's. Understanding of semiconductor device physics; VLSI Technology and VLSI circuits (analog/digital), Familiarity with spice simulations and Verilog and other tools for design and development of memory IP's like ESPCV, Nanotime, Nova, Totem etc. Knowledge of scripting (PERL/TCL/Python) is desirable, Preferred Educational QualificationsME/Mtech/MS in Microelectronics/VLSI Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Job description Work in a VLSI wireless team. Major subject VLSI, digital circuit, analog circuit. Project done on related topics preferably using CAD tools and familiar to ASIC design flow. Qualifications Degree:ME/M.TECH VLSI design, signal processing and machine learning, communication engineeringSchools: NIT/VIT Role: Physical Design / Layout Engineer Industry Type: Electronic Components / Semiconductors Department: Engineering - Hardware & Networks Employment Type: Full Time, Permanent Role Category: Hardware Education UG: Any Graduate PG: M.Tech in Any Specialization

Job description Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLIPS is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.Candidate will be responsible for logic design and development, responsibilities including but not limited to: Develops the logic design, register transfer level (RTL) coding, and simulation for an IP design. Participates in the definition of microarchitecture features of the block being designed. Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for meet the design specification requirements. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Follows secure development practices to address the security threat model and security objects within the design. Supports SOC to integrate and validate the IP on need basis. Drives quality assurance compliance for smooth IPSoC handoff. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Qualifications : BE/ME/Btech/ Mtech in computer science eng or electronics and Communications. The candidate must possess a minimum of Bachelor Degree in Electronics Engineering, Computer Engineering, Computer Science or equivalent. The candidate should have successful track record of hardware development experience and demonstrated technical leadership skills. The candidate must have demonstrated the ability to solve highly complex technical problems with excellent communication skills. The candidate must also have demonstrated strong ethical standards. Must also be able to perform in a highly ambiguous and dynamic business environment. Skills : Relevant experience with skills in ASIC IP design flows, RTL coding and Globals (Clocking, Boot/ Reset/Fabrics, DfD, Fuse, etc) with experience in CDC, linting, spyglass, micro-architecture. Experience in subsystem design and IO protocols such as AMBA, USB, PCIe, UCIe, UFS, SATA, UART, SPI, I2C, I3C etc is a plus. Other technical requirements: 3 to 8 years of relevant pre-silicon logic design experience in ASIC domain. Experienced with various tools and methodologies including but not limited to: System Verilog, Python/Perl/ Shell scripting, Synopsys tools, RTL model build, design-for-test, design-for-verification. Experienced in EDA tools & flows such as Spyglass VCLINT, VCLP, VC-CDC, SG-DFT, Design Complier, Calibre, Fishtail, FEV, ATPG etc. Experienced in developing micro-architecture based on High Level Architecture specifications. Experienced in VLSI or Structural and Physical design flow and methodology. Experienced in Power-aware design and reviewing validation flows. Strong Chipset or CPU level understanding required on power consumption, power estimation and low power design methods.

Job description Role & responsibilities Performs functional logic verification of a block, subsystem, and SoC related to DCAI flagship AI products to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, micro architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from post silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products. Preferred candidate profile Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 5+ years of technical experience. Related technical experience should be in/with: Silicon Design and/or Validation/Verification. Design/Verification with developing, maintaining, and executing complex IPs and/or SOCs. Design/Verification exposure for Ethernet or PCIe Subsystem involving full protocol stack - Transaction layer, Data Link Layer and PHY Layer Design/verification exposure for Industry standard BUS topologies such as AMBA AXI/AHB/APB , I2C, SPI, JTAG, CoreSight Debug and Trace OVM, UVM, System Verilog, constrained random verification methodologies. The complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure). Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies. Experience in Xeon CPU Pre-Silicon or Post Silicon Validation.

Job description Candidate will be working on runset/ruledeck development across Intel technologies.Coding SVRF/ICV/PEGASUS runest, performing L0QA qualification, managing and analyzing regression.. Candidate will also require to write and execute automation and productivity enhancement scripts in Python/SKILL Qualifications Pursuing Masters degree in Electrical/Electronics/Computer ScienceCandidate must have sound knowledge of VLSI Semiconductor device and electronic circuit fundamentals Designing Implementing circuits and performing the QA for circuit performance Scripting Automation exposure is preferred skillset Candidate must have Good oral and written communication Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Job description Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school. Qualifications Mtech graduate with below skillsHardware : VLSI Design, Custom Layout, ESD verification Software : Python, perl Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Job description ISSP FPGA prototyping delivers Intel's core products, therefore you will have a unique opportunity to take part in major activities that affect the entire organization and the high-tech world.Our FPGA design verification team is in charge of validating infrastructure designs used to prototype cutting edge Intel client, devices and data centers chips.We are looking for great, highly motivated problem-solvers seeking to make significant contributions and impact on the projects they work on.In your role you will plan, design and execute scalable and robust verification environments, learn complex digital computers flows and simulate the behavior of the RTL design in purpose of debug and development using advanced verification methodologies. Qualifications Studying towards a B.Sc. or MSc in Computer Science / Electrical Engineering / Computers Engineeringsome experience with OOP (C++, Java...)some understanding of chip design frontend flow (design/validation/synthesis)any relevant chip design / verification experience is a big advantage

Job description Job Description Responsibilities may be quite diverse of a technical nature US experience and education requirements will vary significantly depending on the unique needs of the job Job assignments are usually for the summer or for short periods during breaks from school Qualifications Mtech graduate with VLSI skill Role: Research & Development - Other Industry Type: Electronic Components / Semiconductors Department: Research & Development Employment Type: Full Time, Permanent Role Category: Research & Development - Other Education UG: B.Tech/B.E. in Any Specialization PG: M.Tech in Any Specialization

Job description Responsibilities may be quite diverse of a technical nature US experience and education requirements will vary significantly depending on the unique needs of the job Job assignments are usually for the summer or for short periods during breaks from school. Qualifications Mtech graduate with VLSI skills.

You will be an integral part of the success of the institute by contributing to a diverse, inclusive, fair, and transparent work environment at IIIT-H. We value the uniqueness of each individual and strive to recognize and respect their differences, fostering a culture that embraces diverse ideas and expertise. Our primary focus is on attracting and retaining top talent and providing them with an environment where they can thrive and excel. Currently, we are looking to fill faculty positions in specific domains such as ECE and CSE, but we are also open to recruiting individuals from other interdisciplinary areas throughout the year. We are seeking highly motivated faculty members of any nationality at the levels of Professor, Associate Professor, and Assistant Professor who are passionate about making a difference through research and teaching. Applicants should hold a Ph.D. with a strong research track record and a commitment to teaching. The core areas of expertise we are particularly interested in include embedded systems, VLSI, digital signal processing, robotics, wireless communications networks, digital electronic circuits for ECE; and computer architecture, systems and networking, algorithms and computational geometry, programming languages and compilers, AI, robotics, software engineering, and information security for CSE. As per MHRD 7th CPC guidelines, we offer competitive remuneration and a range of benefits along with research and student support. To apply, please submit your resume, teaching and research statements, and a cover letter in Word (.doc) or PDF format. Kindly note that scanned resumes and other formats will not be processed by our system.,

Come build community, explore your passions, and do your best work at Microsoft with thousands of University interns from every corner of the world. This opportunity will allow you to bring your aspirations, talent, potential, and excitement for the journey ahead. As a Silicon Engineering Intern, you will design, develop, modify, and evaluate electronic parts, components, or integrated circuitry for digital electronic devices and other digital electronic systems. You will define design architecture and operating parameters for circuitry and microelectronic components, as well as select components and equipment based on analysis of specifications and reliability. Analyzing designs and components to establish operating parameters and performance requirements to define complete pre-silicon verification test cases will be part of your responsibilities. Additionally, you will develop test plans, direct support personnel or other engineers in the preparation and execution of design verification testing, and analyze data generated from test results to perform pre-silicon verification of operating parameters and performance requirements. At Microsoft, Interns work on real-world projects in collaboration with teams across the world while having fun along the way. You'll be empowered to build community, explore your passions, and achieve your goals. This is your chance to bring your solutions and ideas to life while working on cutting-edge technology. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. Responsibilities include contributing to and improving the hardware solutions developed, using performance instrumentation and presenting results to the team and architects, thinking strategically, creatively, and innovating ways to communicate and visualize user experiences, implementing or recommending technical solutions to common quality and design challenges with guidance from others, writing complete design verification test cases, test benches, or automation using standard practices, and assisting in writing tests for formal pre-silicon verification of subsystems within a single block. **Qualifications:** **Required Qualification:** - Currently pursuing a bachelor's degree in Electronics Engineering, Electrical & Electronics, or Computer Science Engineering. **Preferred Qualifications (PQs):** - Experience or classes in Microelectronics/VLSI courses, Digital Logic Design and Simulation, Object-Oriented Programming and Data Structures, Embedded Systems and Firmware. - Knowledge of verification principles, testbenches, UVM, C/C++ and scripting languages, digital timing analysis, synthesis, place-n-route, circuit design including VLSI design and solid-state devices.,

We are looking for experienced subject matter experts to create high-quality educational video lectures for our online learning platform. The candidate should have expertise in their respective domain & ability to deliver informative video content. Required Candidate profile Have industrial experience in subjects: VLSI contact shashank@visualpath.in

We are seeking skilled engineers to join our semiconductor verification and simulation team. This role focuses on functional, gate-level, DFT, and timing simulations, along with validating SoC and IP blocks. Ideal candidates will have hands-on experience with Synopsys EDA tools, and domain-level knowledge of IC packaging and analog layout design will be a strong plus. Roles & Responsibilities: Develop and execute RTL test benches using VCS/SystemVerilog/UVM Perform functional and gate-level simulation, debug with Verdi Run DFT pattern simulations, scan insertion validations Conduct Static Timing Analysis (STA) with PrimeTime Execute power-aware and multi-mode multi-corner (MMMC) simulations Validate interfaces considering IC package parasitic (SiP/2.5D/3D-IC understanding is a plus) Collaborate with teams to correlate package- and board-level effects with chip-level behavior Analyze analog layout impact on mixed-signal simulation accuracy (awareness of layout parasitic) Requirements Strong hands-on experience with Synopsys tools: VCS (RTL simulation), Verdi (debug), PrimeTime (timing), TetraMAX/TestMAX (DFT), HSPICE/FineSim (analog simulation exposure is a plus) Familiarity with IC packaging technologies, chip-package co-simulation, and signal/power integrity considerations Understanding of analog layout practices and their influence on simulation/verification Strong scripting skills (TCL, Perl, Python) for automation Excellent debugging, documentation, and communication skills Preferred Qualifications: Bacheloror Masterin Electronics, VLSI, or Electrical Engineering & 5-8 Years of Relevant Experience is mandatory Awareness of multi-die, chip let, or 3D IC architectures Basic understanding of EM/IR effects, package substrate modeling, or layout vs schematic (LVS) Strong analytical and collaborative mindset Master in VLSI / Microelectronics Benefits -Challenging job within a young and dynamic team. -Performance-driven, Career Progression Opportunities. -Attractive remuneration package: On par with Industry Standards. -Opportunity to join an organization experiencing year on year growth.

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

•BE/B.Tech in ECE /M.Tech in VLSI with 6 to 9 years experience in Analog Mixed Signal Verification •Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks •Very Good experience in Analog Mixed Signal verification simulation tools •Good experience in System Verilog, UVM methodologies •Able to train the team members and guide them to the solutions for problems •Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch. •Good experience in Gate level netlist simulation •Experience in Python, Perl, Shell scripting is added advantage. •Good communication and documentation skills

This position offers a great opportunity for you to pursue a Ph.D. at SRM University. The ideal candidate should hold an M.Tech degree in VLSI. For further details, please contact 9790667033.,

Alternate Job Titles: Senior R&D Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a passionate and driven engineering professional with a strong foundation in VLSI concepts, CMOS circuit design, and EDA tools With2-3 years of hands-on experience in the semiconductor industry, you thrive in dynamic environments where innovation, collaboration, and continuous learning are valued Your curiosity drives you to explore emerging technologies such as AI/ML, and you have developed proficiency in scripting languages like TCL and Python to solve complex engineering challenges You have a keen eye for detail and a solid grasp of timing, power, and noise analysis, enabling you to deliver robust and reliable design solutions Your exposure to industry-standard tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim has honed your technical expertise, and you are comfortable navigating various stages of the design flow, from synthesis to signoff As a team player, you communicate effectively, share knowledge openly, and support your peers in achieving shared goals You value diversity, equity, and inclusion, and are eager to contribute to a culture that fosters creativity and personal growth If you are ready to challenge yourself, make an impact, and be part of a world-class engineering team, Synopsys is the place for you, What Youll Be Doing: Developing and maintaining scripts and automation flows using TCL, Python, and Make to streamline EDA tool operations and design processes, Performing advanced timing, power, and noise analysis on CMOS circuits, leveraging your understanding of setup/hold constraints and leakage concepts, Contributing to the characterization of standard cell libraries, including NLDM/CCSN and LVF methodologies, and ensuring accurate modeling for signoff, Collaborating with design, verification, and methodology teams to optimize PPA (Power, Performance, Area) and address STA (Static Timing Analysis) challenges, Utilizing tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim to support verification, synthesis, and signoff activities, Participating in root cause analysis of timing and power issues, implementing innovative solutions, and documenting best practices for future projects, Staying abreast of the latest trends in AI/ML and exploring their application in EDA tool flows and design optimization, The Impact You Will Have: Accelerate the delivery and quality of Synopsys' IP and design solutions through automation and process innovation, Enhance product reliability by ensuring precise timing and power characterization, directly influencing customer satisfaction, Drive cross-functional collaboration, sharing insights and solutions that elevate team performance and project outcomes, Contribute to the adoption of cutting-edge AI/ML techniques, positioning Synopsys as a leader in intelligent EDA workflows, Reduce design cycle times and resource bottlenecks through effective scripting and workflow optimization, Mentor and support junior engineers, fostering a culture of knowledge sharing and continuous improvement, What Youll Need: 2-3 years of experience in VLSI design, EDA tool flows, or related semiconductor engineering roles, Proficiency in TCL, Python, and Make for scripting and automation, Strong understanding of CMOS circuit fundamentals, including timing (setup/hold), power (leakage/dynamic), and noise analysis, Experience with cell library characterization methodologies (NLDM/CCSN, LVF) and familiarity with library constructs and syntax, Working knowledge of STA analysis, PPA trends, and basic understanding of PNR (Place & Route), Hands-on experience with EDA tools: VCS, Design Compiler, Primetime, HSPICE/Primesim, Who You Are: Analytical thinker with strong problem-solving skills and a passion for innovation, Effective communicator, able to collaborate across disciplines and share complex ideas clearly, Self-motivated and adaptable, eager to learn new technologies and methods, Detail-oriented with a commitment to delivering high-quality results under tight deadlines, Team player who values diversity, equity, and inclusion in the workplace, The Team Youll Be A Part Of: You will join a vibrant team of R&D engineers focused on advancing the state of the art in chip characterization, timing, and power analysis Our team collaborates closely with cross-functional partners in design, verification, and methodology to deliver next-generation semiconductor solutions We foster a culture of innovation, mentorship, and continuous improvement, ensuring every member has an opportunity to grow and make a meaningful impact, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process, Show