410 Lvs Jobs - Page 5

Manage all student progress and prepare required strategies to overcome issues. Arranging for guest lectures. Arranging visits to the local parlors for the students. Arranging Induction & different sessions too. Looking after placements for students of hub center Maintaining pre placement and post-placement data and sharing it with the central office. Checking the quality of training at the centers and submitting reports about the same. Taking an initiative in creating new placement partnerships and tie ups in coordination with the Central team. Track the students for the complete period of their employment in the city. Provide mentor-ship support to students employed in the region to help them settle down including counseling, helping with finding accommodation, resolving issues with employers, helping establish social network in city, providing any other emergency support in the city Capture feedback of students and recruiters on an ongoing basis. Build and maintain regular connections with current and past employers & clients. Requirements Willingness to travel regularly Minimum Qualification Graduation 1 years of experience in the field Own two wheeler with required documents Basic Computer knowledge (Microsoft Excel & Word, Internet, etc.) Good Communications Skills Fluency in English, Hindi & the Regional Language (Kannad) Experience/ interest in training, teaching & coordinating.

The Opportunity As a Commissioning engineers, responsible to carry out Testing, Commissioning and design coordination of HVDC Station Auxiliary system equipment's and associated control panels for HVDC Systems delivered in various locations within and outside India. His/her work may involve extensive travel to different locations across India or any part of the world to test & commission the HVDC systems. How You’ll Make An Impact HVDC Auxiliary System site testing & commissioning and interface with design team. On-site installation and commissioning of HVDC Auxiliary system. Good experience with Auxiliary systems commissioning & trouble shooting like station service transformer, battery, battery charger, UPS, DG, LVS, Firefighting system, HVAC system, BMS etc. HVDC knowledge and experience is preferred Exposure / Basic Knowledge in International electrical (IEEE/IEC) Standards. Knowledge on electric power system. Good knowledge on software development. Travel during Factory System Test & Site commissioning. Continuous learning & acquiring expertise in testing & commissioning of HVDC system to achieve the higher growth in ‘learning curve’. Living Hitachi Energy core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business. Your Background Bachelor's degree in B.E Electrical. You Should have 2 to 5 years' experience in Auxiliary power system Testing and Commissioning. You should have engineering - Power Transmission industry experience. You should have experience in Software design, and HVDC testing and Commissioning of Auxiliary system. Strong communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams. Attention to detail and a commitment to delivering high-quality digital solutions. Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy’s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business. Hitachi Energy is a global technology leader that is advancing a sustainable energy future for all. We serve customers in the utility, industry and infrastructure sectors with innovative solutions and services across the value chain. Together with customers and partners, we pioneer technologies and enable the digital transformation required to accelerate the energy transition towards a carbon-neutral future. We employ around 45,000 people in 90 countries who each day work with purpose and use their different backgrounds to challenge the status quo. We welcome you to apply today and be part of a global team that appreciates a simple truth: Diversity + Collaboration = Great Innovation.

Job Overview: We are looking for a highly motivated and detail-oriented Block-Level Physical Design Engineer (4+ Years) to join our dynamic VLSI team. You will be responsible for driving the complete physical implementation of complex digital blocks using industry-standard tools and methodologies, targeting advanced technology nodes including 2 nm/3nm and beyond. Key Responsibilities: Execute block-level physical design activities including Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing , and Physical Verification . Perform Static Timing Analysis (STA) , IR drop analysis, RC extraction , and ensure power, timing, and signal integrity closure. Work hands-on with tools like Cadence Innovus , Synopsys ICC2 , Primetime , RedHawk , etc. Handle congestion analysis , design optimization , and area/power/timing trade-offs to meet PPA targets. Collaborate with RTL design, DFT, and verification teams to ensure seamless integration and clean handoff. Contribute to timing closure , ECO implementation, and physical sign-off.

The Opportunity The auxiliary design engineer has a responsibility to understand technical requirements for auxiliary power system networks and is fed with adequate power for the equipment and station to run without any interruption, thereby ensuring safety of the end equipment and HVDC station as a whole. How You’ll Make An Impact Demonstrate knowledge in the design of MVS, LVS, Diesel Generator, Auxiliary/distribution Transformer & battery system Knowledge of the design principles and applicable standards used within the technical field of the department Preparation of SLD, List of loads/load list/feeder list. Responsible for estimating material, equipment sizing activity (Diesel Generator & Auxiliary/Distribution transformer) and cable sizing (LV & MV) Revisit the process and update the same based on the feedback Coordinate with project teams to understand the updates required for the solution provided Support PLM activities Understand global standards and upgrade solution accordingly to utilize it for global projects. Responsible to ensure compliance with applicable external and internal regulations, procedures, and guidelines. Living Hitachi Energy’s core values of safety and integrity, which means taking responsibility for your own actions while caring for your colleagues and the business. Your Background Have bachelor's in electrical engineering with a minimum work experience of 5 to 8 years in Design of auxiliary power for substation/power plant/ Oil and gas. You must have Knowledge & Skills in Eplan or Elecdes ,PLM Tools ,NX or Teamcenter. Knowledge & Experience MS Office: Word, Excel Self-starter caliber who could own tasks through to completion Strong attention to detail Excellent written and verbal communication skills. Hitachi Energy is a global technology leader that is advancing a sustainable energy future for all. We serve customers in the utility, industry and infrastructure sectors with innovative solutions and services across the value chain. Together with customers and partners, we pioneer technologies and enable the digital transformation required to accelerate the energy transition towards a carbon-neutral future. We employ around 45,000 people in 90 countries who each day work with purpose and use their different backgrounds to challenge the status quo. We welcome you to apply today and be part of a global team that appreciates a simple truth: Diversity + Collaboration = Great Innovation.

About The Role Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : SAP FI S/4HANA Accounting Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Developer, you will be involved in designing, building, and configuring applications to meet business process and application requirements. Your typical day will revolve around creating innovative solutions to address specific business needs and ensuring seamless application functionality. Roles & Responsibilities:- Liaising with clients to gather necessary requirements and resolve GST-related queries.- Configuring and maintaining GST settings in SAP, including TDS, E-invoice, and other tax-related modules.- Configuring and Testing of GST returns (Document compliance Reporting), To ensure compliance with GST laws and regulations.- Proficient in implementing and handeling third party integration- Join Cluster Tax team, focusing on localization and deployment- he/she will need to have experience in/with SAP tax reporting or tax determination- he/she will support tax localization requirements during the full project lifecycle.- he/she will review build demos and test results against design/- he/she will support country users in organizational change activities and ensure country users know & act on their responsibilities- he/she will perform cutover and hypercare activities- Expected to be an SME- Collaborate and manage the team to perform- Responsible for team decisions- Engage with multiple teams and contribute on key decisions- Provide solutions to problems for their immediate team and across multiple teams- Lead the team in implementing best practices for SAP FI S/4HANA Accounting- Conduct regular code reviews and ensure adherence to coding standards- Stay updated with the latest trends in SAP FI S/4HANA Accounting and provide training to team members Professional & Technical Skills: - Strong knowledge of GST laws and regulations.- Proficiency in SAP FICO with experience in end-to-end implementations.- SAP Experience in baseline configuration for GST India in SAP. Experience in SAP FI, MM, and SD.- Must To Have Skills: Proficiency in SAP FI S/4HANA Accounting- Strong understanding of financial accounting principles- Experience in configuring and customizing SAP FI modules- Knowledge of integration with other SAP modules- Hands-on experience in SAP implementation projects- SAP Tax Accounting- SAP S/4HANA Finance- SAP Tax reporting- SAP Tax determination- SAP ARC/DRC is a plus Additional Information:- The candidate should have a minimum of 7.5 years of experience in SAP FI S/4HANA Accounting- This position is based at our Hyderabad office- A 15 years full-time education is required Qualification 15 years full time education

Education Graduation in Pharmacy Long Description The person should have knowledge in Manufacturing equipments. He should have exposure in equipment’s such as FBE,Fette/KORSCH M/C & auto coater M/C He should be able to handle equipment trouble shoot in Manufacturing department. He should have exposure in regulatory organization . He must have faced the USFDA ,MHRA & other regulatory audits. He should have the exposure in Caliber QAMS, elog, track wise ,SAP ,WIND ,CDAS & other software. He should have the exposure in process simplification/optimization ,SABA ,elog & SCADA. Competencies Work Experience 3-6 years work experience in Fette compression machine

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 The Role As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the physical integration and verification team , you will work closely with the physical design implementation, IP teams and fab contacts to achieve quality tapeout and first pass silicon success. The Person A successful candidate will work on block level and SoC physical integration, verification and tapeout with physical design engineers. The candidate is expected to be detail-oriented, possessing good communication and problem-solving skills. Key Responsiblities Work with PD team on subsystem and block level physical verification and signoff Work closely with physical design implementation and signoff team to achieve faster TAT Work closely with CAD team to come up with new flows and methodologies in the physical verification domain Preferred Skillset 3+ years of relevant experience Sound knowledge of physical verification and design flows Hands on experience on industry standard tools such as Calibre and ICV Sound understanding for DRC/LVS decks. Should be able to make updates as required. Good in scripting languages such as Tcl and Perl Self driven, positive attitude and team worker Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Title: Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Experience: 7 to 15 Years Location: Bangalore / Hyderabad / Cochin / Pune Budget: ₹30 LPA to ₹75 LPA Work Mode: 5 Days Office Key Responsibilities End-to-end ownership of chip-level and block-level floor planning. Drive partitioning, placement, clock tree synthesis (CTS), and routing. Utilize tools like Cadence Innovus and Synopsys Fusion Compiler for implementation. Perform timing analysis, DRC/LVS closure, and physical verification. Collaborate with cross-functional teams including RTL, DFT, STA, and packaging teams. Key Skills Required Strong experience in chip-level and block-level physical design. Hands-on expertise with Innovus and/or Fusion Compiler. Solid understanding of timing, power, signal integrity, and physical verification. Exposure to advanced technology nodes (e.g., 7nm, 5nm) is a plus. Excellent problem-solving and debugging skills. Skills: fusion compiler,chip level,signal integrity,chip-level physical design,timing,physical verification,timing analysis,physical design,debugging,block-level floor planning.,block-level physical design,power,problem-solving,advanced technology nodes,innovus,synopsys fusion compiler,drc/lvs closure,cadence innovus

Job Title: Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Experience: 7 to 15 Years Location: Bangalore / Hyderabad / Cochin / Pune Budget: ₹30 LPA to ₹75 LPA Work Mode: 5 Days Office Key Responsibilities End-to-end ownership of chip-level and block-level floor planning. Drive partitioning, placement, clock tree synthesis (CTS), and routing. Utilize tools like Cadence Innovus and Synopsys Fusion Compiler for implementation. Perform timing analysis, DRC/LVS closure, and physical verification. Collaborate with cross-functional teams including RTL, DFT, STA, and packaging teams. Key Skills Required Strong experience in chip-level and block-level physical design. Hands-on expertise with Innovus and/or Fusion Compiler. Solid understanding of timing, power, signal integrity, and physical verification. Exposure to advanced technology nodes (e.g., 7nm, 5nm) is a plus. Excellent problem-solving and debugging skills. Skills: fusion compiler,chip level,signal integrity,chip-level physical design,timing,physical verification,timing analysis,physical design,debugging,block-level floor planning.,block-level physical design,power,problem-solving,advanced technology nodes,innovus,synopsys fusion compiler,drc/lvs closure,cadence innovus

Role & responsibilities A VLSI (Very Large Scale Integration) Recruiter typically focuses on finding and hiring talent with expertise in semiconductor design, integrated circuit (IC) design, and VLSI technologies. Below are some of the key roles and responsibilities for a VLSI Recruiter position: 1. Talent Acquisition Sourcing Candidates: Actively source candidates for VLSI design roles, including hardware engineers, design engineers, verification engineers, and other related positions within the semiconductor industry. Job Postings: Create detailed job descriptions, post open positions on job boards, and engage with potential candidates through professional networks like LinkedIn. Screening Resumes: Review resumes and applications to identify qualified candidates based on skills and experience relevant to VLSI design roles. Interviewing Candidates: Conduct initial screening interviews to evaluate candidates' technical skills, experience, and cultural fit. Coordinate Interviews: Schedule interviews with hiring managers, VLSI engineers, and technical teams, ensuring a smooth interview process. 2. Collaboration with Hiring Managers Understand Requirements: Work closely with hiring managers and team leads to understand the specific needs for VLSI roles and the required skill set for each position. Technical Knowledge: Gain a solid understanding of the technical requirements for VLSI design and verification positions to effectively screen candidates. 3. Candidate Relationship Management Build a Talent Pool: Maintain a network of passive candidates for future opportunities, especially for hard-to-fill roles or specialized positions. Candidate Engagement: Keep candidates engaged throughout the hiring process, providing them with feedback, updates, and insights into the company culture and the role. Negotiations: Negotiate offers with candidates, ensuring alignment on salary, benefits, and other terms of employment. If interested, Please share me your updated resume to rama.c@acesoftlabs.com Regards, Rama CH Key Account Manager (KAM) Acesoft Labs

Your Role and Responsibilities 1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challenging problems 7. Writing /PYTHON scripts to automate repetitive tasks 8. Work with Place and Route engineer to integrate custom macros into top level. 9. Able to perform design reviews across global team 10. Work closely with required global teams to ensure the success of the whole product. 11. Leadership in delivery of macros we plan to own from India Job requirements: 1. Experience in doing layouts for analog blocks like SerDes, ADCs, DACs, LDOs, PLLs, BGAP & amplifiers etc. 2. Experience in designing layouts for high-speed circuits is a plus. 3. Layout experience in the following technology nodes3nm, 5nm and 7nm FinFET. 4. Good team worker with multi-discipline, multi-cultural and multi-site environments 5. Strong fundamental knowledge in semiconductor device physics, layout principles, IC reliability and failure mechanisms 6. Good problem-solving skills are essential where problems are analysed upfront, identifying gaps, and providing optimum solutions7. Knowledge in Skill/perl/tcl/Python scripting is a plus. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise The Analog layout design engineer with experience in next generation Ultra high speed serial IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have knowledge in the design and development full custom analog layouts for ultra high speed 32G/50G/112G IO link interfaces. Preferred technical and professional experience Experience in 7 and 14 nm analog layout design. Working on Cutting edge technology and HSS domain . Quick learner, deep layout design knowledge, problem solving skills and good communication skills with cross teams across the Geos.

Company Overview: Teknic Electric, established in 1970, is a leading manufacturer of Control & Signalling devices, has a rich history of innovation and excellence in delivering high-quality products to customers worldwide. We prioritise customer satisfaction and deliver customised solutions to meet their unique needs. Job Overview: We are excited to announce an opening for the position of Sales Engineer ( LV Switchgear, Controlgear & Electrical Components) Work Exp.: 3-7 years Qualification: Diploma / B.E / B. Tech, Electrical / Science Graduate Job Description: Should have a thorough knowledge of LV Switchgear products, Electrical Controlgear & Components. Should be able to plan, develop, and achieve business targets for LVS products in New Delhi by actively focusing on Industrial sales business. Should have experience and strive for business from market segments of Panel Builder, OEM, EPC, EU, and consultants. Should be able to tap key customers, plan visits to achieve it, and create market acceptability by brand-building activities. Should be able to track market share and competitors information. Should be able to collect market information for different market segments related to potential customers. Should be able to educate company product advantages with demos & presentations at major customers like Panel Builders, OEM, EPC, and consultants. Skills Required: Complete Knowledge of Sales process especially in LVS products & Electrical Controlgear and Component business which helps in solving customer complaints and business growth. Should have strong written, communication, and presentation skills Should have good negotiation and order-closing skills Should have good analytical and influencing skills Should be self-motivated and a good team player Should be able to conduct and manage meetings Job Type: Full-time Schedule: Day shift Work Location: In person

Company Overview: Teknic Electric, established in 1970, is a leading manufacturer of Control & Signalling devices, has a rich history of innovation and excellence in delivering high-quality products to customers worldwide. We prioritise customer satisfaction and deliver customised solutions to meet their unique needs. Job Overview: We are excited to announce an opening for the position of Sales Engineer ( LV Switchgear, Controlgear & Electrical Components) Work Exp.: 3-7 years Qualification: Diploma / B.E / B. Tech, Electrical / Science Graduate Job Description: Should have a thorough knowledge of LV Switchgear products, Electrical Controlgear & Components. Should be able to plan, develop, and achieve business targets for LVS products in New Delhi by actively focusing on Industrial sales business. Should have experience and strive for business from market segments of Panel Builder, OEM, EPC, EU, and consultants. Should be able to tap key customers, plan visits to achieve it, and create market acceptability by brand-building activities. Should be able to track market share and competitors information. Should be able to collect market information for different market segments related to potential customers. Should be able to educate company product advantages with demos & presentations at major customers like Panel Builders, OEM, EPC, and consultants. Skills Required: Complete Knowledge of Sales process especially in LVS products & Electrical Controlgear and Component business which helps in solving customer complaints and business growth. Should have strong written, communication, and presentation skills Should have good negotiation and order-closing skills Should have good analytical and influencing skills Should be self-motivated and a good team player Should be able to conduct and manage meetings Job Type: Full-time Schedule: Day shift Work Location: In person

Key Responsibilities: Collaborate with customers to understand their design requirements and provide technical support throughout the implementation phase. Identify, troubleshoot, and resolve design issues such as DRC, LVS, and other verification checks to ensure successful tapeout. Hands-on in relevant EDA tools like Innovus, IC compiler, Calibre , PrimeTime etc Assist in the tapeout process, ensuring all design files are correctly prepared and submitted for manufacturing. Qualifications: Bachelor's or Master's degree in Electrical Engineering or a related field. Proven experience of atleast 8 years as digital chip designer and customer support. Strong problem-solving skills and ability to work under pressure. Excellent communication and interpersonal skills. Hands-on in EDA tools such as Cadence , Synopsys and Mentor Graphic

Job Title: AI/ML Engineer - Time Series Forecasting & Clustering Location: Bangalore Experience: 2+ Years Job Type: Full-Time Mandatory Skills: AI/ML Engineer with Time Series Forecasting & Clustering experience Responsibilities in Brief: Time Series Forecasting : Build models to predict trends from time series data. Clustering : Develop algorithms to group and analyze data segments. Data Insights : Analyze data to enhance model performance. Team Collaboration : Work with teams to integrate models into products. Stay Updated : Apply the latest AI techniques to improve solutions. Qualifications: Education : Bachelors/Masters in Computer Science or related field. Experience : Hands-on experience with time series forecasting and clustering. Skills : Proficient in Python, R, and relevant ML tools Perks & Benefits: Health and Wellness: Healthcare policy covering your family and parents. Food: Enjoy scrumptious buffet lunch at the office every day. Professional Development: Learn and propel your career. We provide workshops, funded online courses and other learning opportunities based on individual needs. Rewards and Recognitions: Recognition and rewards programs in place to celebrate your achievements and contributions. Why join Relanto? Health & Family: Comprehensive benefits for you and your loved ones, ensuring well-being. Growth Mindset: Continuous learning opportunities to stay ahead in your field. Dynamic & Inclusive: Vibrant culture fostering collaboration, creativity, and belonging. Career Ladder: Internal promotions and clear path for advancement. Recognition & Rewards: Celebrate your achievements and contributions. Work-Life Harmony: Flexible arrangements to balance your commitments. To find out more about us, head over to our Website and LinkedIn

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualifications: Bachelor’s or Master’s degree from a top-tier institute. 5+ years of experience in STA/Timing from product-based companies. Job : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS ICC, Innovous , PT/Tempus Familiar with process technology enablementCircuit simulations using Hspice/FineSim, Monte Carlo.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience 7 to 15 years Physical design of block level with full understanding of PnR cycle. Good understanding of Physical design fundamentals Good hands-on experience on industry standard pnr tools like ICC2/Innovus Good understanding on signoff tool like Prime time , Redhawk and calibre Should be able to guide junior engineers in resolving technical issues. Tools ICC/Innovus, PT, StarRC, Redhawk, Calibre DRC/LVS ScriptingTCL, Perl

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 2+ years Hardware Engineering experience or related work experience. 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 3+ years Hardware Engineering experience or related work experience. 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Working experience (2+ years) in preferably Memory design Compiler approach of developing embedded SRAM/ROM development Fundamental know how on bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention) Fundamentals of process variability and its effect on memory design Strong understanding of Digital/Memory circuit design/layouts Critical path modeling concept, various type of models ( RC, C, Pai, ladder, distributive, etc) Good knowledge of semiconductor physics in general. Knowledge of and affinity to IC technology and IP design is mandatory

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: In this highly cross functional role, you will be part of the Global Design Enablement team responsible for various aspects of PDK development across Custom, Analog and RF technology nodes. As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineering design community to develop & support customized tools and flows for Schematic & Layout design, Circuit Simulation, IP characterization, Custom/Analog P&R and transistor-level EM/IR flows. You will also have the responsibility to collaborate with our Foundry and EDA partners to deploy best-in class EDA tools and flows in addition to developing in-house productivity & QoR automation solutions for improving overall design methodology. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications Bachelors or master’s in electrical engineering, Computer Science, or related field. 6+ years of industry experience in CAD/EDA or PDK development Knowledge of Virtuoso suite of tools – Schematic, Layout, Analog Design Environment etc. Proficiency in one or more of the programming/scripting languages – , Python, Perl and TCL. Good understanding of CMOS fundamentals and Circuit Design Concepts Strong aptitude for programming and automation Good communication skills and ability to work collaboratively in a team environment Preferred Qualifications Familiarity with SPICE simulation tools (Hspice, SpectreX/APS, AFS/Solido SPICE , PrimeSim SPICE, ADS, GoldenGate etc.) Experience with Electromagnetic tools, like Peakview and EMX, is a plus. Knowledge of FinFet & SOI processes is a plus Educational RequiredBachelor's, Electrical Engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm