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Design Verification Engineer, Silicon

Design Verification Engineer, Silicon

Google

4 - 9 years

25 - 30 Lacs

Bengaluru

Posted:2 weeks ago| Platform:

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Skills Required

Electrical engineering Design verification System verilog PCIE Silicon Hardware Test cases IOS UVM

Work Mode

Work from Office

Job Type

Full Time

Job Description

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

Master s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience in one or more of the following; high speed controller and physical layer for peripheral component interconnect express, display port, universal serial bus, universal flash storage or low speed IOs such as improved inter-integrated circuit, serial peripheral interface or universal asynchronous receiver transmitter, etc.
Experience with Interconnect Protocols (Advanced eXtensible Interface, AXI Coherency Extensions, Coherent Hub Interface, Cache Coherent Interconnect for Accelerators, Compute Express Link).
Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

Plan and execute the verification of high speed Inputs/Outputs (IOs) ( PCIe, display port, universal serial bus or universal flash storage ) or low speed IOs (improved inter-integrated circuit, serial peripheral interface or universal asynchronous receiver transmitter), IP/subsystem functional verification, power controller and chips pervasive IP.
Create and enhance constrained-random verification environments using SystemVerilog and UVM or other industry-standard methodologies.
Create and maintain verification environments using SystemVerilog, Universal Verification Methodology (UVM), and define and implement testbench components, such as drivers, monitors, scoreboards, and checkers.
Develop cross language tools and verification methodologies.
Identify and write all types of coverage measures for stimulus and corner-cases.

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Design Verification Engineer, Silicon