131 Cts Jobs - Page 2

Quest Global is a leading organization known for its innovation and rapid growth in the engineering services sector. With a rich domain expertise and a strong presence in the top OEMs across seven industries, we are a company with a 25-year legacy and a vision to reach a centennial milestone. Driven by ambition, passion, and humility, we are on a journey to shape the future through engineering. We are in search of individuals who embody the spirit of humble geniuses, believing in the power of engineering to turn the impossible into reality. Our ideal candidates are innovators inspired by technology and driven to design, develop, and test solutions as trusted partners for Fortune 500 clients. As a diverse team of engineers, we understand that our work goes beyond technical solutions; we are shaping a brighter future for all. If you are eager to contribute to meaningful projects and be part of an organization that values collective success and learning from failures, we invite you to join us. We are looking for achievers and courageous challenge-crushers who possess the following skills and characteristics: Responsibilities: - Performing floor-planning and routing studies at block and full-chip level - Executing top-level floorplan and clock pushdown to Partition - IO Planning and bump planning - Collaboration with Package team to meet Die file milestones - Conducting full chip and partition level timing analysis - Exploring low power techniques and power reduction opportunities - Designing and analyzing clock distribution - Executing Physical verification activities at full-chip level - Leading technical activities of physical design throughout technology readiness, design, and execution Qualifications: - Proficiency in Netlist2GDSII Implementation, including Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, and Chip finishing - Experience in Physical Design Methodologies and sub-micron technology of 16nm and lower nodes - Handling designs with >1M instance count and 1 GHz frequency - Programming skills in Tcl/Tk/Perl for automating design processes and enhancing efficiency - Hands-on experience with PNR Suite from Cadence & Synopsys (Innovus & ICC2) - Strong background in Static Timing Analysis (PrimeTime SI), EM/IR-Drop analysis (PT-PX, Redhawk), and Physical Verification (Calibre) Education Type: M.E/M.Tech/MS-VLSI Design & Embedded System Job Type: Full Time-Regular Experience Level: Mid Level Total Years of Experience: 5 - 8,

You are an experienced Android Automotive Middleware/Platform Technical Lead with 5-9+ years of experience seeking an opportunity to design and develop innovative solutions for next-generation SDV, eCockpit, and Infotainment systems on Android Automotive. You will work with the latest versions of Android Automotive to develop middleware solutions for Audio, Media, Tuner, Connectivity, HAL, Graphics, Projection technologies, and Inter-domain Communication in the context of an SDV. Your responsibilities will include designing and developing software architecture for Android Middleware/Platform in the automotive domain, collaborating with cross-functional teams to understand requirements and develop technical solutions, maintaining software design documents, specifications, and test plans, identifying technical risks and developing mitigation strategies, providing technical guidance and mentorship to team members, collaborating with external suppliers and partners to integrate software components into the overall system, staying current with emerging trends and technologies in automotive software development, leading a team of Middleware Developers for various domains, defining KPIs for components and ensuring they are achieved, guiding development team for any roadblocks/support needed and triaging defects, managing multiple projects and communicating and collaborating with key stakeholders, participating in competency development activities and assessments by mentoring, conducting interviews, and facilitating training, and defining AIDL interfaces for framework components and ensuring implementation is in-line with CDD and passes CTS, VTS. To qualify for this role, you must have a minimum Bachelor's degree in Engineering or equivalent, strong leadership, planning, and organization skills, mentoring skills to assist junior team members, understanding of IVI, Cluster/Digital Cockpit domain, and its requirements, and good analytical, problem-solving, and logical thinking skills. If you are a forward-thinking and experienced Middleware/Platform Technical Lead with an Android Automotive background, we encourage you to apply for this exciting opportunity!,

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Job Overview: We are looking for a highly motivated and detail-oriented Block-Level Physical Design Engineer (4+ Years) to join our dynamic VLSI team. You will be responsible for driving the complete physical implementation of complex digital blocks using industry-standard tools and methodologies, targeting advanced technology nodes including 2 nm/3nm and beyond. Key Responsibilities: Execute block-level physical design activities including Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing , and Physical Verification . Perform Static Timing Analysis (STA) , IR drop analysis, RC extraction , and ensure power, timing, and signal integrity closure. Work hands-on with tools like Cadence Innovus , Synopsys ICC2 , Primetime , RedHawk , etc. Handle congestion analysis , design optimization , and area/power/timing trade-offs to meet PPA targets. Collaborate with RTL design, DFT, and verification teams to ensure seamless integration and clean handoff. Contribute to timing closure , ECO implementation, and physical sign-off.

YOUR IMPACT: Reporting to TSS Manager, Lead Cloud Applications Consultant is responsible for being the technical SPOC that involves complete ownership of technical delivery including administration and management of the OpenText Documentum product suite for our worldwide customers. The role is customer-facing and requires excellent interpersonal skills with the ability to communicate to a wide range of stakeholders (internally and externally), both verbally and in writing. WHAT THE ROLE OFFERS: Represent OpenText in a professional manner to customers, partners, and other OpenText personnel always. Technical SPOC for assigned customer engagements. Take complete ownership of technical delivery including providing SME guidance to the TSS team. Proficient in conducting architecture, performance, and capacity reviews for deployed application landscape and coming up with recommendations for improvement. Lead & drive all major activities/milestones to successful completion within the agreed timelines. Improve team & delivery efficiency by meeting customer agreed KPIs & SLAs, showcasing process improvements, and identifying automation opportunities wherever needed. Strong hands-on in managing Documentum applications for global customers using the ITIL framework. Support and report to the engagement Service Delivery Manager while assigned to active customer engagements. Regularly communicate status to the engagement project manager and proactively identify issues and preventive/remedial measures. Establishes relationships with client technical counterparts. Participates in weekly and monthly client service delivery meetings including escalation calls. Work in conjunction with colleagues from different teams of OpenText including product support, engineering, product management & Cloud Ops Teams (like DB, Storage, network, etc.) Prepare, maintain, and submit activity/progress reports and time recording/management reports in accordance with published procedures. Keep delivery managers informed of activities and alert of any issues promptly. Provide inputs as part of engagement closure on project learnings and suggest improvements Provide knowledge transfer to team members, train staff personnel, provide on-the-job guidance and mentoring and conduct training sessions to customer personnel when authorized by management. Adhere to processes and methodologies to perform the required function. Report deviations from defined processes to the engagement project manager and recommend associated improvements. WHAT YOU NEED TO SUCCEED: Excellent grasp of the principles of Enterprise Content Management systems. Mandatory experience in administration and management of the Documentum Suite platform that involves: D2, xPlore, CTS, D2 Rest, DFS, DFC, BOF, DQL, and Documentum Administrator. Good to have working experience on Documentum Life Sciences modules Q&M (Quality and Manufacturing), R&D (Research & Development), etc. Good to have working experience in the management of Documentum applications in Cloud Technologies like AWS or GCP or Azure with containerized deployments . Proficient in Documentum administration, maintenance activities, patch & upgrade of Documentum components. Participate in the day-to-day administration of the systems, including Incident & Problem Management, Change & Release Management. Proficient in the administration of SQL Server or Oracle. Good understanding of object-oriented programming, Web Services, LDAP configuration, and RDBMS concepts Working knowledge of Unix and Windows operating systems Strong analytical skills combined with the ability to work in a fast-paced environment with geographically distributed teams Relevant Experience: 8 - 12 years

Reporting to TSS Manager, Lead Cloud Applications Consultant is responsible for providing technical and consultative assistance on engagements involving implementing the OPENTEXT Documentum product suite for our world-wide customers. Understands customer requirements, conducts detailed technical design, determines level of effort & implementation approach, performs installation, development & integration, administration and prepares technical documentation. Capable of performing assigned tasks with minimal supervision. What it takes: Excellent grasp of the principles of Enterprise Content Management systems Mandatory experience in administration and management of the Documentum Suite platform that involves: D2, Content Server, xPlore, CTS, D2 Rest, DFS, DFC, BOF, DQL, and Documentum Administrator. Good to have working experience on Documentum Life Sciences modules Q&M (Quality and Manufacturing), R&D (Research & Development), Information Archive, Captiva, Core for Capital Projects, xPressions etc. Good to have working experience in the management of Documentum applications in Cloud Technologies like AWS or GCP or Azure with containerized deployments. Proficient in Documentum administration and maintenance activities Participate in the day-to-day administration of the systems, including Incident & Problem Management Participate and contribute to change & release management process. Proficient in programming using Core Java and DFC. Proficient in programming using Servlets, XML, XSLT, HTML, SQL Good understanding of object-oriented programming, Web Services, LDAP configuration, and RDBMS concepts Working knowledge of Unix and Windows operating systems Strong analytical skills combined with ability to work in a fast-paced environment with geographically distributed teams Relevant Experience: 5 - 8 years You are great at: Represent OPENTEXT in a professional manner to customers, partners and other OPENTEXT personnel at all times Support and report to engagement delivery manager while assigned to active customer engagements. Regularly communicate status to the engagement project manager and proactively identify issues and preventive/remedial measures Establishes relationships with client technical counterparts. Participates in client meetings related to solution scoping and planning. Assist in the creation of proposals that address current and evolving client requirements Understand requirements, conduct detailed design, determine level of effort, plan work breakdown structures and implementation approach Perform installation, development, configuration, integration, administration, and testing activities. Collaborate with senior staff and the engagement delivery manager as required during difficult customer situations. Work in conjunction with colleagues and the Product Support organization to ensure effective resolution of technical issues encountered during implementations Perform code reviews and periodic quality checks to ensure delivery quality is maintained Prepare, maintain, and submit activity/progress reports and time recording/management reports in accordance with published procedures. Keep delivery managers informed of activities and alert of any issues promptly. Provide inputs as part of engagement closure on project learnings and suggest improvements Provide knowledge transfer to team members, train staff personnel, provide on the job guidance and mentoring and conduct training sessions to customer personnel when authorized by management Adhere to processes and methodologies to perform the required function. Report deviations from defined processes to the engagement project manager and recommend associated improvements Acquire OPENTEXT Proven Certification in Documentum Content Management, administration, programming, development.

Responsibilities: * Manage audio-visual equipment, digital signage. * Lead AV projects from planning to execution. * Ensure successful project delivery within budget and timeline.

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our lifes work , to amplify human creativity and intelligence. As an NVIDIAN, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What You'll Be Doing In this position, you will expected to develop and support flows & scripts based around industry standard PnR EDA tools Work in collaboration with PD team for addressing design challenges Help team members in debugging tool/flow related issues. Constantly look for improvement in RTL2GDS flow to improve PPA. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. What We Need To See BE/BTECH/MTECH, or equivalent experience. 4+ years of experience in Physical Design. Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSII concepts related to place & route, CTS, timing convergence, layout closure. Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. Good automation skills in PERL, TCL, Python and tool specific scripting on one of the industry leading Place & Route tools. Ability to multi-task and flexibility to work in global environment. Good communication skills and strong motivation, Strong analytical & Problem solving skills. Widely considered to be one of the technology worlds most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. , , JR1995590,

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 2+ years Hardware Engineering experience or related work experience. 2+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 3+ years Hardware Engineering experience or related work experience. 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 5+ years Hardware Engineering experience or related work experience. 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications 8+ years Hardware Engineering experience or related work experience. 8+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary PNR implementation for Qualcomm Hexagon DSP IP's 8+ years of experience in Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Overview Experienced STA/Timing Engineer with 3-10 Years of hands-on experience on timing sign off/convergence for complex SOCs. Ability to start immediately on timing analysis/sign-off with PD/Methodology teams across multiple sites and different technology nodes. : STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Evaluate multiple timing methodologies/tools on different designs and technology nodes. Work on automation scripts within STA/PD tools for methodology development. Good Technical writing and Communication skills. Willing to work in cross-collaborative environment. Experience in design automation using TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS ICC, Innovous , PT/Tempus Familiar with process technology enablementCircuit simulations using Hspice/FineSim, Monte Carlo. Education B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI. Preferred Qualification/Skills Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling. Hands-on experience with STA tools - Prime-time, Tempus Have experience working on timing convergence at Chip-level and Hard-Macro level. In-depth knowledge crosstalk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling, Knowledge of ASIC back-end design flows, methods, and tools (ICC2, Innovus) Knowledge of Spice simulation Hspice/FineSim, Monte Carlo. Silicon to spice model correlation. Proficient is scripting languages – TCL, Perl, Python Basic knowledge of device physics

Dear Candidate, !!!Greetings from HCLTech!!! We are looking for a highly motivated and experienced Physical Design Lead to join our dynamic team and play a vital role in the physical design and implementation of next-generation integrated circuits (ICs). We have planned a F2F weekend drive in Bangalore - Plz refer below details and share your confirmation to Shaik Ahmed - shaikannu.ahmed@hcltech.com Skillset: Physical Design Engineer Exp: 4+ years only Work location: Bangalore Weekend drive Date: 12th Jul 2025 (from 10:00 AM - 3:00 PM) Venue: HCL Technologies (Sankalp Semiconductor) 4th Floor, 401E B Wing (East) Campus 1, RMZ- Ecoworld SEZ 20&21, Deverabeesanahalli, Bellandur SPOC-Pradeep Physical Design Expertise: Define and implement the overall physical design strategy for assigned projects, considering factors like performance, power, and area Perform floor planning, placement, clock tree synthesis (CTS), and routing for complex digital circuits Ensure adherence to design rules and manufacturability guidelines Utilize physical design tools and methodologies (place and route tools, static timing analysis tools) to achieve timing closure and optimal physical design Collaborate with design, verification, and layout teams to ensure seamless integration throughout the design flow Participate in design reviews and provide technical leadership on physical design aspects Plz help with below details Required Details:- Name: Contact No: Email ID: Total Exp: Rel Exp: Company: Notice period: Holding Offer (Yes/No): Current CTC: Expected CTC: Current Location: Preferred Location: Thank you.

*Perform installation, configuration, and maintenance of SAP systems (ECC, S/4HANA, PI/PO, BW, Solution Manager, etc.) *Perform system monitoring, performance tuning, and troubleshooting *Manage user administration, roles, and authorizations

Excellent communication required. US Customer Service voice process. We are looking to hire candidates from Gurgaon and for Kolkata location Minimum 6 months of experience is required in International voice process. Customer Service Executive Customer Support Executive - Virtual Interview only Blended process (voice Process) 2 days rotational off. US or Night shift Work From Office Good communication required Immediate joining required Pls call Durga 9884244311 for more info. Thanks, Durga 9884244311

We have vacancy for international voice process with our Client for various location. Working days: 5 Days working, 2 rotational off Freshers or Experience: 1 year in Customer service (Voice/ Non-Voice) Salary upto 5 lakhs + Allowance + Incentives Roles and Responsibilities Ability to engage in communication and build a conversation around it Building relationships on Chat and Emails. Ability to handle pressure and meet deadlines. Ability to successfully work as a part of a team. Must be an immediate Joiner with Good communication skills. Immediate joining required. Good communication Pls call Nivetha 9884676582 for more info Thanks, Nivetha 9884676582

We have vacancy for international voice process with our Client for various location. Working days: 5 Days working, 2 rotational off Freshers or Experience: 1 year in Customer service (Voice/ Non-Voice) Salary upto 5 lakhs + Allowance + Incentives Roles and Responsibilities Ability to engage in communication and build a conversation around it Building relationships on Chat and Emails. Ability to handle pressure and meet deadlines. Ability to successfully work as a part of a team. Must be an immediate Joiner with Good communication skills. Immediate joining required. Good communication Pls call Sangeeta 9176078282 for more info Thanks, Sangeta 9176078282

Hi, US Customer Support associate / Process associate / BPO/ US Shift We are hiring for customer care for US shift for US voice process Hyderabad - Minimum 6 months of experience is required. Job description We are looking for process associate for International voice process who can interact with customers address their concerns, answer their questions and assist them with their needs. also who are able to join immediately Roles & Responsibilities:- Listen to customers concerns, issues and questions. Resolve customers concerns and answer customers questions to your best ability. Maintain a positive attitude and calmly respond to customers complaints. Open new customer accounts Refer issues and questions to managers if necessary Qualifications:- - Graduate Freshers Undergraduate with experience can apply - Excellent and fluent communication skills - Freshers to 4 year Experience in any domain Additional Information:- - International Voice Process - 24*7 Rotational shift - 5 days working - Location Chennai & Bangalore Immediate joining is required or short notice is required Pls call Durga 9884244311 for more info Thanks, Durga 9884244311

Excellent communication required. US Customer Service voice process. We are looking to hire candidates from Gurgaon and for Kolkata location Minimum 6 months of experience is required in International voice process. Customer Service Executive Customer Support Executive - Virtual Interview only Blended process (voice Process) 2 days rotational off. US or Night shift Work From Office Good communication required Immediate joining required Pls call Raj kishore 9962008169 for more info. Thanks, Raj kishore 9962008169

Job Description : Hands on experience in Block level PnR convergence with Synopsys ICC2/Cadence Innovus and timing convergence in PTSI/Tempus In this position, candidate is expected to lead all block/chip level PD activities including floor plans, placement, CTS, optimization and routing techniques, RC extraction, STA, EM/IR DROP, PV Familiar with deep sub-micron designs below 10nm preferred BE/B Tech/ME/M TECH

Execute Bench Sales, Marketing, and Recruitment activities, fostering relationships with Prime Vendors and Direct Clients. Need Prior Experience working with American Vendors. Need Excellent communication skills. Strong vendor management capabilities Required Candidate profile Hands-on experience working with Direct Clients/VMS Clients, Positive attitude with a sense of responsibility and urgency, If interested, please share resumes at balajicrs01@gmail.com. Perks and benefits Salary + Incentive and Work Location Hyderabad