149 Cpu Jobs - Page 3

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomm’s cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 3+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. o BE/BTech degree in CS/EE with 3+ years’ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Machine Learning Engineering General Summary: CPU architecture team is driving the core math libraries needed for ML/AI acceleration. This position/s will expose you to Qualcomm’s cutting edge SoC and ML/AI platforms in the industry. Participate in Optimizing the core ML kernels using the latest advancements like SME, SVE of the ARM CPU architecture and enhance the performance of the ML models on the CPU of the QCOM Soc Required Skills== 7+ experince with Understanding of ARM CPU architecture fundamentals and ARM Arch64 ISA Optimizing kernels for vector Processors Understanding of the basic linear algebra functions used in AI/ML Algorithm design (logic, critical thinking) Performance Evaluation and Optimization of the applications for ARM architecture Inferencing of the ML models written in Pytorch/TensorFlow/Keras Understanding of the typical Open-Source Library framework design Preferred Skills=== Strong Programming skills and deep understanding of the ARM ISA understanding of the algorithms suitable for Vector and matrix accelerators Strong Analytical and debugging skills Good understanding of Optimizing the Linear Algebra algorithms Performance evaluation using QEMU, Simulators, Emulators and on Real Hardware Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. SRAM DESIGN

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: BIOS -UEFI -Coreboot Location: Bangalore Work Type: Onsite Job Type: Full time Job Description: 5-15 years of experience in the x86 coreboot/FSP/BIOS development Experience with x86 CPU/APU architectures and associated compilation tools Expert in C language Experience with platform bring-up Familiar with coreboot boot stages, UPDs, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Working experience of industry standard protocols like PCIe, SPI, eSPI, ACPI, SMM Experience on working with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Experience on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Understanding of coreboot & FSP build tools and build processes Experience of working with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good understanding of UEFI framework concepts to port UEFI code to FSP Additional Skillset : Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Academic credentials: Bachelors degree in computer science engineering from reputed college Master’s degree from reputed university is a big plus TekWissen® Group is an equal opportunity employer supporting workforce diversity.

About Us: Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolves design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolves Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities. Tessolves clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Role - Baremetal Test Development Engineer - Mobile SoC: Notice - Immediate to 20 Days Experience - 7-20 Years Employer - Tessolve Semiconductors Job Location : Bangalore ( Work from office ) Note - Peoples whose below skills are not met kindly ignore this apply only it it meets your skills What you'll do Proficiency in C and Assembly programming* for embedded systems. Experience with firmware development* and debugging on baremetal or RTOS environments. Strong understanding of JTAG and other hardware debugging interfaces. Hands-on experience with at least two SoC subsystems:* CPU, GPU, multimedia, TPU, PCIe, or USB. Familiarity with SoC architectures* and low-level hardware/software interaction. Experience with test automation* using Python or Bash is a plus. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities. Tessolve Semiconductor Private Limited, as well as its affiliates and subsidiaries ( Tessolve ) does not require job applicants to make any payments at any stage of the hiring process. Any request for payment in exchange for a job opportunity at Tessolve is fraudulent and should be ignored. If you receive any such communication, we strongly advise you to refrain from making any payments and to promptly report the incident to us at hr@tessolve.com. Tessolve is not responsible for any losses incurred due to such fraudulent activities Interested candidates pls send me your updated resumes to shreyas.ramesh@tessolve.com / References are welcome Thanks, Shreyas. R TA - Team , Tessolve

- Lead the architecture, design and development of Instruction Sequencing Unit for high-performance Processor CPU of IBM Systems. - Architect and design Instruction Dispatch to Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Instruction Dispatch unit of CPU - Hands of experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of Instruction Decode and Execution units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools

Lead the architecture, design and development of Processor Core Vector- Scalar Execution unit for high-performance IBM Systems. - Architect and design Fixed point/Floating point/Vector/SIMD/Crypto instructions of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Execution unit of CPU - Hands on experience of implementing Arithmetic/Crypto/SIMD functions - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and load/store units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Lead the architecture, design and development of Processor Core Load- Store Execution unit for high-performance IBM Systems. - Architect and design Load and Store pipelines, D-Cache, Address Translation, Out of Order Execution of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. Required education Bachelor's Degree Preferred education Doctorate Degree Required technical and professional expertise 12 or more years of demonstrated experience in architecting and designing Load-Store Execution unit of CPU - Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Nice to haves - Knowledge of instruction dispatch and Arithmetic units - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Knowledge of one object oriented language and scripting language - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred Education

Role & responsibilities Candidate should be having experience in Mortgage underwriting of minimum 2-3 years. He/she should be well versed about Collateral underwriting. For the first 9-10 months, they would be Depute to Kurla for handling Co-lending activities. Post that they will move back to CPU credit (Mortgages) or will be on and off depending on Co-lending volumes. Preferred candidate profile Candidate should be from NBFC background. Interested candidate can share the resume on samiksha.shewale@piramal.com or deborah.reddy@piramal.com

Roles & Responsibility Experience with configuration management tools. Experience in software/hardware implementation. Experience with other cloud platforms (AWS, Azure). Experience with enterprise production Linux environments. Installation and configuration for the systems. Competency with infrastructure as code. Very strong understanding of computing fundamentals (CPU and RAM interaction, disk I/O, etc). Responsibilities :- Set up accounts and workstations Monitor performance and maintain systems according to requirements Troubleshoot issues and outages Ensure security through access controls, backups and firewalls Upgrade systems with new releases and models Develop expertise to train staff on new technologies Build an internal wiki with technical documentation, manuals and IT policies Job Requirements Responsibilities :- Proven experience as a System Administrator or a similar role. Experience with databases, networks (LAN, WAN) and patch management Knowledge of system security (e.g. intrusion detection systems) and data backup/recovery Hands on experience with Linus OS and Windows OS is a must.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the worlds most important challenges We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives AMD together we advance_ Job Title: Director, x86 CPU Cores Performance Verification Location: Bangalore Experience: 20-22 years The Role We are looking for a results-driven and strategic Director of x86 CPU Performance Verification to lead the development, implementation, and scaling of our performance verification strategy across next-gen CPU cores In this critical leadership role, you will be responsible for managing a world-class team, defining infrastructure and methodology, and ensuring our CPUs meet and exceed their performance targets from early RTL through post-silicon Youll work across architecture, design, functional verification, and software teams to bridge performance intent with silicon reality If you thrive in fast-paced environments, love solving performance bottlenecks, and are passionate about building and mentoring high-impact teams?this is the opportunity for you We are seeking a visionary and technically accomplished Director of CPU Cores Performance Verification to lead our efforts in verifying and optimizing performance for next generation x86 CPU cores The ideal candidate will have deep expertise in CPU microarchitecture, performance modeling, and verification, with a strong background in performance infrastructure, emulation, and AI-driven methodologies The Person You are a visionary leader with deep technical expertise in CPU microarchitecture and performance validation You combine strong engineering fundamentals with the ability to scale teams and systems You are comfortable navigating ambiguity, influencing stakeholders across domains, and delivering results under pressure You lead with empathy, invest in people, and believe that high-performing teams are built on trust, feedback, and a shared sense of purpose Key Responsibilities Team Leadership Lead and mentor a high-performing team of performance verification engineers Foster a culture of innovation, technical rigor, and continuous improvement Provide strategic direction across multiple concurrent verification programs Program Leadership Define and execute the performance verification strategy for high-performance x86 CPU cores Collaborate with architecture, u-arch, RTL, performance modeling, firmware, and software teams to define and validate performance KPIs Ensure timely delivery of simulation/emulation results, and optimization feedback loops Performance Analysis & Correlation Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency Validate and debug Performance Monitoring Counters (PMC) to ensure accurate performance visibility Drive correlation between RTL and performance models, ensuring architectural intent is met Analyze performance bottlenecks using simulation, emulation, and silicon data Toolchain & Methodology Build and maintain scalable, modular performance verification infrastructure Lead emulation-based performance setup and debug, enabling early performance validation Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals AI-Driven Infrastructure Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements Leverage data-driven techniques to optimize verification coverage and reduce debug cycles Cross-Functional Collaboration Partner with x86 architecture, RTL design, physical design, and software teams to ensure performance targets are met Influence design decisions through data-backed performance insights Stakeholder Management Align verification goals with business and product roadmaps Communicate performance status, risks, and trade-offs to executive leadership and stakeholders Industry Awareness Stay current with trends in CPU architecture, performance modeling, and verification technologies Evaluate and adopt emerging tools and techniques to maintain a competitive edge Preferred Experience 20+ years of industry experience with performance modeling and simulation tools (e g , cycle-accurate simulators, emulators) with strong background in CPU microarchitecture, performance analysis, and system-level performance verification Proven leadership in managing large, cross-functional engineering teams Familiarity with PMC DV, latency and throughput validation, emulation platforms, and performance debug flows Deep understanding of x86 ISA, microarchitecture, and performance metrics Experience in developing performance test suites, performance triage tools, and simulation/emulation infrastructure Expertise in performance analysis tools, correlation techniques, and workload optimization Strong analytical and problem-solving skills with a data-driven mindset Excellent communication and interpersonal skills Deep knowledge of modern out-of-order CPU cores, memory subsystems, and performance modeling is a plus Experience with ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction is a plus Exposure to high-performance computing (HPC), virtualization, or server-class CPUs Background in hardware/software co-design and performance-aware compiler optimizations Familiarity with pre-silicon and post-silicon debug methodologies Academic Credentials Bachelors/Masters/Ph D in electrical engineering, Computer Engineering, or related field LOCATION: Bangalore AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law EOE/MFDV Benefits offered are described: AMD benefits at a glance AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicantsneeds under the respective laws throughout all stages of the recruitment and selection process

So, what’s the role all about? We are seeking a highly skilled Senior Performance Engineer to lead the performance validation of our complex enterprise software product . This software handles massive transaction loads , operates across multiple operating systems and databases , and is deployable both on-premises and in the cloud . The ideal candidate will have strong expertise in performance testing, including workload modeling, test planning, execution, analysis, and reporting, with a focus on ensuring scalability, responsiveness, and stability under varying load conditions. How will you make an impact? Performance Testing: Performance Testing and Analysis Design and execute performance benchmarking, load testing, and stress testing strategies. Conduct performance tests to evaluate system behaviour under different load conditions (e.g., load testing, stress testing, scalability testing). Analyse and interpret performance test results, identify bottlenecks, and recommend solutions. Develop performance test plans, test cases, and execution strategies. Track performance metrics and trends over time to ensure consistency and stability of systems. Performance Benchmarking Perform benchmarking activities to understand and measure system performance against industry standards and best practices. Application Monitoring Continuously monitor the performance of applications in cloud-based pre-production environments. Utilize application performance management (APM) tools (e.g., Jprofiler, Open-source tools, etc.) to detect and troubleshoot performance issues. Implement observability solutions, leveraging tools like Prometheus, Grafana, New Relic, Dynatrace, or Datadog for real-time performance monitoring. Troubleshooting and Issue Resolution Investigate and resolve performance-related issues across multiple platforms (web, backend services). Work with teams to implement effective root cause analysis for performance failures. Identify, diagnose, and optimize performance bottlenecks across the entire technology stack (application, database, infrastructure, and cloud environments) Automation and Scripting Develop automated scripts and frameworks for creating complex financial data, load, and performance testing. Leverage automation tools (e.g., JMeter, LoadRunner, Gatling) to run performance tests and gather metrics. Develop and maintain performance test suites using industry-standard tools (JMeter, Gatling, LoadRunner, etc.). Reporting and Documentation Create detailed reports with analysis, recommendations, and action plans for performance improvements. Maintain thorough documentation of performance tests, results, and optimization strategies. Have you got what it takes? Education: Bachelor’s or Master’s degree in Computer Science, Information Technology, Engineering, or a related field. Qualifications - Essential: 5-7 years of hands-on experience in performance engineering for enterprise-grade applications Hands-on experience with performance testing tools (e.g., Apache JMeter, LoadRunner, Gatling, NeoLoad or similar). Expertise in analysing CPU, memory, disk, and network performance in distributed systems. Basic understanding of profiling and tuning JVM-based applications (Java, Scala, Kotlin) or other modern runtime environments. Strong understanding of multi-threading, concurrency, and memory management . Familiarity with CI/CD pipelines and integrating performance testing into DevOps workflows. Excellent analytical and problem-solving skills with a deep understanding of system design. Qualifications - Preferred: Hands-on experience with database performance tuning (SQL query optimization, indexing, partitioning, caching, replication strategies). Experience with cloud-based performance optimization (AWS, Azure, or GCP) and containerized environments (Docker, Kubernetes). Experience with intelligent performance monitoring solutions Knowledge of event-driven architectures , Kafka , or messaging systems Previous experience optimizing serverless and microservices architectures Strong scripting skills in Python, Bash, Groovy or PowerShell for automation Familiarity with agile methodologies and DevOps practices Experience with infrastructure-as-code tools (e.g., Terraform, Ansible) Background in security performance testing In-depth knowledge of web technologies (HTTP, HTTPS, REST APIs) and application architectures What’s in it for you? Work on a high-impact, high-scale enterprise software product. Collaborate with top engineering talent in a dynamic, innovative environment. Competitive salary, benefits, and opportunities for career growth . If you are a performance-focused engineer who thrives in complex, high-scale environments, we’d love to hear from you! Enjoy NiCE-FLEX! At NiCE, we work according to the NiCE-FLEX hybrid model, which enables maximum flexibility: 2 days working from the office and 3 days of remote work, each week. Naturally, office days focus on face-to-face meetings, where teamwork and collaborative thinking generate innovation, new ideas, and a vibrant, interactive atmosphere. Requisition ID:6865 Reporting into: Tech Manager Role Type: Senior Performance Engineer

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Oversee all verification activities for a GPU component or subsystem, from initial planning to final sign-off. Develop verification plans and build, maintain UVM testbench components. Monitor, track, and report verification metrics to ensure closure. Provide verification-focused feedback during design specification discussions. Implement UVM testbenches, including writing tests, sequences, functional coverage, assertions, and verification plans. Take ownership of task definition, effort estimation, and progress tracking. Contribute to the enhancement and evolution of GPU verification methodologies. Lead, mentor, and support team members in verification activities. Engage in design and verification reviews, suggesting improvements where necessary. About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Demonstrated experience in developing verification environments for complex RTL designs. Strong understanding of constrained-random verification methodologies and the challenges of achieving verification closure. Ability to define verification requirements, determine implementation approaches, and design testbenches. Expertise in root-cause analysis of complex issues, with the ability to resolve them efficiently. Deep knowledge of SystemVerilog and UVM. Capability to develop and enhance verification flows. Familiarity with ASIC design methodologies, flows, and tools. Proficiency in planning, estimating, and tracking personal tasks. Experience managing multiple projects simultaneously. Strong communication skills for effectively conveying technical issues, both verbally and in writing. You might also have: Experience leading teams. Knowledge of Graphics, GPU, CPU, or SoC architectures. Experience with broader verification technologies, including formal property-based verification (FPV). Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++. Understanding of functional safety standards such as ISO26262.

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Design verification plans and develop, maintain UVM testbench components. Gain a deep understanding of the design and testbench under your responsibility. Build UVM testbenches, including writing tests, sequences, checkers, scoreboards, and verification/coverage plans. Take ownership of task definition, effort estimation, and progress tracking. Contribute to the improvement and evolution of GPU verification methodologies. Take ownership of coverage closure and provide verification metric reports. About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Experience in developing and maintaining verification components. Strong proficiency in SystemVerilog, UVM, and constrained-random verification methodologies. Skilled in debugging and identifying root causes of issues. Effective communication of technical issues, both verbally and in writing. You might also have: Knowledge of Graphics, GPU, CPU, or SoC architectures. Experience with broader verification technologies, including formal property-based verification (FPV). Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you Position Overview Siemens EDA is looking for a highly motivated Product Engineer to help define, promote, and deploy hardware assisted acceleration with Veloce emulation and prototyping solutions at leading edge semiconductor and systems customers. As a hardware-assisted verification solutions expert you will be part of the world-wide Veloce experts team working with emulation and prototyping solutions for pre and post silicon validation, verification and software bring-up of industrys most complex SoC and FPGA designs using the latest advances in co-emulation technologies with Veloce Transactor Layer (VTL) transactors and testbenches. Key responsibilities Assist applications engineers (AEs) and customers with integration and debug of verification solutions to enable Testbench acceleration in a hardware-assisted verification environment Support PCIe, AMBA-based, UART, and serial protocol (SPI, I2C, ") transactors targeting emulation and prototype platforms. Build or support example designs for solutions that use SystemC or UVM transactors. Drive Veloce technology at various customers using hands-on technical expertise. Requires working directly with customers to ensure technical results are met. Promote technical customer service to build and improve customer relationships, ensuring long term customer happiness. Work closely with the sales team in a focused strategy to expand our business. Provide feedback and product ideas to our solutions product development teams. Troubleshoot and remove technical obstacles. Work very closely with all team member to ensure full customer happiness. Develop and deliver technical presentations/trainings on new features and product updates. Communicate customers' technical requirements to product marketing. Develop a network of technical relationships at a peer-to-peer level with our customers. Use complex design and tooling tasks involving multiple design environments. Cogently communicate software problems to product development. Assists other specialists in the design, development, and implementation of large-scale solutions on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Use advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Responsible for in-depth technical papers and presentations to customer management or at technical conferences. Guide junior engineers. Work with minimal direction on complex projects with latitude for independent judgment and discretion. Well skilled with broad proficiency. Required Qualifications We seek a graduate (Bachelor's) with 5+ years of related experience or post graduate (Master's) with 3+ years of proven track record. Familiarity with Verilog/SystemVerilog or SystemC and UVM Must have experience with emulation of large scale CPU, GPU or Systems-on-Chip (MPSoC) designs, emulation technologies, usages and industry approaches. Prior experience in a customer facing function such as application engineer from an emulation or prototype systems provider a plus! We've got a lot to offer, how about you A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! #LI-EDA #LI-HYBRID

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Nice to haves - Knowledge of verification principles and coverage. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Roles and Responsibilities Design verification using UVM (Universal Verification Methodology) for IP/SoC level verification. Develop test benches from scratch, including creating drivers, monitors, and predictors. Utilize System Verilog to write verification code and debug issues. Collaborate with cross-functional teams to identify requirements and develop test plans. Participate in peer reviews to ensure high-quality deliverables. Desired Candidate Profile 4-10 years of experience in SOC/IP Verification with expertise in DV on Cpu, DDR, Ethernet, PCIe protocols. Bachelor's degree (B.Tech/B.E.). Master's degree preferred but not mandatory (M.Tech). Strong understanding of GLS (Global Logic Synthesis) concepts.

• Develop SoC verification plans focused on IP block interoperability & SOC/ System level. • Develop RAL test plan at SOC/IP level. • Verify SoC using advanced verification methodologies. • HW/SW Co-Verification environment - test-benches, use-cases. Required Candidate profile • 10+ years in DV full-chip Exp. • Strong in UVM & testbench architecture • SV/UVM testbench & assertion Development • Hands-on RAL model development (UVM) • Interface knowledge: AXI, APB, AHB

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Company: Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are looking for a highly skilled and experienced Thermal and Peak Current Limits Performance Engineer to join our engineering team. In this role, you will be responsible for ensuring the thermal performance and peak current limits of our products. You will collaborate with cross-functional teams like architecture, power and design to analyze, and optimize thermal systems, peak current contraints and components, ensuring they meet performance and reliability standards. Key Responsibilities: Thermal Analysis and Design: Conduct detailed thermal analysis and design for various components and systems to ensure optimal performance and reliability. Must requirement: Understanding of general Power HW/SW and Limits Management HW/SW architecture and framework Desirable to understand CPU, graphics and AI HW engine and architecture Understanding of Powe grid and chipset architecture Ability to analyze and deep dive into Limits throttling mechanisms effectives, efficiencies, latencies and Performance Ability to debug and analyze Power Thermal Performance issues Hands ON for characterization and profiling of Power, thermal and electrical spec Handling measuring equipment for Power and thermal Peak Current Limits Analysis: Evaluate and optimize peak current limits to ensure safe and efficient operation of electrical systems. Simulation and Modeling: Knowledge on Utilize advanced simulation and modeling tools to predict thermal behavior and peak current limits, identifying potential issues is desirable Testing and Validation: Develop and execute test plans to validate thermal performance and peak current limits, ensuring compliance with design specifications. Performance Optimization: Identify and implement strategies to optimize thermal performance and peak current limits. Collaboration: Work closely with design, chipset/platform architecture, and product test teams to integrate thermal and peak current solutions into product development. Documentation: Prepare comprehensive technical reports and documentation to support design decisions and project milestones. Problem Solving: Troubleshoot and resolve thermal and electrical-related issues in existing products and during the development phase. Providing HW and SW Limits Mechanism solutions to manage thermal and electrical risks Proficiency in system level debug analysis, efficient usage of Power performance tools for debug and providing detailed analysis Innovation: Stay updated with the latest advancements in thermal engineering and peak current limits, applying innovative solutions to improve product performance. Qualifications: Education: Bachelor's or Master's degree in Electrical/Electronics & communications Engineering, Mechanical Engineering, Thermal Engineering, or a related field. Experience: Minimum of 7+ years of relevant experience in area of Power, Thermal and limits management analysis, design, and optimization Technical Skills: Knowledge and good understanding of thermal simulation software (e.g., ANSYS, COMSOL), CAD tools, and data analysis, is added advantage. Analytical Skills: Strong analytical and problem-solving skills with the ability to interpret complex data. Communication: Excellent verbal and written communication skills to effectively collaborate with cross-functional teams. Attention to Detail: High level of attention to detail and accuracy in work. Team Player: Ability to work effectively in a team environment and contribute to team success. Preferred Qualifications: Experience with thermal management and peak current limits in electronics or semiconductor industries. Knowledge of industry standards and regulations related to thermal performance and peak current limits. Familiarity with thermal testing equipment and methodologies. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. : Would be working on Qualcomm SoC System level Power and Performance in bare-metal validation environment. Develop comprehensive testplan for power and performance validation of the SoC both from a usecase requirement as well as design delta motivated. Determine Key Performance Indicator for the performance study by working closely with the respective IP teams in Design, DV and validation. Validation of System Low Power Modes, SoC shared rail power collapse validation Responsible for driving deep dive analysis on performance issues, bottlenecks and validating fixes or workarounds on subsystem and related SOC Modules. The ideal candidate would have a strong SoC architecture background along with good embedded system concepts on modern ARM/X86 based chipsets. Interface with subsystem validation, debug tools and SW teams during debugs. Develop low-level custom code on ARM and Hexagon Q6 processors using C/C++ and validate functionality and performance KPIs using debug trace dump Job : Bachelor's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 5+ years of full time experience ORMasters's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 3+ years of full time experience Familiar with CPU and SoC Architecture and micro-architecture, preferably ARM or ARM processor-based systems, clocking schemes, hierarchical memory systems, cache configurations and coherency issues in multi-core systems. Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design Experience with workload performance characterization, bandwidth and latency analysis, and driving microarchitecture investigations on CPU/GPU/Multimedia Systems with relevant performance metrics. Logical thinking and problem-solving ability with focus on performance centric validation Familiar with pre-silicon validation environments with Emulation and Virtual Bring-Up, etc. Basic statistics and data analysis skills to identify performance trends from large data sets and the technical bent to investigate anomalies (Good to have) Strong programming experience in at least one languageC,C++, Python (Must have) Good communication, English speaking/writing and team work attitude

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Additional o BE/BTech degree in CS/EE with 3+ years’ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.