134 Cpu Jobs - Page 3

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you Position Overview Siemens EDA is looking for a highly motivated Product Engineer to help define, promote, and deploy hardware assisted acceleration with Veloce emulation and prototyping solutions at leading edge semiconductor and systems customers. As a hardware-assisted verification solutions expert you will be part of the world-wide Veloce experts team working with emulation and prototyping solutions for pre and post silicon validation, verification and software bring-up of industrys most complex SoC and FPGA designs using the latest advances in co-emulation technologies with Veloce Transactor Layer (VTL) transactors and testbenches. Key responsibilities Assist applications engineers (AEs) and customers with integration and debug of verification solutions to enable Testbench acceleration in a hardware-assisted verification environment Support PCIe, AMBA-based, UART, and serial protocol (SPI, I2C, ") transactors targeting emulation and prototype platforms. Build or support example designs for solutions that use SystemC or UVM transactors. Drive Veloce technology at various customers using hands-on technical expertise. Requires working directly with customers to ensure technical results are met. Promote technical customer service to build and improve customer relationships, ensuring long term customer happiness. Work closely with the sales team in a focused strategy to expand our business. Provide feedback and product ideas to our solutions product development teams. Troubleshoot and remove technical obstacles. Work very closely with all team member to ensure full customer happiness. Develop and deliver technical presentations/trainings on new features and product updates. Communicate customers' technical requirements to product marketing. Develop a network of technical relationships at a peer-to-peer level with our customers. Use complex design and tooling tasks involving multiple design environments. Cogently communicate software problems to product development. Assists other specialists in the design, development, and implementation of large-scale solutions on multiple software products and hardware platforms. Provides business and technical feedback to software and hardware vendors. Use advanced data exchange methodologies to facilitate effective data sharing between dissimilar systems or applications that span across engineering disciplines. Responsible for in-depth technical papers and presentations to customer management or at technical conferences. Guide junior engineers. Work with minimal direction on complex projects with latitude for independent judgment and discretion. Well skilled with broad proficiency. Required Qualifications We seek a graduate (Bachelor's) with 5+ years of related experience or post graduate (Master's) with 3+ years of proven track record. Familiarity with Verilog/SystemVerilog or SystemC and UVM Must have experience with emulation of large scale CPU, GPU or Systems-on-Chip (MPSoC) designs, emulation technologies, usages and industry approaches. Prior experience in a customer facing function such as application engineer from an emulation or prototype systems provider a plus! We've got a lot to offer, how about you A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! #LI-EDA #LI-HYBRID

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Nice to haves - Knowledge of verification principles and coverage. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Roles and Responsibilities Design verification using UVM (Universal Verification Methodology) for IP/SoC level verification. Develop test benches from scratch, including creating drivers, monitors, and predictors. Utilize System Verilog to write verification code and debug issues. Collaborate with cross-functional teams to identify requirements and develop test plans. Participate in peer reviews to ensure high-quality deliverables. Desired Candidate Profile 4-10 years of experience in SOC/IP Verification with expertise in DV on Cpu, DDR, Ethernet, PCIe protocols. Bachelor's degree (B.Tech/B.E.). Master's degree preferred but not mandatory (M.Tech). Strong understanding of GLS (Global Logic Synthesis) concepts.

• Develop SoC verification plans focused on IP block interoperability & SOC/ System level. • Develop RAL test plan at SOC/IP level. • Verify SoC using advanced verification methodologies. • HW/SW Co-Verification environment - test-benches, use-cases. Required Candidate profile • 10+ years in DV full-chip Exp. • Strong in UVM & testbench architecture • SV/UVM testbench & assertion Development • Hands-on RAL model development (UVM) • Interface knowledge: AXI, APB, AHB

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Company: Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: We are looking for a highly skilled and experienced Thermal and Peak Current Limits Performance Engineer to join our engineering team. In this role, you will be responsible for ensuring the thermal performance and peak current limits of our products. You will collaborate with cross-functional teams like architecture, power and design to analyze, and optimize thermal systems, peak current contraints and components, ensuring they meet performance and reliability standards. Key Responsibilities: Thermal Analysis and Design: Conduct detailed thermal analysis and design for various components and systems to ensure optimal performance and reliability. Must requirement: Understanding of general Power HW/SW and Limits Management HW/SW architecture and framework Desirable to understand CPU, graphics and AI HW engine and architecture Understanding of Powe grid and chipset architecture Ability to analyze and deep dive into Limits throttling mechanisms effectives, efficiencies, latencies and Performance Ability to debug and analyze Power Thermal Performance issues Hands ON for characterization and profiling of Power, thermal and electrical spec Handling measuring equipment for Power and thermal Peak Current Limits Analysis: Evaluate and optimize peak current limits to ensure safe and efficient operation of electrical systems. Simulation and Modeling: Knowledge on Utilize advanced simulation and modeling tools to predict thermal behavior and peak current limits, identifying potential issues is desirable Testing and Validation: Develop and execute test plans to validate thermal performance and peak current limits, ensuring compliance with design specifications. Performance Optimization: Identify and implement strategies to optimize thermal performance and peak current limits. Collaboration: Work closely with design, chipset/platform architecture, and product test teams to integrate thermal and peak current solutions into product development. Documentation: Prepare comprehensive technical reports and documentation to support design decisions and project milestones. Problem Solving: Troubleshoot and resolve thermal and electrical-related issues in existing products and during the development phase. Providing HW and SW Limits Mechanism solutions to manage thermal and electrical risks Proficiency in system level debug analysis, efficient usage of Power performance tools for debug and providing detailed analysis Innovation: Stay updated with the latest advancements in thermal engineering and peak current limits, applying innovative solutions to improve product performance. Qualifications: Education: Bachelor's or Master's degree in Electrical/Electronics & communications Engineering, Mechanical Engineering, Thermal Engineering, or a related field. Experience: Minimum of 7+ years of relevant experience in area of Power, Thermal and limits management analysis, design, and optimization Technical Skills: Knowledge and good understanding of thermal simulation software (e.g., ANSYS, COMSOL), CAD tools, and data analysis, is added advantage. Analytical Skills: Strong analytical and problem-solving skills with the ability to interpret complex data. Communication: Excellent verbal and written communication skills to effectively collaborate with cross-functional teams. Attention to Detail: High level of attention to detail and accuracy in work. Team Player: Ability to work effectively in a team environment and contribute to team success. Preferred Qualifications: Experience with thermal management and peak current limits in electronics or semiconductor industries. Knowledge of industry standards and regulations related to thermal performance and peak current limits. Familiarity with thermal testing equipment and methodologies. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. : Would be working on Qualcomm SoC System level Power and Performance in bare-metal validation environment. Develop comprehensive testplan for power and performance validation of the SoC both from a usecase requirement as well as design delta motivated. Determine Key Performance Indicator for the performance study by working closely with the respective IP teams in Design, DV and validation. Validation of System Low Power Modes, SoC shared rail power collapse validation Responsible for driving deep dive analysis on performance issues, bottlenecks and validating fixes or workarounds on subsystem and related SOC Modules. The ideal candidate would have a strong SoC architecture background along with good embedded system concepts on modern ARM/X86 based chipsets. Interface with subsystem validation, debug tools and SW teams during debugs. Develop low-level custom code on ARM and Hexagon Q6 processors using C/C++ and validate functionality and performance KPIs using debug trace dump Job : Bachelor's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 5+ years of full time experience ORMasters's degree in Engineering, Computer Science, Electronics/Electrical Engineering or related field and 3+ years of full time experience Familiar with CPU and SoC Architecture and micro-architecture, preferably ARM or ARM processor-based systems, clocking schemes, hierarchical memory systems, cache configurations and coherency issues in multi-core systems. Fundamental understanding of Static, Leakage and Dynamic power in a semiconductor design Experience with workload performance characterization, bandwidth and latency analysis, and driving microarchitecture investigations on CPU/GPU/Multimedia Systems with relevant performance metrics. Logical thinking and problem-solving ability with focus on performance centric validation Familiar with pre-silicon validation environments with Emulation and Virtual Bring-Up, etc. Basic statistics and data analysis skills to identify performance trends from large data sets and the technical bent to investigate anomalies (Good to have) Strong programming experience in at least one languageC,C++, Python (Must have) Good communication, English speaking/writing and team work attitude

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Minimum Qualifications: Bachelor's degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 2+ years of experience with ASIC design and verification 2+ years of experience with low-power ASIC optimization Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.* Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. Preferred Qualifications: Master's or PhD degree or equivalent in Computer Engineering, Computer Science, Electrical Engineering, or related field. 3+ years of experience with advanced CPU/GPU architecture/microarchitecture design development 5+ years of experience with VLSI design and verification 5+ years of experience with low-power ASIC design techniques Experience with industry tools such as PrimeTime PX and Power Artist Experience with Vulkan, DirectX3D, OpenGL, OpenCL, or Cuda development Experience with GPU driver and compiler development Skills: C/C++ Programming Language, Scripting (Python/Perl), Assembly, Verilog/SystemVerilog, Design Verification

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Additional o BE/BTech degree in CS/EE with 3+ years’ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years’ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred : o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Will be working on Qualcomm Snapdragon SoC HW performance with High Level OS Like Windows, Linux ++ BenchmarkingConduct comprehensive performance benchmarking using industry-standard benchmarks to evaluate system performance Performance OptimizationAnalyze and optimize the power and performance of gaming CPUs, GPUs, and other compute components. Power ManagementDevelop and implement power management strategies to enhance energy efficiency without compromising performance System AnalysisPerform detailed system analysis to identify performance bottlenecks and propose solutions. CollaborationWork closely with hardware and software development teams to ensure seamless integration of power and performance features. Develop comprehensive test plan for power and performance validation of the SoC both from a use case requirement as well as capability of the design. Determine which KPIs are relevant for the power and performance study by working closely with the respective subsystem teams in design, DV and validation. Passionate for deep dive analysis on performance issues, bottlenecks and validating fixes or workarounds on subsystem and related SOC Interface with subsystem validation, competitive analysis, debug tools and SW teams during debugs Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Would be working on Qualcomm Snapdragon CPUSS Architecture and performance team. Responsible for analyzing the performance aspects of Snapdragon CPU subsystem and influence the same for performance uplifts in upcoming revisions. Will be guiding the execution team by projecting CPUSS performance in upcoming chips and correlating them with pre-silicon runs and post silicon measurements. Responsible for driving deep dive analysis on performance issues, bottleneck providing fixes or workarounds on CPU subsystem and related SOC Modules. The ideal candidate to have a strong CPU architecture / analysis background along with overall SOC wide exposure and Embedded system concepts on modern chipsets-based ARM/X86 Essential Skills and Experience Familiar with Microprocessor and/or SoC Architecture and micro-Architecture, preferably ARM processors and ARM processor-based systems. Experience of ARM based System Designs, Knowledge of CPU and hierarchical memory system, cache configurations and coherency issues in multi-core systems . Experience with workload performance characterization, bottleneck analysis, and driving microarchitecture investigations on CPU /GPU/Systems with relevant performance matrix Hands-on with Lauterbach debug environment, Emulation platforms and experience in working with bare-metal environment with knowledge of Linux boot. Engage with architects and design teams to investigate next-generation CPU microarchitecture performance features through workload-driven investigations, especially well-known CPU benchmarks like Lmbench, Spec, Geekbench . Develop, simulate workloads for pre-silicon performance analysis and performance projections on silicon. Lead initiatives for performance technology alignment across product engineering teams Good to have Minimum 8 + years years of experience on relevant areas. Strong data analysis skills to identify performance trends from large data sets and the technical bent to investigate anomalies Understanding of Linux and Android internals from a performance point of view. Strong programming experience in at least one languageC/C++, Perl, Python Familiarity with hardware/software level performance analysis of industry standard benchmarks & open source applications. Excellent debugging skills at SoC and System level Excellent communication skills and ability to collaborate with peers and senior architects/design engineers across the globe. Familiar with pre-silicon environments such as Verification, Emulation and Virtual Bring-Up, etc. Good knowledge of high-performance microprocessor architecture and complex SoC Pre-silicon performance experience is a huge plus Post Silicon Experience and debugging on the devices using relevant Debug tools and Bus profiling tools are added advantage. Educational qualification Bachelor's degree in Electrical, Electronics or Computer Engineering and/or Computer Science, with 6+ years of experience in SOC/CPU post-silicon validation / performance analysis Strong knowledge of modern OS kernel (Android, Linux) , enable Linux/Android during bring-up

Experience: 3 to 12 Years of Exp , Must Haves: Development Embedded System software experience in in device drivers and board-support packages for complex SoCs Development experience in Embedded domain using C/C++ Programming Strong working knowledge of operating systems like Linux / QNX Working experience on board bring up activities Strong Working knowledge of at least 1 of the IPs Power mgmt., CPU and/or UFS/storage domain Experience in working on any Linux/Android Drivers Driver development on PCIe / Ethernet / UFS Embedded System software, Device drivers and board-support packages for complex SoCs Embedded domain using C/C++ Programming Linux / QNX Operating Systems Board Bring Up activities Power mgmt., CPU and/or UFS/storage domain Linux/Android Drivers PCIe / Ethernet / UFS Role The engineer is expected to contribute to an advanced software development environment facilitating board bring-up, development, and delivery. The engineer is expected to develop and debug software prototypes including device driver software Hands on in kernel debugging, Boot failure issues and Power management and Storage issues Software System development and bug fixing on Automotive Chipsets for products based on Android/Linux/QNX OS platforms. Development and implementation of an efficient and transparent variant handling and re-use concept for the platform

Minimum qualifications:. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.. 3 years of experience with verification methodologies and languages such as UVM and SystemVerilog.. Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem or Full chip level.. Experience in performance and latency architecture for an Anycast Redirector Maglev (ARM) based SOC.. Experience in mobile SOC performance model development, performance analysis, and workload characterization.. Experience performance measurement and debugging in an emulation environment.. Preferred qualifications:. Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.. Experience in low-power design verification.. Experience in microarchitecture innovation.. Knowledge of CPU, GPU benchmark characterization.. Knowledge in system software components, such as Linux, drivers, and runtime.. Knowledge of performance analysis tools.. About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.. Responsibilities. Develop simulators and architectural models of Google's Tensor System on a Chip (SOC).. Collaborate with system architects, SoC and CPU/GPU/TPU architects/designers, and software and application experts to understand current and future requirements.. Participate in architectural and design evaluation of Tensor SOC features studies.. Perform pre-silicon performance simulation and correlate with pre and post-silicon measurements.. Communicate analysis results qualitatively and quantitatively.. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .. Show more Show less

Choosing Capgemini means choosing a company where you will be empowered to shape your career in the way you’d like, where you’ll be supported and inspired bya collaborative community of colleagues around the world, and where you’ll be able to reimagine what’s possible. Join us and help the world’s leading organizationsunlock the value of technology and build a more sustainable, more inclusive world. Install, upgrade, and maintain DB2 on z/OS and related ISV tools. Configure and manage DB2 subsystems in both data sharing and non-data sharing environments. Perform DB2 disaster recovery, backups, restores, and performance tuning. Build and relocate DB2 subsystem environments as needed. Apply maintenance updates and patches using SMP/E. Develop and maintain REXX scripts for automation and DB2 interaction. Monitor DB2 performance using traces, utilities, and performance monitors. Collaborate with operations and automation teams to define and implement procedures. Provide technical recommendations and support for DB2 environments. Ensure security compliance in RACF/Top Secret/ACF2 environments. Primary Skills Strong knowledge of DB2 on z/OS and relational database concepts. Experience with DB2 utilities (COPY, REORG, LOAD, UNLOAD). Proficiency in DB2 toolsSPUFI, QMF, IBM DB2 Admin Tool, Object Comparison Tool, Infosphere Optim, High Performance Unload. Expertise in DB2 performance tuning, query optimization, and CPU utilization analysis. Experience with DB2 stored procedures, recovery to PIT, and DBADM/SYSADM authority. Familiarity with SMP/E, REXX, Assembler, and JCL.

Job Title: Verification Engineer SV/UVM | CPU/SOC/IP | 36 Years | Bangalore Location: Bangalore, Pune Experience: 3 to 6 Years Notice Period: Immediate to 15 Days (Strictly only) Employment Type: Full-Time / Permanent Industry: Semiconductors / ASIC Design Job Overview: We are urgently hiring passionate and skilled Verification Engineers to join our dynamic team in Bangalore, Pune . This is an exciting opportunity to work on cutting-edge SoC, CPU, and IP-level verification projects . We are looking for engineers who thrive in challenging environments and are ready to contribute from day one . Key Responsibilities: Develop testbenches using SystemVerilog (SV) and UVM methodology Create, execute, and maintain test cases for functional and directed/random verification Work on IP-level, SoC-level , or CPU verification based on project allocation Perform debugging, coverage analysis , and assertion-based verification Collaborate with RTL designers, architects, and verification leads to ensure comprehensive test coverage Review and contribute to verification plans and specifications Must-Have Skills: 3.5 to 6 years of experience in ASIC/SoC/IP verification Strong hands-on expertise in SystemVerilog and UVM Proficient in testbench architecture and test case development Good debugging and problem-solving skills Experience with simulation tools like VCS, Questa, Incisive , etc. Exposure to code coverage, functional coverage, and regression analysis Good to Have: Prior experience in CPU or SoC level verification Familiarity with scripting (Python, Perl, Shell) Knowledge of formal verification and assertion-based techniques Why Join Us? Work on next-gen ASIC and SoC technologies Opportunity to collaborate with top semiconductor minds Dynamic, inclusive work environment with strong technical mentorship Accelerated career growth with challenging project exposure If you're available to join within 15 days and meet the above criteria, we want to hear from you! Apply now with your updated resume and notice period.

Req ID: 126192 Remote Position: No Region: Asia Country: India State/Province: Chennai City: Guindy, Chennai Principal Engineer, Software Celestica is looking for a talented and passionate software engineers who can help drive next generation data center and AI compute blades to join our team You'll be responsible for designing, developing, and testing software that runs on SmartNICs, enabling high-performance networking and offloading critical workloads from the main CPU, Key Responsibilities Software Development You'll be responsible for designing, developing, and testing software that runs on SmartNICs, enabling high-performance networking and offloading critical workloads from the main CPU, Optimize code for performance, efficiency, and low latency Innovate new ideas in conjunction with networking engineers to optimize overall data center efficiency Architect solutions for customers data center management needs working with multiple lower-level drivers, OS, libraries Hardware Integration You'll be responsible for designing, developing, and testing software that runs on SmartNICs, enabling high-performance networking and offloading critical workloads from the main CPU, Troubleshoot and resolve hardware-software interaction issues Performance Optimization Analyze and optimize network performance, identifying bottlenecks and implementing solutions, Develop and implement performance testing methodologies and tools, Security Design and implement security features for SmartNIC software, ensuring data integrity and confidentiality Stay up-to-date on security best practices and vulnerability remediation Collaboration Work effectively in a team environment, collaborating with engineers and peer functional leads from different disciplines to innovate solutions, triage issues and speed execution Work with product line management, customers and sales teams to understand requirements Explain the value addition software brings to technical and non-technical audiences, Leadership Mentor and coach team members on the technical skills and approaches to solve problems, Review and maintain quality of code going into production, Architect software applications that will work across multiple technology generations with minimal changes, Present innovation and value addition from our software in technical forums and customer interactions Knowledge/Skills/Competencies Strong programming skills: Proficiency in C, C++, P4 and other low-level programming languages, Networking knowledge: Deep understanding of networking protocols (TCP/IP, Ethernet, etc ) and concepts Operating system knowledge: Experience with Linux driver kernel development is a plus Hardware experience: Familiarity with main elements of CPU, DPU, memory, NICs, board monitoring elements is a must Debugging and testing skills: Ability to identify and resolve software and hardware issues, Problem-solving skills: Strong analytical and problem-solving abilities Experience with GPU programming: Prior experience GPU libraries like CUDA and ROCm is huge plus Experience with SmartNICs: Prior experience developing software for SmartNICs and understanding of cloud computing architectures and services is the plus Clear Communication: Proven ability to articulate requirements and vision to large and diverse audience through written documents like architecture specifications and verbal presentations in technical forums is required, Physical Demands Duties of this position are performed in a normal office environment, Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data, Repetitive manual movements (e-g , data entry, using a computer mouse, using a calculator, etc ) are frequently required, Occasional travel may be required, Typical Experience 15-20 years Typical Education Bachelor degree or higher education in Engineering Notes This job description is not intended to be an exhaustive list of all duties and responsibilities of the position Employees are held accountable for all duties of the job Job duties and the % of time identified for any function are subject to change at any time, Celestica is an equal opportunity employer All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law), At Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported Special arrangements can be made for candidates who need it throughout the hiring process Please indicate your needs and we will work with you to meet them, Company Overview Celestica (NYSE, TSX: CLS) enables the worlds best brands Through our recognized customer-centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers, Celestica would like to thank all applicants, however, only qualified applicants will be contacted, Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services,

As a Senior C++ Developer, you will focus on developing Front Office Trading software, primarily working within the market data development teams. You will gain exposure to the full software stack, using modern development tools and concepts to deliver high quality, best practice software solutions. This will involve working on the end-to-end development of low latency software components written in C++. Project responsibilities will range from Design, Architecture and Development of greenfield projects to maintenance, latency tuning and enhancements. You will have the opportunity to take the lead on projects, mentor and support junior members of the team, and have a key input in the development of the team moving forwards. Desired Skills and experience Candidates should have a B.E./B.Tech/MCA/MBA in Finance, Information Systems, Computer Science or a related field 5+ years of experience as a Salesforce Service Cloud developer and/or administration Expertise in UDP Multicast TCP feed handling Direct experience with kernel bypass technologies Deep understanding of accelerated message parsing Ability to design lock-free, zero-copy data pipelines Strong grasp of CPU affinity, NUMA optimisation real-time tuning Experience with low-latency shared memory Hands-on with PTP time synchronisation and nanosecond time stamping Comfortable in environments where failure recovery gap detection are mission-critical Pragmatic about asynchronous logging and performance profiling under real-world loadsExcellent communication skills, both written and verbal Extremely strong organizational and analytical skills with strong attention to detail Strong track record of excellent results delivered to internal and external clients Able to work independently without the needs for close supervision and also collaboratively as part of cross-team efforts Experience with delivering projects within an agile environment Experience in project management and team management Key Responsibilities Developing Front Office Trading software, primarily working within the market data development teams Working on full software stack, using modern development tools and concepts to deliver high quality, best practice software solutions. Working on the end-to-end development of low latency software components written in C++ Design, Architecture and Development of greenfield projects to maintenance, latency tuning and enhancements. lead on projects, mentor and support junior members of the team, and have a key input in the development of the team moving forwards. Motivate, mentor on technical and delivery best practice to develop the team in a manner that is consistent with the companys policies and procedures. Evaluate and ensure quality of deliverables within project timelines Develop a strong understanding of equity market domain knowledge Collaborate with domain experts and business stakeholders to understand business rules/logics Ensure effective, efficient, and continuous communication (written and verbally) with global stakeholders Independently troubleshoot difficult and complex issues on dev, test, UAT and production environments Responsible for end-to-end delivery of projects, coordination between client and internal offshore teams and manage client queries Demonstrate high attention to detail, should work in a dynamic environment whilst maintaining high quality standards, a natural aptitude to develop good internal working relationships and a flexible work ethic Responsible for Quality Checks and adhering to the agreed Service Level Agreement (SLA) / Turn Around Time (TAT)

raja.a@honeybeetechsolutions.com resume to FTE CLIENT PROXELERA / SASKEN 1. Strong hands-on experience in Linux (preferably Ubuntu or embedded Linux) 2. Experience in benchmarking CPU and GPU performance 3. Exposure to Android (performance optimization, debugging, or system-level work) 4. Experience working on x86 or ARM SoCs (e.g., AMD, Intel, Qualcomm, NVIDIA) 5. Demonstrated execution mindset individuals who are curious, quick learners, self-driven, and bring strong ownership and focus 6. 8+ years of relevant industry experience 7. Immediate availability or ability to onboard at short notice

Role & responsibilities Those who had a chance to work on CPU, GPU and / or NPU would be better on 3 or 5 nm Technology . Experience Levels would 4-8 years.

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in system side / low level programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in data / address bus architecture, caches, memory management. Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc. Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit.

We are seeking a skilled Performance Tester with expertise in the public safety domain to join our team. The ideal candidate will have a strong background in performance testing and experience working with public safety applications and systems. Telecome Domain is must Key Responsibilities: 6+ years of previous hands-on experience as Performance tester in telecom & public safety domain . Strong experience in performance test planning, test estimation, script development, test execution, test results analysis Executing and analyzing performance tests routinely and recording history of the results Programming skills in programming languages such as Bash scripting, perl, Java, Python, Groovy, ELK stack, GRAFANNA, Jenkins, Justle programming, Node Js and Linux Expertise in configuring performance counters using PerfMon tool to identify the bottlenecks for CPU, Memory, Disk IO, Network Experience with Database testing and tuning Understanding of Networking concepts at all layers Experience with New Relic monitoring tool Experience with Log Monitoring tools Lets Work Together

JOB DESCRIPTION "Role: Graphics Engineer Working area: IVI Experience: ~6+ years Technical and domain skills: • Must have hands-on development experience in C, C++ • Hand on experience on Linux drivers & Linux Internals. • Hands on development experience in multi-threaded and multi-core environment. • Experience working with GPU's or CPU's or Device Drivers • Prior development experience in implementing/supporting Graphics driver for standards (OpenGL, Direct3D) is an advantage. • Good to have working experience in Automotive domain. • Good Communication and debugging skills • Nice to have exposure on QNX/RTOS • Skillset : C, Linux/Android/QNX, Android Graphics framework, Surface Flinger, OpenGL ES, Vulkan, Gralloc, DMABUF, Memory Management • Experience in using debugging tools such as JTAG, Trace32, RAM dump, ADB High level Roles and responsibilities: • Customer assistance with graphics software integration, development, customizations, debugging, documentation • Productizing Graphics drivers • Detailed GPU power and performance bottlenecks analysis and driving optimizations across Graphics SW • Collaborate with cross-functional teams, engineering for smooth execution Qualification and experience: • Bachelor’s or Master’s degree preferred. • Must have excellent communication skills, both written and verbal, with good debugging skills. • The ability to collaborate and integrate with existing team "

Bachelors or Masters degree in Electrical, Electronics or Computer Science Engineering Expertise in C++ programming Expertise in system side / low level programming Expertise in post silicon diagnostics development Expertise in post silicon diagnostics validation Expertise in data / address bus architecture, caches, memory management. Expertise in PC Hardware, SoC, Chipsets, CPU, GPU, BIOS, firmware etc. Expertise in x86 / computer architecture Expertise in OS internals Strong knowledge of software development life cycle Preferred resources with valid regional work permit Location - Bangalore, Belgrade, Penang, New York