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ASIC Silicon Design Engineer

4 - 9 years

32 - 40 Lacs

Posted:3 days ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
  • 4 years of experience with digital design in ASIC.
  • Experience in RTL design utilizing Verilog/System Verilog with ARM-based SoCs, interconnects, and ASIC methodology.
  • Experience in a scripting language, such as Python or Perl.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience.
  • Experience with AMBA (Advanced Microcontroller Bus Architecture) protocols.
  • Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
  • Experience with methodologies for low power estimation, timing closure, synthesis.
  • Experience with a scripting language like Python.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
  • Define microarchitecture details including interface protocols, block diagrams and data flow.
  • Perform RTL quality checks such as Lint, CDC, and Synthesis checks.
  • Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.
  • Collaborate within a team to develop and deliver optimized interconnect blocks and subsystems.
  • Coordinate with architecture, design verification, and implementation teams to ensure specification adherence and Communicate and work with multi-disciplinary and multi-site teams.

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