90 X86 Jobs - Page 3

raja.a@honeybeetechsolutions.com resume to FTE CLIENT PROXELERA / SASKEN 1. Strong hands-on experience in Linux (preferably Ubuntu or embedded Linux) 2. Experience in benchmarking CPU and GPU performance 3. Exposure to Android (performance optimization, debugging, or system-level work) 4. Experience working on x86 or ARM SoCs (e.g., AMD, Intel, Qualcomm, NVIDIA) 5. Demonstrated execution mindset individuals who are curious, quick learners, self-driven, and bring strong ownership and focus 6. 8+ years of relevant industry experience 7. Immediate availability or ability to onboard at short notice

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It s a unique legacy of innovation that s fueled by great technology and amazing people. Today, we re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what s never been done before takes vision, innovation, and the world s best talent. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA is seeking a Senior System Software Engineer to join our Linux kernel drivers team . As part of this role, you will play a crucial role in developing pioneering GPUs that drive millions of workstations, PCs, and notebooks. Our mission is to provide an exceptional visual computing experience, and we are looking to you to tackle complex system software challenges within our GPU software team. Join us as we explore the possibilities! What youll be doing: Improve existing software by debugging, analyzing, and providing solutions to complex issues in areas such as display technologies and power management. Design, develop, unit test, document, and maintain features for kernel mode drivers. Collaborate with forward-thinking and motivated engineers around the world as an equal member of a multi-site project team. Tackle a variety of problems that directly impact NVIDIA s end users and partner OEMs. Work closely with the GPU Resource Manager Kernel driver to improve visual computing experiences. What we need to see: Strong software engineering skills combined with a dedication to tackling hard problems. 7+ years of hands-on experience in writing and debugging kernel mode drivers on X86/AMD64 platforms. Excellent programming skills and proficiency in C/C++ language, libraries, and toolchains. Detailed knowledge of Linux kernel internals and low-level system programming. Good written and verbal communication skills, along with strong collaborative and networking abilities. Experience working on unreleased hardware platforms. Bachelors or Masters degree (or equivalent experience) in Computer Engineering, Computer Science, or a related field. Ways to stand out from the crowd: Experience with device driver development for ARM SOC platforms. Background in embedded system software concepts, such as RTOS and overlay programming models. Contributions to upstream projects. A passion for what you do. Widely considered to be one of the technology world s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www. nvidiabenefits. com/

S ENIOR SOFTWARE DEVELOPMENT ENGINEER THE ROLE: AMD is looking for a s enior software engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD s abilities to deliver the highest quality, industry-leading technologies to market. KEY RESPONSIBILITIES: The primary responsibility is the validation of BootROM, which includes the following tasks: Develop and execute test cases to validate all boot peripherals from where the FSBL (First Stage Boot Loader) is copied. Example: xSPI, SD, eMMC, UFS, USB Create and execute test cases to validate all proprietary boot sequences. Develop and execute test cases to validate all internal boot modes. Write and run test cases to validate all supported authentication algorithms. Develop and execute test cases to validate all supported encryption/decryption algorithms. Automate tests using Python. Perform testing on prototyping/emulation platforms, including X86 emulation. Identify, document, and track issues using JIRA. Report coverage metrics using tools such as Verdi and add tests to ensure maximum source line coverage. Review requirements and create associated test cases to ensure traceability. Collaborate with different teams to resolve any blockers. Engage in constructive discussions with the design team to improve the quality of the BootROM. Conduct security threat analysis using internal tools. Adhere to safety processes while performing the above tasks. ACADEMIC CREDENTIALS: Bachelor s or Master s degree in Computer/Software Engineering, Computer Science, or related technical discipline #LI-SK4 Benefits offered are described: AMD benefits at a glance .

SENIOR SOFTWARE SYSTEMS DESIGNER THE ROLE: This is an exciting role in which you will have excellent exposure to all the latest AMD (Adv anced Micro Devices) technologies . Imagine yourself as part of the team which will deliver our next generation of our products or automation for many of our reference solutions. This is a phenomenal opportunity to work in an outstanding company like AMD. THE PERSON: You are a self-starter who is able to achieve successful outcomes in a non-hierarchical environment. Detailed oriented, you have the ability to multitask through planning/organizing. You have excellent communication and presentation skills and a passion to push the limits of software on innovative platforms. KEY RESPONSIBILITIES: Independently work on various compiler phases Should be a key contributor and be able to influence both tactical and strategic directions. Contribute to the technical content of the compiler documentation/manuals. Develop a close working relationship with Compiler QA, Compiler Support and other performance/compiler teams PREFERRED EXPERIENCE: Expert in C/C++, preferably in production environments. Fortran is a plus. Excellent knowledge in various Compiler phases Hands on experience in any open source compilers (like GCC, LLVM etc) Excellent knowledge of micro-architectural features of modern microprocessors (eg; x86) is a plus Excellent programming/debugging skills even at the Assembly level. Good knowlege of scripting with Python, Shell, is an added advantage Experience with Linux environments Experience with software development process and tools such as debuggers and source code control systems a plus Good interpersonal and communication (written and oral) skills Experience with parallel programming domain (OpenMP, MPI etc) is a plus ACADEMIC CREDENTIALS: B achelors or Masters degree in Electronics Engineering or Computer Science, Engineering, or an equivalent Benefits offered are described: AMD benefits at a glance .

We are seeking an engineer to join our team that will thrive in a fast-paced work environment, using effective communication, problem-solving and prioritization skills. Individuals that are we'll organized, show great attention to detail, and employ critical thinking are we'll-suited for our team. THE PERSON: Successful candidate will work as part of the Platform Tools group on architecture, design and development of software solutions for next generation AMD microprocessors. bachelors degree or higher in Electronics or Computer Science from a reputed university and should have 10+ years of experience. Preferably, prior experience in semi-conductor industry and system software development Proven record of accomplishment of working within and across groups. A powerful desire to learn new skills and understand new features Effective communication skills KEY RESPONSIBILITIES: Lead software development - scope, architect, design and development of platform software tools. End to end ownership of modules and responsible for delivery of the same for various programs. Work closely with the team to understand design architecture and to propose solutions to improve and enhance products Work across groups to understand the requirements and participate in debug activities to find solutions for complex problems. Guide and mentor engineers, motivate the team and encourage them to think creatively Exploring opportunities to improve product REQUIRED SKILLS: Strong C++, C programming skills, System level software design and development experience Expert in software design, architecture, design patterns and object-oriented programming. Ability to do research, gather information, interpret data, prepare design proposals, flowcharts and diagrams. In-depth knowledge of the operating systems such as windows and Linux. Extensive experience with C++ programming and knowledge on other languages like Python, Javascript, etc Strong software and system debug experience. Experience in backend development and deployment. Extensive knowledge of the software development process and its technologies. Skills such as effective communication, ability to work with minimal input & directions, initiative and positive attitude. PREFERRED SKILLS: Good understanding of x86 architecture and CPU/GPU software domain. Knowledge of Pre-silicon and Post-silicon product life cycle will be added advantage Experience with STL, QT or any other GUI framework Knowledge of frontend development in React / Angular. Experience in distributed or decentralized systems. we'll aware about many software Technologies/Solutions across industry. ACADEMIC CREDENTIALS: bachelors or masters in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field

Job Summary This position is responsible for the evaluation, design, development, testing, operational maintenance, protection, and support of UPS technology assets through the entire life cycle. He/She contributes to the management of the evaluation, design, testing, implementation, maintenance, performance, capacity tuning, and support of third-party infrastructures, applications, and appliances. This position executes analysis, design, implementation, maintenance, and support of storage and back-up and recovery solutions. He/She provides analysis, design, implementation, maintenance, and support of an Information Systems Security model for UPS Information Services (I.S.) environments (e.g., mainframe, midrange, open systems and x86/x64 architectures, mobile and fixed devices, etc.). Responsibilities: Performs planning, diagnoses risk and system issues, and takes corrective actions to ensure continuity of operations. Identifies and implements technologies and processes to improve the reliability, efficiency, and availability of the systems environment Utilizes supplied specifications and standardized tools for work assignments of moderate risk, impact, complexity, and scope. Qualifications: Bachelors Degree or International equivalent in Computer Science or a related field - Preferred Experience managing projects

Mesh / Coherency Design Verification Engineer in Pune, MH, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Mesh / Coherency Design Verification Engineer in Bangalore, KA, India Mesh / Coherency Design Verification Engineer Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: You will work on the verification of a server-class microprocessor-based CPU/Coherent Mesh interconnect. Youll be involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of microprocessors. Youll also partner with other teams to accelerate post-silicon validation and debug of the product. In this role, you will be at the forefront of AI innovation, building AmpereOne Aurora, our groundbreaking AI compute solution. Aurora combines high-performance general-purpose CPUs with integrated AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. Define requirements for block level and subsystem level testing infrastructure Create test plans for unit-level and chip-level verification and post-silicon validation Architect, design and implement test benches and other components of design verification environment Create random test generators to find bugs in design Debug failures and drive speedy resolution of bugs Create coverage monitors and drive coverage to required quality targets Define post-silicon validation plans, and engage in post-silicon activities to accelerate product launch Lead verification activities within a team and guide other engineers to achieve project goals M.Tech in Electronics Engineering or Computer Engineering with 3+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 5+ years of semiconductor experience Solid understanding of high-performance microprocessor architecture concepts Experience using industry standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard languages like SVTB UVM/OVM Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) Experience in automating design, verification, and validation tasks Hands on experience in post-silicon validation Knowledge of ARM or x86 architecture and assembly language programming Previous experience in CPU/core design verification is preferred Previous experience in Network-on-chip (NoC) design verification is preferred Previous experience with Arm AMBA (APB/AHB/AXI/ACE/CHI) protocols is preferred Previous experience with formal verification is preferred What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Project description Performance Analyst in the compiler team is responsible for analyzing C/C++/Fortran benchmarks to identify the new compiler optimization opportunities as well as compiler shortcoming in terms of performance. The analysis will involve using various tools to identify the bottlenecks, root cause analysis and quantifying the analysis to confirm the gains obtained. The Performance Analyst will use this report to convince and drive the improvements in the compiler. The Performance Analysis Engineer will be responsible for conducting a detailed performance analysis on SPEC CPU and other key benchmarks. The role involves using compilers such as AOCC, and other key x86 compilers to evaluate performance on client and competitive platforms. The engineer will collaborate with cross-functional teams to drive performance improvements and ensure optimal product performance. Responsibilities Conduct performance analysis and optimization of SPEC CPU and other benchmarks on x86 architecture using AOCC and other competitive x86 compilers. Utilize profiling and debugging tools to identify performance bottlenecks and provide actionable insights. Collaborate with software development teams to implement performance improvements. Analyze instruction set architecture (ISA) to optimize code execution and efficiency. Engage in root cause analysis for performance-related issues and drive them to resolution. Develop and maintain scripts and tools for automated performance testing and data collection. Prepare detailed reports and presentations on performance findings and recommendations for stakeholders. Stay updated with the latest developments in compiler technologies and performance analysis methodologies. Communicate key findings and status updates to stakeholders and cross-functional teams. Skills Must have Minimum of 3 years of experience in performance analysis or a related field. Strong expertise in x86 architecture and instruction set architecture (ISA). Strong understanding of hardware and software system architecture and their implications on performance. Excellent programming/debugging skills at the Assembly level. Proficiency in using compilers such as AOCC, LLVM, GCC, and OneAPI. Experience with performance benchmarking tools and methodologies. Solid practical C/C++/Fortran experience Familiarity with both Windows and Linux operating systems for performance analysis. Ability to work in a fast-paced, deadline-driven environment. Excellent analytical skills and attention to detail. Strong communication skills, both written and verbal. Excellent analytical and problem-solving skills. Nice to have Strong communication skills and the ability to work collaboratively in a team environment. Other Languages EnglishB2 Upper Intermediate Seniority Regular

you will: Develop and integrate products deployed by leading service providers worldwide. Collaborate with a vibrant, BU-wide technical community to exchange ideas and innovate on next-generation technology. Explore opportunities for personal growth while mentoring colleagues and working on cutting-edge technologies. As a key member of this team, you will: Work alongside seasoned engineers to architect, design, and develop some of routers and solutions for the world's largest service provider, web centers, and enterprises. Contribute to the evolution of these systems to support exciting new customer business paradigms. Interact and collaborate with some of the finest talent in the industry, making work both fun and challenging. Engage with other groups such as Product Management, Marketing, Sales, Customer Support, and Advanced Services. Who You Are: You possess: In-depth knowledge of C and a solid understanding of Python. Extensive experience in a Unix/Linux-based development environment. Excellent coding, automation, and debugging skills. Strong teamwork and communication skills. Familiarity with hardware architectures such as PCI, PCIe, DMA, I2C, SPI , NPUs/DPUs and processors like x86, AMD, and ARM . Experience with board bringup is a plus. Experience with emerging technologies such as AI/ML and cloud computing is a plus. Experience and Qualifications: Experience: 9 to 12 years in embedded firmware development. Education: BE/B.Tech/ME/M.Tech/MS in CS/EE/IT/ECE, MCA, or similar education. Proven ability to derive design and code based on technical standards and write comprehensive, focused design documents. Experience in developing software/firmware for networking equipment. Excellent knowledge of software architecture and system design.

As a member of the Support organization, your focus is to deliver post-sales support and solutions to the Oracle customer base while serving as an advocate for customer needs. This involves resolving post-sales non-technical customer inquiries via phone and electronic means, as well as, technical questions regarding the use of and troubleshooting for our Electronic Support Services. A primary point of contact for customers, you are responsible for facilitating customer relationships with Support and providing advice and assistance to internal Oracle employees on diverse customer situations and escalated issues. Specific Knowledge and Experience: - Provide post-sales, hardware support remotely to Oracle X86 hardware platforms. - Good understanding of X86 system architectures and RAID technology. - Service processor knowledge and log collection for platform hardware troubleshooting - Hands-on and remote troubleshooting experience on Oracle X86 servers (Exdata, ODA, X8, X7 etc.) or other similar platforms. - system level troubleshooting skills and system administration skills under Linux, Windows or Solaris Operating Systems. - Added advantage to have knowledge of Cloud Infrastructure and support - Escalate calls to the appropriate level, in a timely manner - Have great analytical and problem solving skills - Good customer interaction and organizational skills, able to maintain a high level of customer satisfaction - Excellent verbal and written English Language communication skills - Good team player working in global environment with self motivating personality. - Effective time management skills and work prioritization capabilities. - Hands-on troubleshooting experience of GPU systems would be an added advantage - Any professional certifications like (i.e.MCSE, RHCE, Cloud etc.). - Employee is expected to work in designated Oracle office during their assigned shift. - 24*7 Support environment, ready to work in shifts As a Sr. Support Engineer, you will be the technical interface to customers, Original Equipment Manufacturers (OEMs) and Value-Added Resellers (VARs) for resolution of problems related to the installation, recommended maintenance and use of Oracle products. Have an understanding of all Oracle products in their competencies and in-depth knowledge of several products and/or platforms. Also, you should be highly experienced in multiple platforms and be able to complete assigned duties with minimal direction from management. In this position, you will routinely act independently while researching and developing solutions to customer issues.

Conduct performance analysis and optimization of SPEC CPU and other benchmarks on x86 architecture using AOCC and other competitive x86 compilers. Utilize profiling and debugging tools to identify performance bottlenecks and provide actionable insights. Collaborate with software development teams to implement performance improvements. Analyze instruction set architecture (ISA) to optimize code execution and efficiency. Engage in root cause analysis for performance-related issues and drive them to resolution. Develop and maintain scripts and tools for automated performance testing and data collection. Prepare detailed reports and presentations on performance findings and recommendations for stakeholders. Stay updated with the latest developments in compiler technologies and performance analysis methodologies. Communicate key findings and status updates to stakeholders and cross-functional teams. Skills Must have Minimum of 3 years of experience in performance analysis or a related field. Strong expertise in x86 architecture and instruction set architecture (ISA). Strong understanding of hardware and software system architecture and their implications on performance. Excellent programming/debugging skills at the Assembly level. Proficiency in using compilers such as AOCC, LLVM, GCC, and OneAPI. Experience with performance benchmarking tools and methodologies. Solid practical C/C++/Fortran experience Familiarity with both Windows and Linux operating systems for performance analysis. Ability to work in a fast-paced, deadline-driven environment. Excellent analytical skills and attention to detail. Strong communication skills, both written and verbal. Excellent analytical and problem-solving skills. Nice to have Strong communication skills and the ability to work collaboratively in a team environment. Other Languages English: B2 Upper Intermediate Seniority Regular Refer a Friend Positive work environments and stellar reputations attract and retain top talent. Find out why Luxoft stands apart from the rest. Recommend a friend Related jobs View all vacancies Testing Specialist with C++ C/C++ Mexico Remote Mexico Testing Specialist with C++ C/C++ Poland Remote Poland Testing Specialist with C++ C/C++ Serbia Remote Serbia Bengaluru, India Req. VR-114704 C/C++ Automotive Industry 29/05/2025 Req. VR-114704 Apply for Compiler Performance Analyst in Bengaluru *

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Our Employees Are valued and empowered, collaborative and team oriented, innovative in their approach and passionate about their work. They are reliable, trustworthy and open with a high level of integrity. They value diversity, are inclusive and are committed to a global mindset. About the Product Using high-performance DNS services, Global Traffic Manager (GTM) scales and secures your DNS infrastructure during high query volumes and DDoS attacks. It delivers a complete, real-time DNSSEC solution that protects against hijacking attacks. GTM improves the performance and availability of your applications by intelligently directing users to the closest or best-performing physical, virtual, or cloud environment. In addition, enables mitigation of complex threats from malware and viruses by blocking access to malicious IP domains. Position Summary Our team is at the cutting-edge of DNS technology. We are focused on providing customers with solutions to improve access to applications by securing and accelerating Domain Name resolution. Collaborations with F5 s Firewall and Hardware teams produce unique opportunities for cross-team development projects.This position is for a Software Engineer III with experience designing and developing application data management software. The engineer will collaborate with software architects and other technical leads to design software and interfaces for our next generation features.We are looking for talented software engineers with a track record of accomplishment in the design, implementation and maintenance of major software features. Appropriate candidates should also have a knack for delving into complex customer configurations and delivering rapid fixes for critical issues. Responsibilities Develop new feature and software solutions for the F5 DNS products in areas such as: DNSSEC and similar security-related functionality. Ultra High Performance DNS server and resolver technology. Next generation geolocation technology. Document software designs via functional specifications and other design documents. Diagnose and resolve customer-facing issues, ranging from point fixes to complete feature re-implementation Evaluate performance data, tune and re-evaluate designs and implementations of current source code. Research, investigate, and define new areas of technology to enhance existing F5 DNS products. Document bug fixes and known issues for customer access Work collaboratively with other development team within F5 to create solutions for complex issues Qualifications 3+ year of professional experience in multi-platform network software development, in a commercial production environment. Bachelor degree in computer/engineering related field or equivalent work experience Proven programming skills/abilities in both C and C++ Development experience in areas such as sockets, multithreading, and data structure optimization. Familiarity with TCP/IP networking a strong plus. Experienced with at least one scripting language such as Python, Perl, Understanding of regexes Background in Unix based operating systems specifically, x86/Linux Strong problem-solving and analytical skills Proven ability to deliver products with highest quality and on time Strong written and verbal communications skills Ability to collect and document user specifications Ability to interact and communicate effectively with users of our products Physical Demands and Work Environment Daily computer use in an office environment. Occasional need to install computer equipment in racks and replace existing equipment. Equipment includes servers, routers, power supplies, and network appliances. Benefits: We provide competitive salaries, a world class benefits package, including 100% of the premium for employee medical, dental and vision insurance, highly subsidized premiums for dependent coverage, 401K match, employees stock purchase plan, 18 days paid time off within the 1st year and 9 paid holidays, life insurance, short & long term disability insurance, tuition reimbursement, and much more. The is intended to be a general representation of the responsibilities and requirements of the job. However, the description may not be all-inclusive, and responsibilities and requirements are subject to change. Please note that F5 only contacts candidates through F5 email address (ending with @f5.com) or auto email notification from Workday (ending with f5.com or @myworkday.com ) . Equal Employment Opportunity It is the policy of F5 to provide equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, color, national origin, sex, sexual orientation, gender identity or expression, age, sensory, physical, or mental disability, marital status, veteran or military status, genetic information, or any other classification protected by applicable local, state, or federal laws. This policy applies to all aspects of employment, including, but not limited to, hiring, job assignment, compensation, promotion, benefits, training, discipline, and termination. F5 offers a variety of reasonable accommodations for candidates . Requesting an accommodation is completely voluntary. F5 will assess the need for accommodations in the application process separately from those that may be needed to perform the job. Request by contacting accommodations@f5.com .

Lead the architecture, design and development of Processor Core Front end of pipeline units for high-performance IBM Systems. - Architect and design I-Cache, Instruction Fetch, Branch Prediction and Decode units of a high performance processor CPU - Develop the features, present the proposed architecture in the High level design discussions - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. - Develop micro-architecture, Design RTL, Collaborate with other Core units, Verification, DFT, Physical design, Timing, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in post silicon lab bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing specific CPU unit(eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) - Hands on experience of different Branch Prediction techniques - Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA - Experience with high frequency, instruction pipeline designs - At least 1 generation of Processor Core silicon bring up experience - In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) - Proficiency of RTL design with Verilog or VHDL - Knowledge of at least one object oriented or functional programming language and scripting language. - Nice to haves - Knowledge of instruction decode and handling pipeline hazards - Knowledge of verification principles and coverage - High-level knowledge of Linux operating system - Understanding of Agile development processes - Experience with DevOps design methodologies and tools Preferred technical and professional experience Master's Degree/PhD

Lead the unit level pre-silicon functional & performance verification the Load Store Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for LSU, including the Load and Store pipelines, D-Cache, Address translation, out of order execution of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

- Lead the architecture, design and development of Power Management for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Server SoC power management features. * Experience with hardware to model correlation * At least 1 generation of silicon bring up experience * In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) * Proficiency of RTL design with Verilog or VHDL * Knowledge of at least one object oriented or functional programming language and scripting language. Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Working mode : Regular Notice Period : Immediate - 15 Days Mandatory Skills : - 3-7 years of experience in the x86 BIOS/UEFI development - Experience with x86 CPU/APU architectures and associated compilation tools - Expert in C language - Familiar with at least one BIOS code base (AMI, Insyde, or Phoenix BIOS) - Experience of working on UEFI bootloader or UEFI applications mainly involved in UEFI based storage protocols AHCI, SATA, NVMe. - Will be good if have any experience in Android UEFI based Bootloader for x86. - Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required. - Good understanding of UEFI framework concepts and Storage protocols. Additional Skillset : - Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. - Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. - Good understanding of industry standard protocols like SATA, NVMe, AHCI, PCIe, SPI, eSPI etc. - Good understanding of specifications like ACPI, SMM. - Good understanding of x86-64 architecture from BIOS developer's perspective. - Good understanding of UEFI BIOS Boot flow. Academic credentials: - Bachelor's degree in computer science engineering from reputed college - Master's degree from reputed university is a big plus .

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Greetings from HCL Technologies...! Experience- 5 to 12 Years Location- Bangalore/Chennai Job Description: Work on key components of functional validation of complex ASIC SOC blocks on Emulation / HAPS / Post silicon platforms Experienced in one or more of following protocols Ethernet 802.3 protocols/IP, L2/L3, PCIE, DDR/HBM, ARM/RISC-V based CPU SS, USB, Audio & DSP, AI accelerators etc. Perform Pre/Post-Silicon test content and test plan development. Regress test plan execution and infrastructure development for functional validation of complex design. Creating stress and performance scenarios to meet test plan goals. Debug failures Experienced with Source and Version Control management (GIT/Perforce/CVS etc.) Innovate to improve validation efficiency through methodologies and tools Skills: Hands on experience with C/C++ and Python is must to have. Familiarity with boards, components, memories, industry standard interfaces like Ethernet, PCIE, DDR, HBM, USB, JTAG , I2C and UART protocols . Creativity, verbal and written communication skills, analytical and problem-solving ability.

Greetings from HCL Technologies..! Experience- 5 to 10 Years Location- Bangalore Job Description: Core UEFI BIOS code Firmware development. Strong knowledge on UEFI BIOS Framework and EDKII development kit Hands on in "C" / embedded SW/FW development Standard programming practice. and Debug Should have understanding on system level programming and debugging x86 architecture knowledge Should have good command on oral and email communications. Good to have understanding and worked on PC BIOS features development

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.