939 Uvm Jobs - Page 35

You Are: You are a seasoned digital verification engineer with a passion for innovation and problem-solving With a BE/b-tech degree in electronics or a related engineering field, you bring 3-5 years of hands-on experience in digital verification Your proficiency in system verilog, UVM, coupled with a strong understanding of formal verification techniques, sets you apart You thrive in UNIX/Linux OS environment and have a keen interest in exploring new technologies Your ability to build UVM based testbenches , along with your prior knowledge of EDA tools and simulators, makes you an ideal candidate Excellent English communication skills and the ability to compile verification plans and strategies are essential for this role, What Youll Be Doing: Creation of test plans Development of testbenches Creation of tests both directed and random Functional coverage modelling and review, Code coverage review Debugging and resolving mismatches between design and C-model Integration of third party and internal verification IP Review and improvement of verification test suites and testbench Mentor junior team members Creation of Test plan, test strategy Coverage databases (Fully traceable from test plan and specification) The Impact You Will Have: Driving innovation in processor verification techniques Enhancing the efficiency and effectiveness of our verification mechanisms Contributing to the development of cutting-edge technology that sets Synopsys apart in the industry Ensuring high-quality IP delivery through rigorous verification Supporting the continuous improvement of our hardware verification processes What Youll Need: Bachelors degree in engineering from a reputed college Minimum 3+ years of relevant experience Microprocessor verification experience is an advantage Hands-on experience with SystemVerilog and Verilog Proficiency with Verification methodologies: UVM/OVM Programming skills: C, assembly, Perl, makefile generation Experience with latest verification techniques like formal, low-power, safety etc is an added advantage Who You Are: Innovative thinker with a passion for technology Excellent communicator and collaborator Detail-oriented and highly organized Adept at problem-solving and critical thinking Proactive and self-motivated The Team Youll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and verifying ARC processor IPs Our team values collaboration, creativity, and continuous improvement, and we are dedicated to pushing the boundaries of technology to deliver exceptional products,

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: As an ideal candidate, you are a seasoned professional with a passion for innovation and a deep understanding of ASIC design and verification You have a proven track record in developing high-level verification environments using System Verilog/UVM and possess a keen eye for detail Your expertise in memory interface protocols like DDR and LPDDR sets you apart, and you excel in debugging and problem-solving skills You are self-motivated and possess excellent communication skills, enabling you to work seamlessly within global teams Your leadership abilities allow you to guide technical teams and enhance verification strategies and test environments, ensuring high-quality deliverables, What Youll Be Doing: Specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores, Perform verification tasks for IP cores, working closely with RTL designers, Drive ownership of critical areas of verification along with a team of talented verification engineers, Manage and own a team to develop and implement advanced test plans and test environments at both unit and system levels, Code and debug test cases, implementing complex checkers and assertions, Extract and review functional coverage (FC) and code coverage metrics, ensuring quality metric goals are met, Manage regressions and contribute to the continuous improvement of verification strategies and test environments, The Impact You Will Have: Enhance the quality and efficiency of our verification processes, ensuring robust and reliable IP cores, Contribute to the development of cutting-edge technologies that power the Era of Smart Everything, Enable the creation of high-performance silicon chips and software content, driving innovation in various industries, Collaborate with a global team of experienced verification engineers, fostering a culture of knowledge sharing and continuous learning, Play a key role in the success of Synopsys' DesignWare IP Verification R&D team, contributing to our leadership in chip design and software security, What Youll Need: BS/MS in Electrical Engineering or Electronics and Communication Engineering with 10+ years of relevant experience, Proven experience in developing HVL (System Verilog/UVM) based test environments, Expertise in developing and implementing test plans, checkers, and assertions, Proficiency in extracting verification metrics such as functional coverage and code coverage, Experience with memory interface protocols (DDR, LPDDR) and IP design and verification processes, Who You Are: You are a detail-oriented, self-motivated individual with strong problem-solving skills Your excellent communication skills enable you to work effectively within global teams You possess deep knowledge of HDLs such as Verilog and scripting languages like shell/Perl/Python, and you thrive in a project and team-oriented environment, The Team Youll Be A Part Of: You will be part of the DesignWare IP Verification R&D team at Synopsys, working closely with RTL designers and a global team of experienced verification engineers This team focuses on developing state-of-the-art verification environments for synthesizable cores, contributing to the success of Synopsys' Design & Verification domain, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

Reviewing software requirements and preparing test scenarios Executing tests on software functionality – Feature testing, Sanity test-suite, Regression and Integration testing Exploratory testing from end-user’s perspective Analyzing test results on database impacts, errors or bugs, and usability Preparing reports on all aspects related to the software testing carried out and reporting to the design team Interacting with Product team to understand product requirements Participating in design reviews and providing input on requirements, product design, and potential problems. Roles and Responsibilities Under general supervision, develops, codes, test, and debugs new software or enhancements to existing software customers. Requires good understanding of business application. Works with technical staff to understand problems with software and resolve them. Resolves customer complaints with software and responds to suggestions for improvements and enhancements from customers. May assist in development of software user manuals. Demonstrates software. Note: If the incumbent is responsible for the development of software for internal use, please match to a position in the Application Development sub-family grouping.

The Opportunity Were looking for the Wavemakers of tomorrow. About the job The Opportunity Were looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrows future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What Youll Do Will be responsible for verification of IP, Block, or Subsystem at Soc Level Generate appropriate documentation for verification Responsible for analyzing/debugging given blocks/tasks in verification Should be able to develop and own the verification environment, verification components developed You will report to Lead Engineer What Youll Need: 6+ years of experience with a Bachelors/ masters degree in the field of Electrical, Electronics, or computer engineering Should have a good understanding of verification flow, challenges, and requirements of functional verification Have worked on IP level or Block level or SoC level functional verification Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy Expert in System Verilog, Verilog, and OVM/UVM verification methodology Have working experience on AMBA interface protocols (AXI, AHB, APB) Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must Hands-on experience on working one or more of the following protocols is a must - UART, I2C, SPI, QSPI, I3C, eMMC, CAN, Hands-on experience working with one or more of the following protocols is desired - PCIe, USB, DDR, LPDDR, GBE, SATA Experience with Perl, Python or similar scripting languages will be helpful Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals. We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

The Opportunity Were looking for the Wavemakers of tomorrow. About the job The Opportunity Were looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrows future by accelerating the critical data communication at the heart of our digital world - from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. What Youll Do Own end-to-end verification of Ethernet, PCIe and UCIe IP subystems Build testbenches and analyze test failures to uncover bugs in IP Integrate 3rd party VIPs for compliance testing of standard protocols You will Build releases of our design IP for customers Take on opportunities to lead, plan, and coordinate tasks with team members Collaborate closely with IP design, FE design, PD , PV,EM/IR and post-si teams Contribute towards the continuous improvement of IP verification methodologies and processes What Youll Need Minimum 4 years of experience into Design Verification Experience in SerDes PHY, DSP, and Analog mixed signal is desirable Knowledge in Ethernet and PCIe standards is desirable An applied understanding of UVM and verification techniques Experience with constrained-random verification in System Verilog and UVM Formal Verification, and Power-aware UPF verification techniques Tools/Languages - System Verilog, UVM, Python, Perl, C/C++ "We have a flexible work environment to support and help employees thrive in personal and professional capacities" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Competitive Compensation Package Restricted Stock Units (RSUs) Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.

We are seeking a Senior Manager to lead our Bengaluru IC Verification team. This role offers a unique opportunity to shape the future of AI Networking. If youre a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI networking. Responsibilities Manage and lead Bengaluru team of ASIC verification engineers, fostering an inclusive and collaborative work environment. Ensure effective communication and coordination across different geographical locations. Technical Leadership in ASIC Verification: Provide technical expertise in the verification of complex ASIC designs, ensuring compliance with industry standards and project specifications. Gate Timing Simulations: Manage comprehensive gate-level simulations, including timing and power analysis, to validate the ASIC design before tape-out. RTL Coverage Analysis: Oversee the delivery of detailed coverage metrics to assess the thoroughness of the test suite. Offer actionable feedback to test writers and design engineers, focusing on identifying gaps and suggesting enhancements to broaden coverage scope. Firmware Collaboration: Work closely with Firmware teams to conduct co-simulations, ensuring seamless integration and functionality between hardware and firmware components. Team Development: Mentor and develop team members, identifying training needs and opportunities for growth. Manage third-party team augmentation in varied geographical locations. Qualification s ME/BE in Electrical Engineering, Computer Engineering, or a related field. A minimum of 12 years in ASIC verification, particularly in networking ASIC design. Technical Skills: Expertise in Hardware Verification and Hardware Verification Methodology (e.g., System Verilog, UVM) with a strong understanding of ASIC design and verification flow. Experience with coverage, gate/timing/power simulations, and test-plan documentation is required. Protocol Experience: Prior experience with Ethernet, UCIe, and PCIe protocols and both serial and parallel VIP verification modes, with strong expertise in high-speed SerDes. Leadership and Management Skills: Proven track record in managing and leading global teams with excellent people management skills, including experience in cross-cultural team dynamics. Communication Skills: Exceptional communication abilities, capable of effectively coordinating and leading a global team, and articulating complex technical issues clearly.

{"company":" About Eridu AI Eridu AI India Private Limited, a wholly owned subsidiary of Eridu Corporation, Saratoga, California, USA, is looking to hire highly motivated and talented professionals for its R&D center in Bengaluru to join our world-class team. Eridu AI is a Silicon Valley hardware startup focused on accelerating training and inference performance for large AI models. Today s AI model performance is often gated by infrastructure bottlenecks. Eridu AI introduces multiple industry-first innovations across semiconductors, software and systems to deliver solutions that improves AI data center performance to increase GPU utilization while simultaneously reducing capex and power. Eridu AI s solution and value proposition have been widely validated with several hyperscalers. The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World s leading micro-LED display company and developer of the first augmented reality contact lens) . Visit our website to learn more about our impressive list of investors, advisors and leadership team. ","role":" Position Overview We are seeking a Verification Engineer to join our Verification team. This role offers a unique opportunity to shape the future of AI Networking. If youre a highly motivated self-starter eager to solve real-world problems, we d love to hear from you. Responsibilities Specialized Verification Strategy: Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking. Technical Expertise in ASIC Verification: Provide technical leadership in the verification of complex ASIC designs, ensuring compliance with industry standards and project specifications Gate & Timing simulations: collaborate with the team to execute comprehensive gate-level simulations, including timing and power analysis, to validate the ASIC design before tape-out. RTL Coverage Analysis: deliver detailed coverage metrics to assess the thoroughness of the test suite. Offer actionable feedback to design engineers, focusing on identifying gaps and suggesting enhancements to elevate test effectiveness and broaden coverage scope. Quality Assurance and Process Optimization: Uphold the highest standards of verification quality. Initiate and implement process improvements for increased efficiency and effectiveness. Qualifications ME/BE in Electrical Engineering, Computer Engineering, or related field. Experience: A MINIMUM of 8-15 years in ASIC verification in the area of data center networking. Technical Skills: Expertise in Hardware Verification and Hardware Verification Methodology (e.g., System Verilog, UVM) with a strong understanding of ASIC Design and Verification flow. Experience with coverage, gate/timing/power simulations & test-plan documentation is required. Prior experience with Ethernet and PCIe Protocols and Serial and Parallel VIP verification modes. Strong prior experience with High speed Serdes. Communication Skills: Exceptional communication abilities, capable of effectively coordinating, and articulating complex technical issues in a clear manner. Why Join Us? At Eridu AI, you ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities. The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles. "},"

MTS SILICON DESIGN ENGINEER Responsibilities: Feature based performance Testplan, Test writing, performance verification, Arch model closure, RTL Performance verification closure Shader development expertise Driver workload, benchmarks, micros, GEMM Kernel development and debug Strong SV/C-C++ based BFM development skills. Memory modelling. Strong networking and colloboration with Arch, design, SOC, Post Silicon, Workload , Driver teams Requirements: BS +12 years or MS +10 years work experience preferred. Strong Graphics Architecture understanding Excellent Graphics IP level debug expertise for compute and 3D Strong Block and Graphics top level feaature wise perf analysis and debug skills Compute , Cache , HBM memory Bandwidth test developement and performance closure Feature wise shader and content development skills Scripting Python/Perl Garpahics Arch modelling content run and closure Familiarity with latency pipeline and performance bottle neck analysis Strong memory/cross-bar data path understanding and bandwidth rollup Post silicon bug recreation/debug methodologies/ SOC level understanding and IP modelling Good understanding of memory hierarchy, caches, address translations schemes. Good understanding of general dram technologies and address translation schemes Familiarity with Computer organization/architecture. Strong analytical/problem solving skills and pronounced attention to details. Must be a self-starter, and able to independently drive tasks to completion. Good teamwork and communications skills are required Strong leadership and innovation mind bent Flair for Graphics market development and innovations #LI-NS1 Benefits offered are described: AMD benefits at a glance .

Apply to this job Meta is hiring ASIC Verification Engineer with in-depth understanding of PCIe Express within the Infrastructure organization. We are looking for individuals with experience in verification of PCIe Switch, Root Complex and Endpoint to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook s data center applications. You will be responsible for the verification closure of a sub-system or SoC from test-planning, Hybrid test bench development to verification closure. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success. ASIC DV Engineer, PCIe Verification Responsibilities Develop and execute verification plans, test cases, and scripts to ensure PCIe interface functionality, performance, and compliance with industry standards. Collaborate with design teams to understand the PCIe interface architecture and identify potential issues. Create and maintain testbenches, including simulation models and tests Perform simulation-based testing, including functional, performance, and compliance testing Analyze test results, identify defects, and work with design teams to resolve issues. Stay up-to-date with industry trends, standards, and best practices related to PCIe verification Debug, root-cause and resolve functional failures in the design, partnering with the Design team Mentor engineers to drive and deliver high confidence verification for highly complex ASIC projects. Minimum Qualifications Bachelors degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience At least 8+ years of relevant experience Track record of first-pass success in ASIC development Good knowledge of PCIe specifications, protocols, and standards covering Root Complex, End Point and Switch Good hands-on verification experience in PCIe Transaction, Link and Physical layer. Hands-on experience in Verilog, SystemVerilog, UVM , C/C++, Python based verification Experience in IP, Cluster and SoC level verification in both RTL and Gate Level Setup Proficiency in scripting languages such as Python, Perl, or TCL to build tools and flows for verification environments Experience in architecting and implementing DV setup for complex Subsystem and ASICs. Experience using analytical skills to craft novel solutions to tackle industry-level complex designs Demonstrated experience with effective collaboration with cross functional teams Preferred Qualifications Experience in development of PCIe Gen6/Gen7 DV testbench and infrastructure from scratch Hands-on experience with integration and usage of varied PCIe vendor VIP Experience in performance verification of PCIe Sub-System for AI/ML Applications etc Experience with development of fully automated flows and scripts for data exploration, analysis and performance verification Experience with revision control systems like Mercurial(Hg), Git or SVN Experience with simulators and waveform debugging tools Experience working across and building relationships with cross-functional design, model and emulation teams About Meta . Equal Employment Opportunity . Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form .

L&T Technology Services is #hiring for Lead Emulation Engineer in Hyderabad - Permanent!! JD: Position - Lead Emulation Engineer Experience - 7+ Years of Experience Location: Hyderabad Job Type - Permanent Qualification - BE/B Tech Exp : 6 to 15 yrs Emulation debug (state experience required) FPGA and Emulation model creation and bring-up experience RTL sanitization (HDL coding and/or design verification and debug) validating hardware features for at least 3 or more projects in a pre-silicon environment. debugging failures using waveform viewers, log files and microcode trace dumps. debugging software using debuggers and trace files. Knowledge of x86 and/or ARM SoC Architecture Knowledge of current industry GFX Architectures Familiar with one or more of the following: Veloce, Zebu and/or Palladium emulation platforms and prior experience in debugging/executionof emulation models Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe, MIPI, WLAN or I2C

About The Role Solid Experience in DFT Architecture. The candidate should have experience with ATPG, JTAG, BSCAN, BIST and MBIST flows. Experience on Hierarchical DFT techniques using Pattern Retargeting in Tessent flow Strong knowledge of the Tessent Shell environment and Tessent tools The desired candidate must have specific emphasis on the following tools Test Kompress / Fastscan ATPG, MBIST, Boundary scan. Hands on experience in simulating scan patterns and debugging pattern mismatches during verification process Experience in helping to debug failing scan patterns on the ATE is highly desirable. Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification.(Mentor, Cadence, Synopsys) Must be able to simulate and debug MBIST testbenches. Ability to come up with a detailed test plan based on the Arch specs Should be knowledgeable in all SOC functions such as Digital design, STA, Synthesis, PnR, DV and ATE test. The candidate should have prior experience in managing and developing teams Required Qualification B.E / B.Tech / M.E / M.Tech in Electrical / Electronic Engineering. experience-10-16 years Preferred experience of handling 10+ team members. Good understanding and exposure to SoC design and architecture Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects Comfortable with VCS / Verdi and excellent debugging skills Logical in thinking and ability to gel well within a team and be a proactive member of the team. Good communication and leadership skills Excellent team player High Integrity Job Type Full Time Job Location Hubballi

Responsibilities: * Design verification using SV, UVM & DDR techniques * Collaborate with cross-functional teams on project delivery * Ensure compliance with industry standards and customer requirements

Wipro Limited (NYSE:WIT, BSE:507685, NSE:WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com. About The Role : Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Reinvent your world.We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Wipro Limited (NYSEWIT, BSE507685, NSEWIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com. About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Wipro Limited (NYSEWIT, BSE507685, NSEWIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com. About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

Wipro Limited (NYSEWIT, BSE507685, NSEWIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com. About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: VLSI HVL Verification. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: VLSI Board Design. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client ? Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project ? Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt ? ? Mandatory Skills: VLSI HVL Verification. Experience3-5 Years. Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

About The Role JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders. About The Role - Grade Specific JD Must have skills. Payment Domain Expertise, MUST - Knowledge on MT and MX Message, Basics of SQL, and Java Specific skillset on MTS and UPF knowledge. Payment domain expertise, knowledge on MT and MX messages Skills (competencies) Verbal Communication

Develop testbenches, testcases, and verification components using SystemVerilog and UVM. PCIe, Ethernet, AMBA protocols must. Create and execute detailed verification plans based on design specifications Drive coverage closure, and debug failures.

Design Verification Engineer (5 to 12 Years) SoC/IP Verification Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune] Experience: 5 t o 12 Years Openings: 10 Positions Preferred - Immediate to 45 Days (Notice Period) Job Description : ACL Digital is hiring experienced Design Verification Engineers to work on leading-edge processor-based SoCs and IPs. Notice Period-Prefer less Notice period or serving. Strong understanding of design verification methodologies (UVM, SV, etc.) Experience with industry-standard protocols (AXI, DDR, PCIe, etc.) Familiarity with ASIC and SoC design flows. Proficiency in scripting languages (Python, Perl) Experience with simulation tools and debuggers. Strong problem-solving and analytical skills Communication and collaboration skills to work effectively with cross-functional teams Key Responsibilities: Developing test plans Coding and bring up of asm, c++ tests UVM test bench components coding and maintaining Debugging regression fails Protocol: AMBA, AXI, PCIE, USB, MIPI

Hiring Now ASIC Design Verification Experts | Automotive Chip Projects Location: Bangalore, Pune, Noida, Chennai Experience: 3 to 20+ Years | Notice Period: Immediate to 45 Days Send Resume to: prabhu.p@acldigital.com JD 1: VIP Development – Technical Lead / Manager 10–20+ years in UVM-based VIP Development & Integration Strong expertise in PCIe, SerDes, MIPI CSI/DSI, Ethernet, SATA Experience in IP & Chip-Level Verification for automotive SoCs Strong in SystemVerilog , Assertions , and Protocol Checkers Ability to lead verification strategy and mentor IC team members Excellent debugging, ownership, and communication skills IC + Team Leadership responsibility in a global ODC setup JD 2: Processor-based SoC / Subsystem DV – Lead & Engineer Roles Lead (15+ yrs): Strong in ARM Cortex-M/A, SoC bring-up (boot code, ISRs), AMBA protocols – Led 2–3 SoC DV projects, 10+ team size, Xtensa experience is a plus Engineer (3–10yrs): – SoC DV with C/Assembly testcases, SV/UVM, AHB/AXI protocol (Team: 9) – SoC or IP DV with SV/UVM, AHB/AXI, C/ASM optional (Team: 6) Why Join Us? Work on flagship automotive chip programs Fast-track your career with IC & Lead roles Get rewarded with attractive referral bonuses

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA * Development responsibilities will include core algorithmic advances and software design/architecture. * You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. * Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: * B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. * Strong knowledge of C/C++, algorithms, and data structures. * Familiarity with compiler concepts and optimizations. * Experience with UNIX and/or LINUX platforms is essential. * Excellent problem-solving and analytical skills. * Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: * Strong understanding of basic digital electronics concepts. * Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. * Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. * Experience with parallel algorithms and job distribution techniques. * Exposure to simulation or formal verification methodologies is a plus.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-7 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation! We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. We are seeking Electronics Engineers (B.Tech/M.Tech) or professionals from related fields, graduated from reputed institutes, who possess strong expertise in verification engineering and bring 4-7 years of hands-on experience to the table. You've sound knowledge of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc. We are phenomenal teammates, resilient and sincere, with a passion for learning new things and building our knowledge base in new areas!