273 Systemverilog Jobs - Page 4

What You'll Be Doing: Develop and review the verification test-plan for multi-protocol 112G PHY IP sub-system of Controller/MAC+PCS+PHY. Create and optimize the verification environment based on UVM. Verify the inter-operability of Controller/MAC, PCS, with PHY of different Tech nodes. Execute RTL simulations, Gate Level Simulations, and ensure coverage closure (Functional + Code). Deliver high-quality RTL and Simulation models to customers. Coordinate between RTL, Analog design, and Tech pub teams. Support customers with the integration and bring-up of IP in their simulation environments. Develop and deliver SV verification components for customer integration. Assist customers with silicon bring-up and debug issues when customer silicon is available. The Impact You Will Have: Ensure the delivery of robust and high-quality verification solutions for Synopsys high-performance PHY IPs. Drive innovation and efficiency in verification processes, contributing to the advancement of cutting-edge technologies. Enhance customer satisfaction through exceptional support and high-quality deliverables. Facilitate the seamless integration of Synopsys IPs into customer designs, ensuring successful product launches. Contribute to the development of industry-leading verification methodologies and best practices. Help maintain Synopsys reputation as a leader in chip design and verification solutions. What You'll Need: B.Tech/M.Tech with 7+ years of relevant experience. Proficiency in interface protocols such as Ethernet, PCIe, CXL, JESD, and CPRI. Experience with functional verification flow, Verification tools, and methodologies VMM, OVM/UVM, and System Verilog. Expertise in Gate Level Simulation with SDF, System Verilog Assertions, and coverage implementation. Fundamental knowledge of Analog and Digital mixed signal design. Proficiency in scripting and automation using TCL/Perl/Python. Excellent debug and diagnostic skills. Who You Are: You are an innovative and detail-oriented professional with a strong technical background and a collaborative mindset. Your excellent communication skills, problem-solving abilities, and interpersonal skills make you a valuable team player. You thrive in a dynamic environment, continually seeking to improve processes and deliver high-quality results. Your passion for technology and dedication to customer success drive you to excel in your role.

You Are: You are a highly motivated and detail-oriented verification engineer with a passion for ensuring the functionality and reliability of advanced semiconductor technologies. You possess a strong background in digital verification and have a keen understanding of analog and mixed-signal (AMS) verification flows. With 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development, you bring expertise in areas such as Digital Verification, AMS Verification with Verilog A, and RNM (Real Number Modeling). You thrive in a collaborative environment, working seamlessly with cross-functional teams to achieve top-level integration and verification goals. You are committed to continuous learning and eager to take on technical leadership roles, guiding teams to intercept TQV and other swim lanes for top-level integrations. Your knowledge of System Verilog, foundry PDKs, and SOC Design flow sets you apart, and you are ready to contribute to the success of Synopsys Sensor IP business unit. What You'll Be Doing: Leading the digital verification flow for PVT Sensor Digital Verification. Setting up and managing AMS Verification and front-end Integration for MSIPs. Developing and supporting next-generation analog, digital, and mixed-signal IPs. Ensuring all blocks are verified for behavioral and functionality from top-level integration. Collaborating with a team to intercept TQV and other swim lanes for top-level integrations. Implementing mixed-mode simulations with significant improvements in execution time. The Impact You Will Have: Enhancing the reliability and performance of semiconductor lifecycle management solutions. Accelerating the integration of intelligent in-chip sensors and analytics capabilities. Optimizing performance, power, area, schedule, and yield for cutting-edge technology products. Reducing risk and time-to-market for differentiated products. Contributing to the development of Synopsys next-generation analog, digital, and mixed-signal IPs. Supporting the growth and success of Synopsys Sensor IP business unit. What You'll Need: BS or MS degree in Electrical Engineering, Computer Science, or Computer Engineering. 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development. Expertise in Digital Verification and/or AMS Verification with Verilog A and RNM. Proficiency in System Verilog and RNM (Real Number Modeling). Understanding of latest foundry PDKs and their usage in FE & BE flows. Who You Are: A detail-oriented and highly motivated verification engineer. A collaborative team player with excellent communication skills. A continuous learner eager to stay updated with industry trends and technologies. A leader capable of guiding and mentoring teams to achieve verification goals. A problem-solver with strong analytical and debugging skills.

What You'll Be Doing Responsible for PCIe/CXL next-gen Controller IP features Customer pre/post sales PCIe/CXL protocol related communication Utilizing advanced design methodologies and tools to achieve high-quality results Mentoring and guiding other engineers, promoting best practices, and fostering a culture of continuous improvement Communicating with internal and external stakeholders to align on project goals and deliverables. What You'll Need: Extensive experience in digital ASIC design and physical aware synthesis. In-depth knowledge of PCIe, CXL , AXI, CHI and similar IO protocols. Proficiency in advanced digital design tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 20+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity.

What You'll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What You'll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 18+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity.

What You'll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What You'll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity.

What You'll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What You'll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity.

Description We are seeking a highly skilled PCIe Protocol Engineer with 5-8 years of experience to join our team in India. The ideal candidate will have a strong background in PCIe protocols and a proven track record in designing, implementing, and verifying PCIe-based solutions. Responsibilities : 1) Experience of around 5 to 8 years. 2) PCIe Protocol Expertise. 3) Gen-6 Experience with PCIe gen 5 or 6 hardware and/or device drivers for Linux. 4) Very Strong C/C++ development skills in Linux and embedded environments. 5) Linux Kernel Development: Proficiency in Linux kernel internals, including writing and debugging kernel modules and drivers, especially for PCIe devices. 6) Knowledge of PCIe bus link aggregation. 7) Experience with ARM and x86 processors in embedded Linux system design and development, including firmware development for PCIe devices. Skills and Qualifications : Bachelor's or Master's degree in Electrical or Computer Engineering 5-8 years of experience in PCIe protocols and interfaces Strong understanding of PCIe 3.0 and 4.0 specifications Experience in designing and implementing PCIe-based solutions Experience in using PCIe test equipment such as protocol analyzers and traffic generators Strong programming skills in C/C++ and scripting languages such as Python Excellent problem-solving skills and attention to detail Good communication and interpersonal skills

Location : Hyderabad Work Mode : WFO Experience : 5-10 years Qualification : B.E./B. Tech or M.E./MTech in ECE, EE, or related field Employment Type : Full-time Job Description We are looking for a skilled Hardware Verification Engineer to join our team and contribute to the development of cutting-edge hardware solutions. The ideal candidate will have hands-on experience in RTL verification, System Verilog/UVM, and exposure to industry-standard protocols and tools. Key Responsibilities Develop and maintain System Verilog /UVM test-benches at block, subsystem, and top levels. Define and drive test plan, test specification, and test execution for complex hardware modules. Engage in verification environment architecture and methodology development. Collaborate with design teams to ensure functional correctness, coverage, and debugging of RTL code. Generate and maintain comprehensive documentation : user guides, test plans, test specifications, and test reports. Perform hardware testing using test equipment such as logic analyzers, traffic generators, and signal analyzers. Contribute to FPGA-based verification using Xilinx tools and technology. Required Skills & Experience Strong experience in SystemVerilog and UVM-based verification. Proficiency in verification of standard protocols : Ethernet, PCIe, SPI, I2C, USB. Hands-on experience with hardware test equipment (logic analyzers, oscilloscopes, traffic generators, etc.). Experience with Xilinx FPGA verification and toolchains. Strong debugging skills at device, signal, and board levels. Familiarity with scripting languages like Perl, Python, or TCL. Excellent analytical, problem-solving, and communication skills. Ability to work effectively in a collaborative and fast-paced development environment. Additional Relevant Skills (Preferred/Bonus) Experience with code and functional coverage collection and analysis tools (e.g., VCS, Questa, Incisive). Proficiency with constraint random verification and assertion-based verification (ABV). Familiarity with simulation acceleration, emulation (e.g., Palladium, Veloce), or formal verification tools. Understanding of SoC architecture, DMA, memory controllers, and bus interfaces (AXI, AHB, APB). Exposure to version control systems (e.g., Git, Perforce) and CI/CD verification automation. Experience working in Agile/Scrum environments. Exposure to cloud-based verification environments or remote simulation tools. Familiarity with coverage-driven verification (CDV) and verification management tools like JasperGold, Specman, or Cadence vManager. Why Join Us ? Work on next-generation products in a technically driven team. Opportunities for growth in both frontend and backend design flows. Supportive work environment with access to advanced labs and equipment. (ref:hirist.tech) Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Working with product engineers, customer support, and R&D to determine training requirements. Creating and updating training lectures, labs, exams, and demos aligned with software releases and with high levels of quality. Designing and developing lectures, labs, and demos deployed online and in the classroom. Delivering courses in a classroom or virtual setting, as required Creating narrated online videos educating customers on how to use tools, languages, and methodologies. Supporting online training customers when there are questions related to lectures and labs. Enjoys various activities – authoring content, learning new tools and methodologies, “being the expert,” teaching and interacting with customers, and working with highly competent and experienced engineers. Given clear goals, can work independently to accomplish such goals. Is aware of analog/mixed-signal design, simulation, and verification flows/methodologies. Has experience in designing and analyzing analog and mixed-signal circuits. Can model and create test benches for mixed-signal, mixed-language designs using Verilog-A and Verilog-AMS. Should be able to model DUT and testbench for Top Level Verification of mixed-signal designs. Has working knowledge of analog/mixed-signal Cadence design tools and simulators such as Virtuoso, AMS Designer, and Spectre. Understands SystemVerilog/real-number modeling capabilities (SVRNM/Wreal). Exposure to UVM-MS would be a plus. Is aware of low-power mixed-signal design requirements with CPF and UPF. Should have a Bachelors’ or Master's degree in Electrical/Electronics Engineering with a minimum 4-6 years of related working experience. Has strong written and verbal English communication skills. Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success. We’re doing work that matters. Help us solve what others can’t. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Sr SILICON DESIGN ENGINEER The Role As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job Deliverables Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC boundaries, power domains. Running Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, CLP steps. Come up with clock constraints, false paths, multi-cycle paths, IO delays, exceptions and waivers. Checking the flow errors, design errors & violations and reviewing the reports. Debugging CDC, RDC issues and come up with the RTL fixes. Supporting DFX team for DFX controller integration, Scan insertion, MBIST insertion and DFT DRC & MBIST checks. Handling multiple PNR blocks, building wrappers and propagating constraints, waivers, etc. Flows or Design porting to different technology libraries. Generating RAMs based on targeted memory compilers and integrating with the RTL. Running functional verification simulations as needed. Job Requirements B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes Digital design and experience with RTL design in Verilog/SystemVerilog Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation Preferred experience in AXI4 or NOC protocols or DRAM memory interfaces. TCL, Perl, Python scripting Preferred Experience Project level experience with design concepts and RTL implementation for same Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics Good understanding of computer organization/architecture Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Varex Imaging , headquartered in Salt Lake City, USA, is a leading innovator, developer, and manufacturer of X-ray imaging component solutions, which includes X-ray tubes, digital flat panel detectors, software, and other key components of X-ray imaging systems. Varex Imaging is seeking a FPGA / Embedded Firmware Engineer in the fast-growing X-Ray Imaging Components division. This individual will work in our Vizag, India facility. This developer will bring value to our team by developing firmware systems and libraries needed to process and manage flat panel x-ray detectors data used in medical and industrial imaging systems. We are looking for candidates that will thrive in a fast paced, self-directed environment. This is an opportunity to work both individually and with our team of highly skilled FPGA engineers. This position involves writing HDL code, developing/implementing efficient algorithms that interact with x-ray hardware components and developing low-level component interfaces both in FPGA and embedded software Your Role Experience with Verilog, SystemVerilog and/or VHDL Experience with the basics of FPGA development Familiarity with a simulation tool – Modelsim or equivalent Experience with a scripting language such as Python Some experience with debugging electrical hardware using Chipscope/Signaltap or oscilloscope/logic analyzer Your Profile... B.S. in Electrical Engineering, Physics, Computer Science or related field and 5+ years of relevant experience, or M.S. or Ph.D. with 2+ years of relevant experience Experience with Windows & Linux Familiar with Object-oriented Design and Analysis (OOA and OOD) a plus Development of specifications & requirements Design, build, and unit test firmware in a collaborative environment Knowledge/use of automated test benching a plus Familiarity with the use of FPGA intellectual property beneficial Excellent oral and written communication skills Must be able to work with minimal supervision. Proficient in utilizing business tools such as: E-mail, Microsoft Word, Excel, and PowerPoint. What we offer… A unique opportunity to become part of growing organization in India being part of a global market leader in Xray imaging components. Excellent development potential. An international work environment with global teams collaborating on various projects across several countries. Competitive compensation package including participation in Varex incentive plans. Corporate Health Benefits. Additional benefits will be added as we grow. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER The Role We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job Requirements B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes Digital design and experience with RTL design in Verilog/SystemVerilog Circuit timing/STA, and practical experience with PrimeTime or equivalent tools Low power digital design and analysis Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation Working knowledge of C; embedded experience a plus TCL, Perl, Python scripting Version control systems such as Perforce, ICManage or Git Strong verbal and written communication skills Should have experience working in geographically dispersed team and should be a strong team player. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Job Summary: We are looking for a highly experienced RTL Design Lead to drive the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. The ideal candidate should have a solid background in RTL design using Verilog/SystemVerilog, along with experience in leading teams and interfacing with verification, DFT, and physical design teams. Key Responsibilities: Lead RTL design activities for complex IPs or SoC sub-systems. Work closely with architects to translate high-level specifications into micro-architecture and RTL. Drive design reviews, coding standards, and technical quality. Define and implement RTL design methodologies and flows. Collaborate with verification, DFT, synthesis, and backend teams to ensure successful integration and tapeout. Guide and mentor junior designers in the team. Support silicon bring-up and debug as needed. Required Skills: Proven track record of delivering IP or SoC designs from spec to GDSII. Experience in micro-architecture development , pipelining, and clock-domain crossing. Good understanding of ASIC design flow , including synthesis, STA, and linting. Hands-on experience with AMBA protocols (AXI/APB/AHB) and other standard interfaces. Strong debugging and problem-solving skills. Familiarity with low-power design techniques is a plus. Preferred Skills: Exposure to high-speed protocols (PCIe, USB, Ethernet, etc.). Familiarity with scripting languages (Python, Perl, TCL) to automate design tasks. Experience with tools like Synopsys DC, Spyglass, Verdi, VCS, etc. Prior experience in leading and mentoring a small team. Educational Qualification: Bachelor’s or Master’s degree in Electronics/Electrical Engineering or related field. Show more Show less

Summary: Over 8 years of experience in digital IP verification with a strong understanding of ASIC/SoC design and state-of-the-art verification methodologies. Proficient in Verilog , SystemVerilog , and UVM , with solid expertise in developing and maintaining UVM-based verification frameworks, testbenches, and processes. Strong grasp of UVM concepts, including SystemVerilog Assertions (SVA) and scoreboard architecture . Familiar with industry-standard high-speed protocols such as USB , PCIe , UFS , SATA , and Ethernet . Well-versed with standard interconnects like AMBA (AXI, APB, AHB) . Show more Show less

Required Skills Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC. Experience in Synthesis / Understanding of timing concepts is a plus. Experience in ECO fixes and formal verification. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Excellent oral and written communications skills. Proactive, creative, curious, motivated to learn and contribute with good collaboration skills. Roles & Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Skills : Hands-on experience of complete verification cycle with strong verification concepts - Strong knowledge of Verilog, SystemVerilog and UVM- Experience in UVM based Verification IP development Experience in AMBA AXI/AHB/APB System buses Hands on work experience on any of PCIe/Eth/USB/DDR etc. Hands on experience with System Verilog Assertions Scripting for automation, release process, simulations, regressions Good command over written and oral Skills : Lead the Verification IP development with 2 or more junior engineers Exposure to full verification cycle Desired Skills And Experience DV Engineer, Design Verification, Verification Engineer (ref:hirist.tech) Show more Show less

As a CPU Processor Verification Engineer, you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today's market. Your role and responsibilities As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 - 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails Preferred technical and professional experience Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure, lead verification team Drive complex scenarios, participate in High level design discussions Track record in leading teams

Location: Gurugram, India (On-site/Hybrid) Type: Full-Time | Engineering Role We are seeking a skilled and detail-oriented Verilog Engineer to join our hardware design and development team. The ideal candidate will have hands-on experience in digital design using Verilog HDL , and a strong understanding of FPGA/ASIC development cycles . Key Responsibilities Design, implement, and verify digital logic circuits using Verilog Work on FPGA/ASIC development, simulation, and synthesis Perform functional verification and debugging using tools like ModelSim, Vivado, or QuestaSim Collaborate with cross-functional teams including hardware, embedded, and software engineers Create and maintain comprehensive design documentation Optimize RTL code for timing, area, and power based on design constraints Required Skills & Qualifications Bachelor’s or Master’s degree in Electronics, Electrical, or related field 2–5 years of hands-on experience with Verilog HDL, preferably in an FPGA/ASIC environment Solid understanding of digital design concepts (FSMs, pipelines, memory, interfaces, etc.) Experience with simulation and verification tools (e.g., ModelSim, Vivado, Synopsys) Familiarity with synthesis and timing analysis Knowledge of scripting (TCL, Python, Bash) is a plus Good to Have Experience with industry-standard FPGA platforms (Xilinx, Intel/Altera) Exposure to system-level modeling or verification languages (SystemVerilog, UVM) Understanding of hardware-software integration Why Join Us? Work on cutting-edge digital design projects Exposure to full-chip development cycles and real-world applications Dynamic work environment with growth opportunities Based in Gurugram with flexible hybrid options Skills: bash,python,modelsim,fpga,vivado,tcl,asic,timing analysis,synthesis,fgpa,asic design,questasim,verilog,digital design,verilog hdl Show more Show less

Description for Internal Candidates Staff Digital IC Design Engineer - Digital Compute Team About Us At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our group develops MCU and DSP systems as well as hardware accelerators that are used in a large variety of different products and markets. The Role We are expanding the team to India and are looking for a Staff Digital IC Design Engineer with experiences in the development of embedded MCU/DSP systems . You will develop and benchmark such systems for a variety of processor cores and consult the product integration teams during the integration of these solutions into semiconductor products. Why Join Us We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. We offer competitive benefit package and a great place to work. You will be able to build up a career in a successful international company, and you can participate in interesting international projects. What You’ll Do Architect, specify, implement, simulate, and benchmark MCU and DSP systems as well as hardware accelerators Consult the product integration teams in the definition, the integration and use of these systems Participate to the verification and FPGA prototyping of these systems Coordinate the SDK development with the software team Lead project activities Contribute to design methodology and design flow improvements What You’ll Need Minimum BS/MS in Electrical Engineering or related technical field At least 8 years of relevant work experience in semiconductor product development including engineering leadership Experience with embedded CPUs (e.g. ARM Cortex, DSP), AMBA bus protocols (AHB/APB). RTL design of digital IP blocks and systems in Verilog/SystemVerilog Technical document writing Excellent English written and verbal communication skills. #LI-RT1 onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https://www.onsemi.com/careers/career-benefits We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work. Responsibilities for Internal Candidates What Else You May Bring Experience in some of the following areas is a plus: Project/task leadership Design of CPU/MCU (sub)systems, SystemRDL or IP-XACT Programming in Python for automation and in C/C++ for embedded software Design intent (timing constraints/SDC, power intent/UPF) Design of signal processing components RTL to GDS flow, including logic synthesis, place-and-route, STA, power analysis Advanced digital verification methodology (e.g. UVM) Our commitment to you As part of the onsemi team, you will have an opportunity to transform your tomorrow and operate in a diverse, inclusive, and socially responsible environment. If you’re passionate about shaping a better future, join us and define your future! #LI-RT1

IP Verification Engineer Bangalore, India Engineering 65247 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to write the new feature tests and any required changes to the test environment Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ Graphics pipeline knowledge Developing UVM based verification frameworks and testbenches, processes and flows Automating workflows in a distributed compute environment. Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Strong background in the C++ language, preferably on Linux with exposure to Windows platform Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Good working knowledge of SystemC and TLM with some related experience. Scripting language experience: Perl, Ruby, Makefile, shell preferred. Exposure to leadership or mentorship is an asset Desirable assets with prior exposure to video codec system or other multimedia solutions. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-ST1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER The Role The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Estimate the time required to write the new feature tests and any required changes to the test environment Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE: Proficient in IP level ASIC verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ Graphics pipeline knowledge Developing UVM based verification frameworks and testbenches, processes and flows Automating workflows in a distributed compute environment. Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Strong background in the C++ language, preferably on Linux with exposure to Windows platform Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Good working knowledge of SystemC and TLM with some related experience. Scripting language experience: Perl, Ruby, Makefile, shell preferred. Exposure to leadership or mentorship is an asset Desirable assets with prior exposure to video codec system or other multimedia solutions. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day. Job Summary: We are looking for 14+ years of experience having the following skillset: Strong RTL design fundamentals using HDLs like VHDL/Verilog/System verilog Strong understanding of AMD (Xilinx) ultrascale, versal FPGAs architecture and use of vivado for FPGA place and route. Constraints definitions for FPGAs. Doing Static Timing Analysis. Familiarity with FPGA prototyping or emulation is a plus. Passionate to learn and explore new technologies and demonstrates good analysis and problem-solving skills. Good written and verbal communication skills, should be a quick learner and a team player.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence IP Tensilica group is a leading provider of configurable embedded processor technology, with a growing presence in the Automotive Safety market. As a member of the Functional Safety Design Verification Team for Xtensa processors you will be responsible for development and verification of hardware and software safety mechanisms. You will implement simulation or emulation test benches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target safety and product verification goals. You will also assist with fault simulation and analyzing coverage information. You will work closely with the RTL, EDA, and Functional Safety teams. You will develop and deliver functional safety work products, including documentation needed for product safety certification. Required Skills And Experience 8-10 years of design verification experience BS (or higher) in EE/Computer Engineering Experience in leading a small team Excellent knowledge of computer architecture/micro-architecture and design verification fundamentals Expertise with Verilog and popular EDA simulation, SystemVerilog assertions and functional coverage Good working knowledge of scripting languages like Perl, Unix shell or similar languages Knowledge of technical safety concepts and requirement specifications according to ISO 26262 Proficient with C language and assembly language Excellent written and oral communication skills necessary Exposure to debugging netlist/gate level simulation. General understanding OS. Exposure to MISRA coding guidelines Experience in fault simulation tools and methodologies We’re doing work that matters. Help us solve what others can’t. Show more Show less

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SILICON DESIGN ENGINEER 2 THE ROLE: As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Drive formal verification for the block and write formal properties and assertions to verify the design Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design Responsible for verification quality metrics like pass rates, code coverage and functional coverage PREFERRED EXPERIENCE: Project level experience with design concepts and RTL implementation for same Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics Good understanding of computer organization/architecture ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA Ambassadors- QuestaSim (Simulation) R&D team (strong AI/ML background) This is your role In this role, you will, craft and develop AI/ML-driven algorithms and solutions to improve simulation tools' performance and capabilities. Contribute to building state-of-the-art engines and components, integrating machine learning techniques into simulation and verification workflows. Contribute to the development and improvement of production-quality components, algorithms, and engines while supporting and improving existing codebases. Solve complex, open-ended problems in collaboration with a senior group of engineers in a fast-paced and multifaceted environment. Apply technical expertise in AI/ML frameworks, data-driven problem solving, and traditional simulation technologies to achieve project milestones. Stay self-motivated, disciplined, and focused while driving innovation within the team. Required Qualifications We are seeking a graduate with Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Electrical Engineering, or a related technical field from an accredited institution. We value your experience with conceptualizing, defining, architecting, and implementation of an open-ended problem scope or new insights. Hands-on experience with AI/ML techniques, including supervised and unsupervised learning, neural networks, and reinforcement learning. Strong proficiency in programming languages like C/C++ and Python, along with strong foundations in algorithms and data structures. Knowledge of machine learning and deep learning frameworks. Strong understanding of Compiler Concepts, Optimizations, and parallel computing. Experience working on UNIX and/or LINUX platforms. Excellent problem-solving and analytical skills. Proven track record to work independently, take ownership of tasks, and deliver results A plus! Basic knowledge of Digital Electronics and concepts related to SystemVerilog, Verilog, and VHDL. Exposure to Simulation technologies or Formal-based Verification methodologies is a plus! We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-EDA #LI-HYBRID

JOB DESCRIPTION Key Responsibilities:  Develop RTL code using Verilog/VHDL for FPGA implementations.  Optimize hardware designs for performance, area, and power.  Work on Xilinx Vivado IPs and other FPGA toolchains.  Implement and optimize DSP algorithms for image and signal processing.  Work with MATLAB/Simulink for algorithm modeling and hardware mapping.  Perform functional and timing verification using UVM, SystemVerilog.  Develop testbenches, run simulations, and analyze waveforms.  Conduct post-synthesis and post-layout verification.  Implement and verify standard communication protocols (I2C, SPI, UART, PCIe, AXI, etc.).  Integrate and validate external peripherals in FPGA-based designs.  Guide students and Ph.D. scholars in developing VLSI-based academic projects.  Provide documentation, reports, and technical support for research work.  Deliver workshops and training sessions on VLSI, FPGA, and Signal Processing. Required Skills & Qualifications :  B.Tech/M.Tech/Ph.D. in VLSI, Electronics, Electrical, or a related field.  Strong experience in RTL design (Verilog/VHDL).  Hands-on experience with FPGA toolchains (Xilinx Vivado, Quartus, etc.).  Knowledge of MATLAB/Simulink for DSP applications.  Expertise in verification methodologies (UVM, SystemVerilog, ModelSim, QuestaSim).  Familiarity with communication protocols (AXI, PCIe, Ethernet, etc.).  Experience in hardware debugging and timing analysis.  Experience in HLS (High-Level Synthesis).  Knowledge of ASIC design flow and RTL-to-GDSII concepts.  Exposure to AI/ML accelerators on FPGA (optional but a plus).  Passion for mentoring students and guiding research projects. Job Type: Full-time Pay: ₹20,000.00 - ₹30,000.00 per month Schedule: Fixed shift Experience: VLSI: 1 year (Required) Work Location: In person