Staff Engineer, Verification

About Marvell

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Your Team, Your Impact

What You Can Expect

Essential Responsibilities (not limited to):

• Responsible for understanding the logic, develop hitlist, verification environment, testcases etc. , required for verifying the logic, individually
• Implement verification methodologies for testbench development
• Develop scripts required for running simulations and regressions and debug fails
• Document the verification plan and verification documentation
• Plan functional coverage/code coverage, analyze and improve coverage
• Review and update verification environment and testcases
• Report, track and close logic issues
• Work and communicate effectively with global team
• Work with designers and FW engineers to enable better verification

What Were Looking For

Essential qualifications:

• Must have good digital logic understanding and fundamentals of digital design.
• Candidate must have excellent skills in digital logic verification and hardware description language (VHDL or Verilog),
• Strong knowledge in object oriented programming using languages such as System Verilog
• Must have hands on experience in hardware verification methodologies such as UVM or OVM,
• Must be familiar with verification test planning and coverage driven verification closure, Verification strategies for directed and randomised testing and assertions
• Must have good experience in using simulation tools and proficiency in simulation debug techniques.
• Strong knowledge / experience in building the verification environment from specification and should have spec to hardware bring-up experience.
• Must have hands on knowledge on test-bench development and automation, bug tracking, and regression mechanisms
• Should be able to act as the team lead to determine methods and procedures on new assignments and coordinate activities of other team members to ensure successful project completion.

Preferred skills:

• Experience in High Speed SerDes, clock data recovery based PHYs,
• Asynchronous clock domain crossing verification.
• IP architecture and verification knowledge
• Experience in scripting languages such as Perl
• Gatelevel simulation and AMS simulation knowledge
• Experience with Linux operating system
• Experience with industry simulation tools
• Good communication skills and quick learning ability.
• Knowledge of standard configuration management system like CVS or SVN
• Hands on scripting knowledge

Education:

• Bachelor s degree in Electronics Engineering or related fields and 7-8 years of related professional experience.
• Master s degree in VLSI Design with 5 -7 years of experience.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.