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Staff ASIC Digital Design Engineer

0 - 1 years

20 - 25 Lacs

Posted:4 hours ago| Platform: Naukri logo

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Job Type

Full Time

Job Description


Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. As a Staff IC Design Engineer at Renesas India, you will play a crucial role in the design and development of advanced integrated circuits that power our innovative MCU products. You will leverage your expertise in IC design to lead complex projects, mentor junior engineers, and drive the evolution of our design methodologies and processes.
Responsibilities
  • Lead the RTL design of subsystems in MCU SoCs, ensuring they meet performance, power, and area specifications
  • Support SoC integration and delivery of subsystem views to Back-end and Design verification team
  • Own Quality Checks and support Functional Verification of the owned blocks
  • Collaborate with cross-functional teams, including system architects and software engineers, to define specifications and ensure seamless integration

Preferred Experience

  • Micro Architecture Design, High Level Digital Design, RTL coding.
  • Experience in owning complex IPs or Subsystem designs in ASIC
  • Good understanding and experience in using RTL QC tools such as Spyglass CDC/RDC

Qualifications

Required and Preferred Qualifications

Required:

  • Bachelors degree in Electronics and communication, Electrical Engineering, Computer Engineering, or a similar technical field and with a proven track record of delivering high-quality designs
  • BSEE a minimum of 8 years of digital design with a proven track record of delivering high-quality designs
  • Expertise in RTL design using Verilog/VHDL and familiarity with analog/mixed-signal design concepts
  • Strong understanding of digital design principles and methodologies, timing analysis, and verification methodologies
  • Experience with industry-standard EDA tools for synthesis, simulation, and static timing analysis
  • Scripting experience in Shell, Perl, Python and TCL is a plus

Preferred:

  • Experience with low-power design techniques and methodologies
  • Familiarity with SoC design and integration
  • Familiarity with synthesis and timing constraints

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