Job Title: Project Manager - Cloud FPGA Platform About the Role: We are seeking a seasoned Project Manager with 10-15 years of experience leading large-scale, multi-disciplinary engineering projects. In this role, you will be responsible for driving the execution of a Cloud FPGA benchmarking and deployment platform that enables seamless comparison of REDEFINE FPGA workloads with traditional CPU and GPU targets. The platform involves automated configuration, AWS-based provisioning, CI/CD integration, bitstream generation, performance benchmarking, and application deployment. The ideal candidate will combine strong cloud infrastructure management experience, FPGA design process understanding, and excellent project management discipline. You will coordinate across multiple technical teams including hardware, software, and DevOps - and external collaborators to deliver a scalable, secure, and user-facing cloud platform. Key Responsibilities: Program Strategy & Execution: Define and manage the Cloud FPGA roadmap, aligning it with business needs and product goals. Ensure that all phases - from FPGA image generation to multi-node scaling are executed on schedule Stakeholder Management: Act as the single point-of-contact across multiple stakeholders, including internal hardware/software/DevOps teams and external solution partners Cloud Architecture & Provisioning: Coordinate the setup and lifecycle of Terraform-managed AWS resources including EC2, F1/F2, IAM, and container-based infrastructure. CI/CD Orchestration: Lead the integration of GitHub Actions, Jenkins, or other CI pipelines to automate FPGA builds, AFI generation, test deployments, and reporting flows. Multi-FPGA Scaling: Oversee implementation and testing of multi-node deployments using tools like FireSim, Switchboard, or Fireaxe. Ensure performance, latency, and synchronization goals are met. Performance Metrics & Dashboarding: Enable instrumentation pipelines to collect application logs, performance counters, and profiling data. Oversee dashboard development using CloudWatch or other telemetry tools. Security & Governance: Ensure IAM role management, access control, secure provisioning policies, and compliance with internal security standards for all cloud deployments. Milestone Tracking: Monitor sprints, deliverables, blockers, and inter-team dependencies using Agile tools (e.g., Jira, Azure Boards, Planner Premium). Ensure timely delivery and escalation of risks. Documentation & Reporting: Maintain internal documentation for architecture, processes, and workflows. Provide weekly and monthly reports for the leadership team Required Skills & Experience: 10-15 years of experience in project or program management across cloud infrastructure, semiconductor, or embedded systems domains. Educational background in Electronics Engineering, Electrical Engineering, or Computer Engineering. Deep familiarity with Agile methodologies and managing sprints, reviews, and delivery workflows using tools like Jira, Planner Premium, or Azure DevOps. Experience with Infrastructure-as-Code (IaC) frameworks such as Terraform or CloudFormation, and automation of AWS resource deployments. Strong knowledge of AWS services such as EC2, IAM, S3, VPCs, and particularly AWS FPGA offerings like F1/F2 instances. Proven experience coordinating with vendors such as BlueSpec and ZeroASIC, and using tools like FireSim, Switchboard, and Fireaxe for simulation and deployment. Understanding of FPGA build processes, bitstream creation, AFI packaging, and integration with Linux-based cloud hosts. Strong interpersonal and communication skills; ability to work across time zones with internal teams and external vendors. Ability to thrive in ambiguous environments, set direction, and provide structure where it does not exist. Preferred Qualifications: Certifications: AWS Certified Solutions Architect, PMP, or Scrum Master certifications are desirable. Experience with AMI/AFI lifecycle management, remote debugging, and DevOps agents for FPGA provisioning. Familiarity with VSCode extensions, Eclipse Theia, or building web-based IDEs with performance metric dashboards. Hands-on understanding of FPGA simulator integration, log collection, and profiling using instrumentation frameworks. Knowledge of cloud security best practices, infrastructure cost optimization, and user access controls. Education & Experience: Bachelor s or Master s degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or related fields. 10-15 years of professional experience in technical project/program management with significant exposure to cloud computing and/or FPGA-based systems. What We Offer: The opportunity to lead and shape a globally novel platform for FPGA benchmarking and cloud-based workload execution. Deep collaboration with some of the most talented teams in hardware architecture, AI/ML software, and cloud DevOps. Exposure to a unique combination of semiconductor system design, cloud deployment at scale, and real-world application performance profiling. Apply Now

Job Title : SoC Architecture & RTL Engineer Company Overview Morphing Machines is a fabless semiconductor company focused on developing dynamic real-time reconfigurable RISC-V compliant dataflow accelerators. Our innovative technology aims to revolutionize hardware acceleration for high-performance computing and energy-efficient systems. Job Summary We are seeking a highly experienced SoC Architecture & RTL Engineer to design, implement, and optimize complex digital systems for next-generation computing platforms. This role offers the opportunity to work on cutting-edge SoC architectures involving high-speed interfaces and industry-standard protocols. Key Responsibilities Design and develop SoC architecture and RTL for complex digital systems. Work on CPU, GPU, and DSP pipelines, cache coherence protocols, and network-on-chip (NoC) designs. Integrate and validate PCIe, CXL, DDR, Ethernet, and other high-speed IPs. Ensure compliance with industry-standard protocols such as AXI, TileLink, PCIe, UCIe, and CXL. Perform simulation, synthesis, and optimization to meet performance and power targets. Collaborate with cross-functional teams for silicon delivery. Debug and resolve design and integration issues. Continuously explore and adopt new tools, methodologies, and technologies. Required Skills and Qualifications Bachelor s or Master s degree in Electrical/Electronics Engineering, Computer Engineering, or a related field. 10+ years of experience in SoC architecture and RTL engineering. Strong expertise in digital design concepts, computer architecture, and hardware description languages (Chisel, Verilog, or VHDL). Hands-on experience with PCIe, CXL, DDR, Ethernet IPs. Experience with AXI, TileLink, PCIe, UCIe, and CXL protocols. Proficiency with digital design tools, simulation, and synthesis flows. Excellent problem-solving, communication, and teamwork skills. Ability to work independently in a fast-paced environment. Preferred Skills Experience in CPU/GPU/DSP core pipeline design and cache coherence protocols. Exposure to network-on-chip (NoC) architectures. Familiarity with power and performance optimization techniques. What We Offer Opportunity to work on innovative semiconductor technology. Collaborative, flexible, and inclusive work environment. Competitive compensation package. Exposure to cutting-edge hardware-software co-design challenges. Apply Now

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Role Overview: As the Senior FPGA Engineer, you will play a mission-critical role in integrating FPGA designs on both cloud-hosted (AWS F1/F2) and on-premise FPGA platforms. You will own the entire lifecycle of FPGA bring-up, from IP handoff and integration to multi-fabric orchestration and performance validation. You will work closely with product, compiler, and orchestration teams to ensure FPGA-resident applications can be easily deployed, monitored, and benchmarked. Your responsibilities will include validating bitstreams, implementing communication pipelines, and enabling test/demo infrastructure across compute fabrics implemented over various FPGA s. Key Responsibilities: FPGA Bring-Up & Bitstream Integration Interface with the IP team to integrate design drops into deployable bitstreams. Bring up bitstreams on AWS F1/F2 instances, Xilinx VCU platforms, or other compatible boards. Debug issues related to I/O wrapper logic, timing, etc. Platform and Tooling Integration Work with Switchboard and FireSim environments to support application execution across multiple FPGA boards. Contribute to building a Continuous Integration/Deployment (CI/CD)-like pipeline for FPGA validation and test deployment. Establish protocols to bring up and manage multi-FPGA topologies. Application Enablement and Profiling Support application developers in deploying and profiling workloads coded in C with Hardware specific pragmas on FPGA targets. Validate compute vs communication tradeoffs; capture latency, throughput, and power KPIs. Enable applications such as voxel pooling, BFS, and encrypted inference. Documentation and Enablement Document the end-to-end FPGA bring-up workflow, including toolchains, setup guides, debug logs, and issue trackers. Required Skills and Qualifications: Technical Skills: Strong experience with Xilinx toolchains (Vivado, Vitis) , FPGA flows and implementation of design across FPGA boards Hands-on exposure to cloud-based FPGA platforms such as AWS F1/F2 Solid understanding of RTL development using Verilog/SystemVerilog Familiarity with memory controllers, timing analysis, and interface protocols Tooling & Workflow Integration: Experience with FPGA integration in CI/CD environments Knowledge of simulation and emulation frameworks Understanding of software-hardware co-design and ability to assist with application bring-up (C/C++) Soft Skills: Strong debugging and problem-solving skills Comfortable working in fast-paced, ambiguous environments Excellent communication and collaboration skills Ability to take ownership of integration across multiple teams Education and Experience: Bachelor s or Master s degree in Electronics, Electrical, or Computer Engineering 10+ years experience in FPGA bring-up, hardware integration, or system-level FPGA projects Preferred Skills (Bonus): Experience with Switchboard, FireSim, or multi-fabric orchestration Familiarity with compiler-level hardware mapping Understanding of OpenCL, LLVM, or machine-generated IR flows Ability to assist in building test infrastructure for cloud FPGA CI/CD Apply Now

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Job Overview : As the Senior Compiler Engineer, you will be responsible for leading the development of a compiler toolchain for the REDEFINE accelerator, including an MLIR-based graph compiler for AI-ML frameworks. You will work closely with cross-functional teams, including hardware engineers, software developers, and system architects, to ensure the seamless integration of the REDEFINE accelerator with the software ecosystem. Your expertise in compiler development, programming languages, and AI-ML frameworks will be essential in building a powerful and developer-friendly software toolchain. Requirements : Graph Compiler Development: Lead the development of a graph compiler for AI-ML applications, enabling efficient execution of complex neural network models on the REDEFINE accelerator. Design and implement compiler optimizations, code transformations, and scheduling techniques to maximize performance and resource utilization. Collaborate with the hardware and system architecture teams to understand accelerator capabilities and optimize the compiler for specific hardware features. Software Toolchain Development: Contribute to the overall development of the software toolchain for the REDEFINE accelerator, including compilers, runtime environments, and libraries. Collaborate with the system software and runtime teams to optimize the interaction between the compiler and runtime components. Ensure developer-friendly features like debugging support, profiling, and performance analysis tools. Performance Analysis and Optimization: Conduct performance analysis and optimization of the compiler, graph compiler, and intermediate abstraction layer. Collaborate with the hardware and system teams to identify opportunities for performance improvements and software-hardware co-optimizations. Stay updated with the latest advancements in compiler techniques, programming languages, and AI-ML frameworks to drive continuous improvement. Collaboration and Documentation: Collaborate closely with hardware, software, and system teams to ensure seamless integration and compatibility. Document design decisions, algorithms, and optimizations to facilitate knowledge sharing and future development. Provide technical guidance and mentorship to junior team members, fostering a culture of innovation and learning. Qualifications : Masters or Ph.D. degree in Computer Science, Electrical Engineering, or a related field. Proven experience (5+ years) in LLVM/MLIR-based compiler development, particularly in graph compilers for AI-ML applications. Familiarity with AI-ML frameworks like TensorFlow, PyTorch, or ONNX and their compiler integration. Experience with vectorization and parallel programming models such as OpenMP, SYCL, CUDA, or GPGPU programming. Solid understanding of hardware-software co-design principles and performance optimization techniques. Strong analytical and problem-solving abilities. Excellent communication and collaboration skills. Ability to thrive in a fast-paced startup environment. Apply Now

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Position Overview: As an Associate System Software Engineer at Morphing Machines, you will join the System Software team, building software for the REDEFINE Accelerator - a powerful RISC-V based computing platform for future technologies. This is a great opportunity to start a career in System Software Development, while learning from experienced Engineers and growing your skills under their guidance. You will help bridge the gap between hardware and AI workloads by working on bare-metal firmware, device drivers, Linux kernel modules as well as REDEFINE in-house Simulators and learn hardware-software co-design. Responsibilities: System Software Development: Develop/maintain system software components that enable the REDEFINE accelerator to interface with host systems and software. Design and implement software modules, libraries and APIs to facilitate integration and efficient utilization of accelerator features. Test and debug system software components and ensure functional correctness, reliability and fine-tuning of performance of software components. Firmware Development: Implement, test and debug features in bare-metal firmware and diagnose issues across hardware-software boundary using both industry-standard and in-house developed debug tools. Linux Device Driver Development: Hands on in writing Linux device drivers and Linux based applications. Develop and maintain Linux kernel device drivers for the REDEFINE accelerator. REDEFINE Simulator: Work in feature enhancement and testing of our in-house REDEFINE simulators which model complex interactions between diverse hardware and compute units to validate architecture and performance. Hardware-Software Interaction: Collaborate closely with hardware engineers to understand the accelerators architecture, memory mapping, and communication protocols. Support Senior engineers in testing, debugging features. Documentation and Support: Document code, flow-charts, design decisions and usage guidelines. Participate in code reviews and team discussions to grow your understanding and skills. Requirements: Bachelors / Master s in Computer Science, Electronics and Communication Engineering. Expertise in C/Embedded C programming, OOP concepts and shell scripting. One high-level language like C++, Python, Go, Rust is a plus. Fundamentals in Computer Architecture and familiarity with modern processor architectures (ARM, RISC-V, x86, etc). Knowledge of Operating System Concepts and experience with Linux internals and environment. Understanding of build infrastructure and exposure to software development tools eg. IDEs, debug methods, version management etc. Academic exposure and hands-on on software/application development, firmware development and Linux system programming. Passion for low-level programming, systems, and hardware-software interaction. Strong analytical and problem-solving skills. Eagerness to learn, ask questions, and grow in a collaborative environment. Ability to work in a dynamic startup environment and manage multiple tasks effectively. Apply Now

About the Company: Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware. Job Overview: We are seeking a skilled FPGA Engineer who will drive the emulation of our REDEFINE dataflow accelerator on cloud-based Xilinx FPGA platforms and physical FPGA boards. This is an exciting opportunity to work at the intersection of cutting-edge FPGA technology, cloud platforms, and hardware-software co-design. Key Responsibilities : FPGA Emulation Development Design, implement, and optimize FPGA-based emulation environments for the REDEFINE dataflow accelerator. Develop FPGA design and RTL code for various hardware system and sub-system configurations. Integrate and simulate the emulation environment to validate the functionality and performance of the accelerator. Collaborate closely with hardware and software teams to ensure accurate architectural representation in emulation. Work with RTL verification teams to identify and resolve design issues using simulation and debug tools. Document and report emulation results, test findings, and recommendations to the broader engineering team. Cloud-Based Xilinx FPGA Platform Integration Configure and deploy the REDEFINE dataflow accelerator on cloud-based Xilinx FPGA platforms (e.g., Amazon EC2 F1 instances, Xilinx Alveo cards). Optimize and fine-tune the emulation environment for high performance on cloud FPGA platforms. Collaborate with software teams to integrate the software stack into the cloud-based emulation environment. Required Skills & Experience : Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience as an FPGA Engineer specializing in emulation and validation. Strong expertise in FPGA design, implementation, and verification using Xilinx FPGAs and Vivado tools. Experience with cloud-based FPGA platforms such as Amazon EC2 F1 or Xilinx Alveo. Proficiency in RTL coding (VHDL or Verilog). Knowledge of RISC-V architecture and dataflow accelerators (preferred). Familiarity with FPGA debugging tools and methodologies. Strong analytical and problem-solving skills. Excellent communication and teamwork abilities. Self-motivated, detail-oriented, and passionate about working on innovative technologies. What We Offer : The opportunity to contribute to the emulation and validation of a novel, many-core dataflow accelerator targeting next-generation high-performance systems. A collaborative work environment with talented teams across hardware architecture, system software, and FPGA engineering. Exposure to advanced FPGA technology, cloud deployment at scale, and the design flow leading up to GDS-II. Apply Now