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2 - 7 years

0 - 0 Lacs

Kolkata

Hybrid

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Deep Knowledge of Swap Acceptance Procedure. Deep Knowledge of Cluster Acceptance Procedure. Deep Knowledge of Nokia KPIs/Counters for LTE & VoLTE. Deep Knowledge of Ericsson KPIs/Counters LTE & VoLTE. Nokia Parameter knowledge for LTE & VoLTE Optimization. Ericsson Parameter knowledge for LTE & VoLTE Optimization. Knowledge of LTE & VoLTE Call Flow. Knowledge on Major Alarms, VSWR, Antenna. Knowledge of Drive Test KPIs such as RSRP, RSRQ, SINR, CQI, RI Basic Knowledge of Power BI. Optional: Knowledge of 5G NSA/SA

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18 - 20 years

20 - 25 Lacs

Noida

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An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design. You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structure, and interconnect failure modes in advanced finfet technology nodes. You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology. You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation. You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution. What you'll Be Doing: Leading Serdes analog design and development. Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction. Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes. Collaborating with silicon test and debug experts for Sim2Sil correlation. Building and nurturing a team of analog design talent. Working with experienced teams locally and globally. The Impact You Will Have: Driving innovation in mixed-signal analog design. Enhancing the performance and efficiency of high-speed physical interfaces. Contributing to the development of cutting-edge technology in High Speed PHY IP. Improving quality and reliability through collaboration and Sim2Sil correlation. Growing the business impact by building and leading a talented team. Advancing Synopsys leadership in chip design and IP integration. What you'll Need: BE 18+ years of relevant experience or MTech 15+ years of relevant experience in mixed signal analog, clock, and datapath circuit design. Strong knowledge of RF architecture and blocks such as transceivers, VCOs, LNA, and up/down converters. Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits. Proficiency in high-speed digital circuit design and timing/phase noise analysis. Ability to create behavioral models of PLL to drive architectural decisions. Who You Are: Strong fundamentals of CMOS, device physics, and sub-micron design methodologies. Experience with PLL designs and high-speed digital circuit design. Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques. Experience in LC VCO/DCO design and performance parameters of VCO. Familiarity with digitally assisted analog circuit techniques. The Team you'll Be A Part Of: You will be joining an expanding analog/mixed-signal serdes team involved in the design and development of cutting-edge High Speed PHYSICAL Interface Development. You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

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7 - 12 years

10 - 15 Lacs

Bengaluru

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As our ideal candidate, you are a seasoned professional with a deep understanding of CMOS analog and mixed-signal Layout Design Engineering. You thrive in a collaborative environment and are passionate about pushing the boundaries of technology. With over 5 years of experience, you have honed your skills in designing complex PLLs, VCOs, charge pumps, and high-speed digital circuits Layout. You are detail-oriented, capable of coordinating with various teams, and have a proven track record of delivering high-quality designs. Your strong foundation in electrical engineering, combined with your innovative mindset, allows you to tackle diverse problems creatively and effectively. With excellent communication skills, you can articulate complex technical concepts to both technical and non-technical stakeholders, ensuring seamless collaboration and project success. What You ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits in PLL and other IP Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Define, design and develop complex RF clock path Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Ensure the highest quality and performance of our analog and mixed-signal integrated circuits. Drive innovation by developing cutting-edge layout designs that push the boundaries of technology. Enhance the manufacturability and reliability of our products through meticulous design and verification processes. Contribute to the overall success of our projects by providing valuable feedback during design reviews. Improve design methodologies and best practices, fostering a culture of continuous improvement. Support the growth and development of junior engineers by sharing your expertise and knowledge. What You ll Need: Bachelors or Masters degree in Electrical Engineering or a related field. 7+ years of experience in A&MS layout design for integrated circuits. Hands physical design experience of passive elements used in PLL RC filter, LC oscillator Basic knowledge of PLL operating blocks Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented env Who You Are: Innovative thinker with a passion for technology and problem-solving. Excellent communicator, capable of articulating complex concepts clearly. Detail-oriented with a strong focus on quality and precision. Collaborative team player who thrives in a dynamic work environment. Adaptable and able to manage multiple priorities effectively

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5 - 8 years

13 - 15 Lacs

Bengaluru

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We are seeking a highly motivated Product Engineer who is passionate about advancing technology and solving complex design challenges. You are innovative, dependable, and have a strong technical background in transistor-level analysis. With a minimum of 5 years of hands-on experience, you possess exceptional expertise in debugging circuit-level issues for SRAM, RF, ROM memories, and Standard Cells. You have a deep understanding of static timing concepts and CMOS engineering fundamentals, coupled with proficiency in TCL or other scripting languages. Your excellent communication and social skills enable you to collaborate effectively with cross-functional teams, including R&D, Field AEs, Sales, and Marketing. You thrive in a dynamic environment, driving new products and features that exceed customer expectations and contribute to the success of Synopsys. What You ll Be Doing: Drive new products and new product features that exceed customer needs. Work with R&D to enable timely implementation of new products and features, and important bug fixes. Provide consultation to prospective users and/or product capability assessment and validation. Provide tool trainings to customers and Field AEs. Provide technical expertise to sales staff through sales presentations and product demonstrations. Assist the sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications for the development and implementation of customer applications/solutions. The Impact You Will Have: Influence technology and solution roadmaps through collaboration with R&D. Ensure overall consistency of end-to-end design and analysis flow to meet customer needs. Drive new tool evaluations and help customers with the adoption and continuous usage of our tools. Enable Chip Design customers to achieve optimal Timing, Power, and Characterization goals. Enhance predictability and productivity for designers through advanced tool features. Identify and resolve design issues early-on, minimizing costly late-stage silicon problems. What You ll Need: BS degree in Electrical Engineering or related field. Minimum of 5 years of recent hands-on experience in transistor-level analysis. Expertise in debugging circuit-level issues for SRAM, RF, ROM memories, and Standard Cells. Proficiency in static timing concepts and CMOS engineering fundamentals. Knowledge of TCL and/or other scripting languages. Who You Are: Innovative and motivated. Dependable and detail-oriented. Excellent communicator and collaborator. Proactive problem solver. Adaptable and eager to learn

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12 - 15 years

15 - 20 Lacs

Hyderabad

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Collaborates in developing new or modified, high-density, printed circuit boards. Work with Design Engineer and Simulation Engineer in making sure PCB layout adheres to SI/PI requirements. Work on the Layout design for highspeed interfaces like PCIe Gen5/6, Multi-Gigabit serial buses, DDR5/LPDDR5/DIMM and other circuits. Work on the characterization/evaluation and production boards. Create or modify footprints as per guideline and maintain library database. Should work with Fabrication and Assembly house for DFX queries. Should follow process, guidelines, and checklists to produce error free design. Should be able to meet the schedule. Job Description : 12 + years of layout design experience in High-Speed Digital Design, Analog, and RF boards. Excellent experience in routing of interfaces like PCIe Gen5/6, Multi-Gigabit serial buses, DDR5/LPDDR5/DIMM, Flash, SPI, I2C and High current switching power supplies Excellent hands-on knowledge of Cadence Allegro PCB design, constraint manager. Excellent knowledge of IPC standards, HDI, back drilling, stack up selection. Excellent experience in design with DFM/DFT/DFA constraints. Hands on experience on CAM350 gerber review tool. Hands on experience on footprint creation and library database maintenance. Good understanding of mechanical 3D model design practice. Ability to work independently with minimal supervision and ability to handle multiple tasks. Ability to work cross-functional along with strong interpersonal and communication skills.

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3 - 5 years

13 - 14 Lacs

Bengaluru

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DESIRED SKILLS Printed circuit board design (proficient in Altium a PLUS), fabrication and assembly (AutoCAD) Communication systems (high-speed servers, switches, routers, storage) Signal conditioning techniques (equalization, amplification) SixSigma methodologies or other strong data analytics background a PLUS. Experience in project leadership, especially as it applies across design, development manufacturing teams Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques Design experience with high-speed servers, switches, routers, storage, antenna, RF front end or similar systems Job Overview KEY RESPONSBILITIES: Drive SI design, simulation, and validation for next-gen high-speed interconnects (112G/224G PAM4, PCIe Gen6/7, Co-Packaged Optics) through the product development cycle. Conducting SI COE analysis, including o Performing signal integrity simulations and analysis for high-speed interconnect product development. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface. o Modeling the connector with the consideration of manufacture impact and application impact. o Providing solutions to the SI challenges. This includes identifying the problems, making research plan, developing new technologies, and training and sharing the findings to the SI community. Develop novel interconnect solutions by optimizing mating interfaces, lead frames, and PCB transitions for resonance-free, low-loss performance. Enhance bulk cable design termination techniques to minimize skew, impedance mismatches, and signal degradation. Advance high-frequency testing methodologies beyond 67 GHz with innovative non-PCB-based test fixtures. Utilize AI big data analytics for predictive SI modeling, auto-routing, and performance optimization. Optimize material selection electromagnetic design to improve noise isolation, signal integrity, and high-frequency response. Collaborate with NPD teams industry partners to influence SI strategies, technology roadmaps, and next-gen product designs. Represent TE at industry forums (IEEE, OIF, PCI-SIG, etc. ) and contribute to next-gen SI standards. Bachelor s degree in Electrical Engineering. Should have total work experience of 3-5+years. Minimum of 5+ years of work experience in a signal integrity engineering role or related experience Minimum of 3+ years of work experience in connector development - Experience with interconnect design or experience with connector /or cable/cable assembly design(high speed twinax cables, direct attach copper (DAC) cables) Demonstrated experience using Signal integrity analysis tools (Agilent ADS, Ansys HFSS or equivalent, 3D modeling tools) and testing equipment (including VNA, TDR and BERT). A solid understanding of statistical analysis and AI training. A solid understanding of SI knowledge, including electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Familiar with material, manufacturing process, and manufacture inspection. Familiar with at least one programming language, such as Matlab, python, C++, VB, etc. Excellent verbal and written communication skills Competencies Values: Integrity, Accountability, Inclusion, Innovation, Teamwork Location:

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3 - 8 years

13 - 14 Lacs

Bengaluru

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Job Overview Responsbilties: Drive SI design, simulation, and validation for next-gen high-speed interconnects (112G/224G PAM4, PCIe Gen6/7, Co-Packaged Optics) through the product development cycle. Conducting SI COE analysis, including o Performing signal integrity simulations and analysis for high-speed interconnect product development. This includes determining the correct simulation methodology and setup to use, as well as a good understanding of the criteria for each interface. o Modeling the connector with the consideration of manufacture impact and application impact. o Providing solutions to the SI challenges. This includes identifying the problems, making research plan, developing new technologies, and training and sharing the findings to the SI community. Develop novel interconnect solutions by optimizing mating interfaces, lead frames, and PCB transitions for resonance-free, low-loss performance. Enhance bulk cable design termination techniques to minimize skew, impedance mismatches, and signal degradation. Advance high-frequency testing methodologies beyond 67 GHz with innovative non-PCB-based test fixtures. Utilize AI big data analytics for predictive SI modeling, auto-routing, and performance optimization. Optimize material selection electromagnetic design to improve noise isolation, signal integrity, and high-frequency response. Collaborate with NPD teams industry partners to influence SI strategies, technology roadmaps, and next-gen product designs. Represent TE at industry forums (IEEE, OIF, PCI-SIG, etc. ) and contribute to next-gen SI standards. Should have total work experience of 3-8+years. Minimum of 5+ years of work experience in a signal integrity engineering role or related experience Minimum of 3+ years of work experience in connector development - Experience with interconnect design or experience with connector /or cable/cable assembly design (high speed twinax cables, direct attach copper (DAC) cables) Demonstrated experience using Signal integrity analysis tools (Agilent ADS, Ansys HFSS or equivalent, 3D modeling tools) and testing equipment (including VNA, TDR and BERT). A solid understanding of statistical analysis and AI training. A solid understanding of SI knowledge, including electromagnetic theory and electrical circuit behavior Strong analytical capabilities to interpret simulation and lab data to identify issues and provide solutions to fix identified problem. Familiarity with printed circuit board design, fabrication and assembly. Familiar with material, manufacturing process, and manufacture inspection. Familiar with at least one programming language, such as Matlab, python, C++, VB, etc. Excellent verbal and written communication skills Ability to work in a global environment - able to accommodate varying time zones, fluent in English (verbal/written), able to collaborate with individuals across geographies DESIRED SKILLS Printed circuit board design (proficient in Altium a PLUS), fabrication and assembly (AutoCAD) Communication systems (high-speed servers, switches, routers, storage) Signal conditioning techniques (equalization, amplification) SixSigma methodologies or other strong data analytics background a PLUS. Experience in project leadership, especially as it applies across design, development manufacturing teams Direct customer design and support experience Application and test knowledge of high-speed devices and equalization techniques Design experience with high-speed servers, switches, routers, storage, antenna, RF front end or similar systems Competencies Values: Integrity, Accountability, Inclusion, Innovation, Teamwork Location:

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0 - 6 years

6 - 7 Lacs

Bengaluru

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Job Overview TE Connectivity s RD/Product Development Engineering Teams conceive original ideas for new products, introduce them into practice. PCB engineer is scalable to contribute individually. He/she is responsible for delivering the project from schematic scratch till the board get fabricated. Stackup analysis, routing strategy, placement feasibility is more important. RD engineer should familiarize in manufacturing process and the different soldering process, IPC standards for SMT PTH library footprint creation. Responsible for all the documentation related to the board design and fabrication data. Typical fields of expertise include Analysing different dielectric materials, knowledge on high-speed design constraint, electrical, software, automation systems, data packaging, testing and measurement, and manufacturing of electrical, mechanical and electronic components, products, and their integration into systems. Responsibilities: TE Connectivity is seeking an experienced candidate for high speed printed circuit board design. The candidate is expected to interface with US and China based engineering teams for input and independently work on printed circuit board layout while also providing guidance and direction to local designers. The position requires that the candidate be able to utilize generalized engineering direction to create detailed custom designs. The candidate will be responsible for ensuring the accuracy and functionality of the end design and be able to take ownership of various aspects of the PCB design. Programs may additionally include pre-layout analysis and coordination of global vendors for prototype fabrication and assembly. Candidate Desired Profile: Candidate should have excellent verbal communication skills, a high attention to detail, be highly motivated, a quick learner, and be able to work independently. Understanding of printed circuit board design, manufacturing, and assembly is required. Experience with printed circuit board design is required. Experience in a senior technical or leadership role is required. Must be able to deliver the board design from scratch schematic to gerber release for manufacturing. Very good exposure in design software - Altium, Allegro, AutoCAD is must. Previous work experience in high-speed board designs will be highly preferred. Altium/Allegro tool scripting knowledge will be an added advantage for this role. Able to address supplier Engineering Queries. Familiarity with the following a plus: CAM350 High speed and/or RF circuits Signal integrity analysis Connectors and cable assemblies PCB manufacturing tolerances and cost drivers PDMLink process ECR/ECN release process Competencies Values: Integrity, Accountability, Inclusion, Innovation, Teamwork ABOUT TE CONNECTIVITY TE Connectivity is a global industrial technology leader creating a safer, sustainable, productive, and connected future. Our broad range of connectivity and sensor solutions enable the distribution of power, signal and data to advance next-generation transportation, renewable energy, automated factories, data centers, medical technology and more. With more than 85, 000 employees, including 8, 000 engineers, working alongside customers in approximately 140 countries. TE ensures that EVERY CONNECTION COUNTS. Learn more at www. te. com and on LinkedIn , Facebook , WeChat, Instagram and X (formerly Twitter). WHAT TE CONNECTIVITY OFFERS: We are pleased to offer you an exciting total package that can also be flexibly adapted to changing life situations - the well-being of our employees is our top priority! Competitive Salary Package Performance-Based Bonus Plans Health and Wellness Incentives Employee Stock Purchase Program Community Outreach Programs / Charity Events Employee Resource Group Across our global sites and business units, we put together packages of benefits that are either supported by TE itself or provided by external service providers. In principle, the benefits offered can vary from site to site. Location:

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