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ACL Digital
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PE and LB timing Professional

PE and LB timing Professional

ACL Digital

2 - 3 years

4 - 5 Lacs

Bengaluru

Posted:1 week ago| Platform:

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Skills Required

Embedded C Automation C++ Simulation Product innovation Analog Consulting Verilog Debugging Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

Roles and Responsibility

Skill Job Description Open position Count

.LIB timing file generation Experience Level - 2-3 years 1

Need resource with the following skills:

.LIB timing file generation

Verilog Modelling

Analog design characterization - familiarity with Cadens spectre and Synopys Hspice

Additional help with Analog Quality Checks :

o EM/IR simulation

Please find the below mentioned JD for the replacement hiring.

1. Embedded product knowledge like UFS and eMMC

2. Embedded c , c++ & python knowledge is must

3. Automation background is also major priority

4. Experience on debugging using T32 or any tools

Experience : Within 5 Years.

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PE and LB timing Professional