MTS Silicon Design Engineer

THE ROLE:

We are looking foran adaptive, self-motivated SoC Front-end Design Engineer to join our growing team. As a key contributor,you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, SOC design, design quality checks and design automation in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Design of Subsystems with integration of AMD and other 3rd party IPs
• Understand clocking, reset and soc top level topology changes to make connectivity as per the topology across IPs
• Collaborate with architects, Verification engineers, and Physical design Engineers to understand the new features to be designed and integrated in SoC
• Understand SOC power domain requirements(power architecture) to write UPFs
• Perform quality checks: Lint, CDC, Low Power checks, Timing constraints, LEC for complex digital designs
• Identify areas for automation and create solutions to improve productivity and quality, continuously improve the automation process by exploring new tools and technologies

PREFERRED EXPERIENCE:

• Minimum 10 years of RTL design, Architecture, SOC implementation experience
• Proficient in Verilog and System Verilog with good understanding of RTL design flows and process
• Detailed understanding of SoC design flows
• Experience with version control system such as perforce
• Verilog lint(Spyglass) and simulation tools (VCS)
• Good understanding and hands-on experience in CDC, RDC, Timing constraints, LECand other design quality check concepts

• Knowledge on UPF, Low Power design, IP/SS/SOC Power Management(PM) techniques(Power Gating, Clock Gating) and Low Power static analysis checks will be added advantage

• Good with Scripting languages such as Python, Perl, Makefile, TCL and unix shell
• Automating workflows in a distributed compute environment
• Experience with embedded processors, data fabric architectures (NoC) and standard protocols such APB/AXI Stream and AXI MM
• Ability to work with multi-level functional teams across various geographies
• Strong problem-solving and analytical skills

ACADEMIC CREDENTIALS:

• B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.