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Full Time
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests JOB Requirements BE/BTECH/ME/METCH or Equivalent Degree EXP-5-8years Strong expertise in HVL(System Verilog, Specman e) with UVM/OVM/eRM methodology Experience. Experience in TB development including assertions development/closure, constraint randomization, functional and code coverages, testcase development, formal verification Experiences in test-bench development, Strong RTL and GLS (w/ or w/o SDF) simulation debug skills, Familiarization with IP or sub-system verification etc. 6-8yrs of industry experiences in DV w/ background in Ethernet/PCIe/Phy verification is preferred. We re doing work that matters. Help us solve what others can t.
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