IP Verification Lead

Lead the CDFX DV team at AMD Bangalore Office to perform the Debug IP verification, which includes:

• IP level test plan creation and development, conducting and participating in test plan reviews
• developing scalable verification components, random-constrained stimulus, and debugging regression failures
• Code reviews and DV coverage analysis
• Provide technical guidance and innovative ideas to improve quality, processes, and productivity

Manage DV execution:

• project planning, IP delivery timelines, deliverables and quality checks
• track project progress and ensure projects stay on track for timely completion
• resource planning, critical path analysis, risks identification and mitigation plan
• Technical support to SOC teams (internal customers) on Debug IP deliverables and tape out readiness signoff

• Collaborate with cross-functional leaders to drive AMDs success
• Strategic team development plan creation
• Team performance review and management
• Guide and develop people at several different levels of experience to encourage career growth
• Talent recruiting.
• Occasional short-term international travel upon per business need

• Experience leading verification teams on complex CPU/ASIC projects from inception to tape-out
• Solid understanding of functional design verification, including but not limited to test bench architecture, coverage, random constrained testing, and debug.
• Excellent organizational and project management skills

• Proven experience managing and leading engineering teams

• Strong communications skills. Able to summarize complex problems for executives as we'll as drill down to details with architects and engineers
• Strong analytic and problem-solving skills including the ability to analyze current behavior, identify potential areas for improvement and design of experiments
• Must be a self-starter and self-motivated

• BTECH/BE/BS, MTECH/ME/MS, or PhD degree in Electrical or Computer engineering. Advance degree preferred.