Hiring Design Verification Engineers For Bangalore Location @Eximietas

Hiring Design Verification Engineers for Bangalore location.

Exp:

Company: Eximietas

Design Job Area:

Eximietas:

Eximietas Design is a leading technology consulting and solutions development firm specializing in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants like Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun. With a commitment to innovation and excellence, we deliver cutting edge solutions that empower businesses to thrive in the ever-evolving digital landscape.

Minimum Qualifications:

• 5+ years of Design verification experience.
• Strong understanding of design concepts and ASIC flow
• Prior work experience on IP, Subsystem and Soc verification.
• Strong SV/UVM coding skills.
• Strong understanding of RAL
• Hands-on experience on third party VIP Integration.
• Strong solving , analytical and debugging skills.
• Strong understanding of AMBA protocols like generic AXI, APB, AHB
• Hands on verification experience in Low speed peripherals like, I2C, SPI, QSPI, DMA, Interrupt controller, GPIO, UART
• Hands on verification experience in any of the high-speed protocol like PCIE, CXL, Ethernet or USB
• Hands on experience in any of the memory protocols like DDR, LPDDR or HBM
• Hand on experience with verification tools such as VCS, Xcelium, Waveform analyzer and third-party VIP integration.
• Hands on experience with revision control flow like Git, SVN, Perforce
• Hands on experience withGLS and Power aware simulation (UPF)
• Experience in a team lead role, including guiding and mentoring team members, and ensuring effective collaboration and communication within the team. As a Senior verification engineer candidate will be responsible to work at IP, Subsystem or SoC verification related tasks.

Responsibilities:

• Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC.
• Understand design specifications and implementation to define the verification strategy.
• Create testbench micro-architecture, test plan, and coverage plan documents.
• Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness.
• Implement SystemVerilog assertions and functional coverage.
• Analyze code coverage and address missing scenarios to meet coverage goals.
• Work with other verification team members to develop, execute, and analyze verification test cases and sequences, providing relevant solutions to issues.
• Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines.
• Coordinate with customer leads, ensuring all deliverables and timelines are met.
• Serve as the project's point of contact, responsible for verification signoff.