Verification Specialist

As a Senior Formal Verification Engineer specializing in CPUs, you will be responsible for the property-based formal verification of the CPU core, pipeline stages, and subcomponents with exhaustive proof goals. Your role will involve leading formal planning and methodology for control logic, pipelines, and memory subsystems. You will define safety and liveness properties, model check for corner case behavior, and guide designers in writing formal-friendly RTL and assertions. Additionally, you will analyze convergence issues, coverage gaps, and create abstraction models, while integrating formal sign-off into project milestones. To excel in this role, you should have a minimum of 8 years of formal verification experience with CPUs or processors. Proficiency in tools such as JasperGold, VC Formal, OneSpin, or equivalent is required. Expertise in SVA/PSL, abstraction modeling, and formal coverage closure is essential. A strong background in computer architecture, particularly in pipeline, MMU, and interrupt logic, will be beneficial. You should possess excellent problem-solving skills, convergence debugging abilities, and strong documentation skills. If you meet these requirements and are interested in this opportunity, please submit your updated CV to janagaradha.n@acldigital.com.,