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ARM Embedded Technologies
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Staff / Senior Verification Engineer

Staff / Senior Verification Engineer

ARM Embedded Technologies

4 - 8 years

32 - 40 Lacs

Bengaluru

Posted:3 days ago| Platform:

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Skills Required

Unix C++ Linux Assembly language FPGA SOC Ethernet Perl Test cases Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

As a verification engineer with a knowledge of subsystems and SoCs, you will make valuable contributions to a team tasked with verifying the functional correctness of SoC.
Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy.
Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules.
Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level.
Will collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development.
Senior engineers are also encouraged to support junior members.
Ability to work under time-scale pressure and meet bold targets without compromising on quality

Required Skills and Experience :

4+/8+ years of proven experience in working on SoC verification environments.
Knowledge of assembly language (preferably ARM), C/C++ and/or hardware verification languages eg (SystemVerilog), shell programming/scripting (eg Tcl, Perl, Python etc)
Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support.
Understanding of the fundamentals of Arm system architectures
Good knowledge and verification experience in Arm A class CPU Processors and Coherent interconnects.
Hands-on with Coresight, System MMU, and Interrupt Controllers.
Experienced in one or many of these technologies/ protocols - PCIe, CXL, , Ethernet, Coherent Interconnects, RAS, Telemetry
Exposure to chiplet architecture and Die to Die protocols - UCIe, MAX3
Exposure to various front-end verification tools - Questa, VCS, Jasper Gold, Verdi
Experience in Coverage - Functional, Toggle, Code - closure at Subsystem and SoC level

Nice To Have Skills and Experience :

Possess knowledge of object-oriented programming concepts
Experience in multi-chiplet/Infra SoC design verification
Strong understanding of CPU, Interconnect, Chiplet Architecture / micro-architectures
Familiarity of Unix / Linux working environment

In Return:

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

Partner and customer focus
Collaboration and communication
Creativity and innovation
Team and personal development
Impact and influence
Deliver on your promises

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