As part of the Enterprise Security team, the Security Technology Operations (STO) Manager will help secure Arm s digital infrastructure. This includes managing and optimizing security technologies, implementing Zero Trust and network segmentation, and enhancing threat detection and response. The role requires strong cloud and network security knowledge, hands-on experience with security tools, and the ability to lead strategic initiatives while coordinating with partners, vendors, and internal teams. Responsibilities Implement network segmentation and Zero Trust to reduce attack surfaces, enforce least-privilege access, and isolate systems across enterprise and cloud environments. Lead the deployment, optimization, and upkeep of tools like EDR, AV, DLP, VPN, and firewalls to improve Arm s security posture. Promote Zero Trust principles identity-based access control, continuous verification, micro-segmentation, and clear trust boundaries to limit lateral movement and protect key assets. Collaborate with architects and infrastructure teams to define segmentation policies that align with Arm s threat model. Drive enhancements to security technologies, ensuring compliance with standards like NIST, CIS, and ISO 27001. Partner with IT and security teams to roll out new technologies and extend Zero Trust and segmentation across environments. Mentor analysts and engineers, promoting a culture of proactive defense and secure-by-design practices. Required Skills and Experience Demonstrated ability in security operations, infrastructure security, or network security roles. Strong expertise in network security technologies, including VPN, firewalls, IDS/IPS, Zero Trust Network Access (ZTNA) , and segmentation strategy and implementation . Technical proficiency in security solutions, including EDR, DLP, AV, email security, and cloud-native security controls. Experience implementing Zero Trust frameworks and network segmentation architectures in hybrid or multi-cloud environments. Understanding of Identity and Access Management (IAM) systems, including least-privilege access models, directory services, and policy-based access control. Familiarity with ITIL processes, security governance, and risk management, with experience tracking SLAs and compliance objectives. Nice to Have Skills & Certifications Security certifications such as CISSP, CISM, CCSP, AWS Certified Security, or Cisco Certified CyberOps Professional. Experience with scripting and automation for operational efficiency (e.g., Python, PowerShell, Terraform), as well as modern Infrastructure-as-Code and Policy-as-Code frameworks. Familiarity with Zero Trust security models, segmentation technologies (e.g., SDN, NGFWs, NAC) , and continuous risk assessment techniques.

Track record of operational support, Incident, Request, Change and Problem Management aligned with ITIL. Experience as a Team Lead or coordinator. SAP SuccessFactors modules such as Employee Central, Performance & Goals, Time Off and Compensation. SAP HCM processes and how they integrate with SuccessFactors. Good written and verbal communication skills, with the ability to translate complex technical concepts into easily understood solutions. Knowledge of core HR processes and standard practices within an international context. Creating reports and analytics within SAP SuccessFactors to track HR metrics and performance indicators. Security protocols and compliance requirements within SAP SuccessFactors, especially related to sensitive HR data. Data migration strategies and tools. MDF (Meta Data Framework) and business rules configuration. Analyzing and optimizing SAP SuccessFactors for performance. Resolving issues and debugging in SAP SuccessFactors, including issues related to configurations and integrations. Nice To Have Skills and Experience: Relevant SAP certifications, such as SAP Certified Application Associate - SAP SuccessFactors Employee Central or other module-specific certifications. Integration technologies such as SAP Cloud Platform Integration (CPI), APIs, and SAP SuccessFactors Compound Employee API. Integrating SAP SuccessFactors with other SAP solutions (like SAP ERP HCM) and external systems. Experienced working in a global, diverse and multicultural environment. Experienced with development practices such as Waterfall and Agile!

Role 1) Lead all aspects of Daily Service Desk Operations, ensure SLA & XLA compliance 2) Provide strong leadership and decision-making, handling user issues and identifying and driving shift-left, automation, continuous improvement, training opportunities 3) Sets goals, leads team performance, provides timely feedback, and develops a positive environment. Grade- 4 Accountabilities & Responsibilities- Lead Service Desk activities, ensure efficient incident handling, prioritization, and maintain process documentation. Track and implement consistency to Service Level and Experience Level Agreements. Act as the primary for critical issues, ensuring timely resolution of high-priority (P1/P2) issues and coordinating communication across teams. Demonstrate exemplary leadership, set clear expectations, delegates and promote an environment where accountability is embedded in daily operations. Identify automation opportunities, implement ITSM solutions and optimize workflows to enhance efficiency. Promote DEI, work-life balance, career mentorship to create a positive and supportive environment. Define measurable objectives, govern key performance indicators, as SLA, FCR, and CSAT scores and analyze trends to drive continuous improvement. Conduct regular one-on-one meetings to provide personalized feedback. Recognize achievements and contributions, celebrating team success. Address performance gaps, offering support and mentor. Build an open feedback environment where team members feel comfortable sharing ideas and concerns. Personal Attributes- Strong verbal and written skills for clear interactions with team members, collaborators, and end-users. Understands concerns, identifies technical issues quickly, and provides logical, data-driven resolutions. Anticipates challenges, handles workloads optimally, and ensures service quality. Supports team growth, work-life balance, and a positive work environment to prevent burnout. Demonstrates critical problem-solving, develops accountability, and encourages career development. Qualifications/Experience 5+ years on a Service Desk lead/coordinator role Expertise in ticket logging tools (e.g, ServiceNow, Jira). Strong fix knowledge in Windows, macOS, networking, cloud services (Microsoft 365, Azure, VPN, etc.). Experience in automation, self-service, and AI-powered support services (preferred). Strong expertise in IT Service Management (ITSM), Incident management, and SLA tracking and problem management. Nice To Have Skills and Experience: Experience with ServiceNow In depth knowledge of ITSM processes ITIL V3 or V4 foundation qualification We offer an exciting and interesting work in a global and diverse team. Arms growth trajectory will ensure career progression and the opportunity to have a significant impact on our success. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm Hybrid Working at Arm #LI-LK2 Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm

The Software (CE-SW) group is responsible for developing and improving the software ecosystem around Arms next generation of applications processors and IP. This means working with processors and other hardware technology not yet available to the public. You will join a team of Software Engineers who share a passion for leaving their mark on the future of computing. Job Overview: We are looking for highly capable engineers to work in the areas of Client/Server/Automotive, ready to use their knowledge and experience to ensure we continue to deliver software with the level of quality demanded by our customers. Collaborating with colleagues across the company you will focus on the approach to testing from a system validation perspective, as well as guiding the wider team through ongoing refinement of Agile processes. Are you looking for exciting new opportunities working with a successful QA team? If you are, we would love to hear from you! Responsibilities: Design and develop tests. Build, improve, and optimise our automated testing framework. Resolving issues reported by internal or external teams. Collaborate with development teams. Build automation solutions to streamline and minimize manual testing and development tasks. Familiar with test automation using CI/CD. Required Skills and Experience : Demonstrated 3 to 9 years of experience with Embedded Software Testing. Proven experience with software testing or software development. Good understanding of test methodologies, CI and test automation. Being efficient in C (C++) programming languages. Experience with Python programming and writing shell scripts. Good system level / computer architecture understanding. Using source control daily, efficiently and consistently, according to the project guidelines. Strong interpersonal skill. Excellent written and spoken English. Nice To Have Skills and Experience Experience of software profiling, instrumentation, debugging and optimization using Android /Windows / Linux testing tools. Basic understanding of the Linux kernel, system software and device drivers, and Android internals. Exposure to both static and dynamic code analysis tools. Understanding ARM architecture. Both pre-silicon and post-silicon validation expertise. Familiarity with Arm SystemReady SR Compliance Program

We are looking for a strategic and technically capable Cyber Defense Vulnerability Manager to lead vulnerability management initiatives within our Cyber Defense Operations (CDO) function. Responsible for the vulnerability remediation strategy, aligning with Arms global security standards and running the operational execution of the vulnerability management lifecycle. Responsibilities: Develop and lead strategic vulnerability management and Attack surface management initiatives across teams and geographies. Drive remediation accountability and ensure alignment with business risk profiles. Coordinate integration of threat intelligence and vulnerability scanning and Penetration Testing tools (eg, Tenable, Qualys) with ServiceNow workflows. Define Key Performance Indicators and metrics to govern remediation efficiency and SLA compliance. Collaborate with global teams, including Product Security, Red Team, Threat Intelligence, and Engineering. Provide leadership and mentoring to vulnerability analysts. Champion process automation and tooling enhancements. Drive operational transformation to mature existing processes, procedures and tooling. Lead the response efforts for major vulnerabilities in conjunction with security partners across the business. Act as a senior technical authority, as we'll as an escalation point for advanced response coordination. Scope and perform security reviews of platforms, web applications, mobile applications, and private and public cloud environments. Identify architectural deficiencies and implement vulnerability mitigation strategies to address. Required Skills and Experience: Demonstrable experience leading a vulnerability and Attack Surface management function in a global or enterprise-scale environment. Expertise in platforms like ServiceNow Vulnerability Management, Tenable, and third-party integrations. Sufficient understanding of web technologies to handle Web vulnerabilities. Solid understanding of security governance, frameworks (ISO 27001, NIST), and risk assessment practices. Demonstrated leadership in running multi-functional teams and stakeholder alignment. Ability to articulate security risk and remediation impact to executive audiences. Exposure to Networking, automation, scripting, and API integrations. Specialist technical knowledge spanning security and IT domains to enable a comprehensive response to vulnerabilities of the highest complexity, as we'll as cross organisational incident management. Detailed cyber security threat landscape knowledge and experience in bringing it to bear in response to a vulnerability. Nice To Have Skills and Experience: bachelors or masters in Cybersecurity, IT, or related field! Certifications such as CISSP, CISM, GIAC (GCCC, GCPM), or PMP. Understanding of Agile or DevSecOps practices

We are looking for a Cyber Defense Vulnerability Incident Response Senior Analyst to join our growing Cyber Defense Operations (CDO) Centre. This role provides an outstanding opportunity to lead the response to critical vulnerabilities while also contributing to security incident handling and response. The ideal candidate will have a solid background in vulnerability management, with additional expertise in incident response. This is a great opportunity for someone who wants to deepen their understanding of the overlap between vulnerability management (VM) and incident response (IR). We are at an exciting moment in our transformation! Arm has a bold vision to develop technology that invisibly enables opportunity for a globally connected population. To achieve this, Arm is growing rapidly and developing new products. With new business capabilities, Arm is encountering new security challenges that require a thoughtful, adaptable approach to strengthen its cyber defences and detect respond strategy. Responsibilities: Vulnerability Management (Main Focus) Lead operational vulnerability management activities across infrastructure, applications, cloud, and third-party platforms. Validate findings and prioritize remediation based on business risk and threat intelligence. Collaborate with global IT, Engineering, and Security teams to drive vulnerability remediation efforts. Optimize and manage ServiceNow Vulnerability Management workflows. Act as technical lead in remediation planning, providing guidance and support to stakeholders. Collaborate with Red Team, Threat Intelligence, and Product Security to identify high-risk vulnerabilities. Lead Major vulnerability Incident response efforts in accordance with the response plan and policies. Incident Response (Secondary Focus) Support team in incident triage and response efforts as needed, particularly those involving vulnerability exploitation. Assist in forensic investigations and log analysis for potential Security Incidents. Contribute to the development of playbooks for vulnerability incident response. Deliver training and mentorship to junior analysts. Required Skills Experience: Demonstrable experience in vulnerability management, including implementation of scanning tools like Tenable, Qualys, or similar platforms. Hands-on experience with ServiceNow Vulnerability Management workflows and integrations. Experience with remediation coordination, risk-based prioritization, and vulnerability lifecycle management. Exposure to incident handling, including forensic and malware analysis basics. Solid understanding of cloud and container security vulnerabilities (AWS, Azure, GCP). Sufficient understanding of web technologies to manage Web vulnerabilities. Ability to articulate risk and technical topics clearly to non-technical stakeholders. Scripting and automation skills (eg, Python, PowerShell) to streamline workflows. Deep understanding of the cyber threat landscape and emerging exploitation trends. Nice-to-Have Skills Certifications: BSc or higher in Cybersecurity, Computer Science, or related field! Professional certifications: GIAC (GCIH, GCFA, GPEN), OSCP, or CISSP. Exposure to penetration testing or Red Teaming methodologies. Understanding of ITIL processes and project management principles

We are looking for a creative and enthusiastic SoC Verification Lead to join the team. For this role you will have knowledge of verifying and testing sophisticated IP such as CPU/GPU/DSP processors with memory controllers and interconnect fabrics. You will ensure all these products work effectively with each other and the software to enable our partners to produce outstanding systems Responsibilities: As a SoC Verification Lead, with experience in leading verification teams of complex SoCs, you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Owning test plans, defining test methodologies, completing functional verification to the required quality levels and schedules Working with project management, design leads, engineering management on planning tasks, setting schedules, and quality checkpoints. SoC verification lead will also be responsible for the progress of verification activities Collaborate with leads from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development SoC Verification leads are also encouraged to mentor work package/SubSystem Verification leads Required Skills and Experience : Experience in leading verification teams of complex SoCs Experience in working with Project Management, Design, DFT, Implementation and other leads to come up with cohesive plan and schedule and to see it through the execution with correct sign off criteria for various milestones all the way through to TapeOut Worked on embedded C/C++ based SoC verification environments Knowledge of assembly language (preferably ARM), and hardware verification languages eg (SystemVerilog), shell programming/scripting (g. Tcl, Perl, Python etc) Experienced in GLS, DFT/DFD, Power Aware verification techniques Nice To Have Skills and Experience : Understanding of the fundamentals of Arm system architectures Experience in embedded operating systems, device drivers, microprocessor and embedded system hardware architectures. Experience verifying subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Development and deployment of large SoCs on emulation platforms

Support DFT on multiple types of projects in multiple design centers and apply innovative DFT techniques and affect the content of forthcoming CPU, GPU, ML and systems IP, SOCs some years before they appear in mainstream products. This candidate will contribute to DFT methodology by crafting flows, evaluating tool capabilities, helping other specialists on projects, detailing work through documentation, working with EDA vendors and propagating DFT methodologies. This position may also include meeting with customers for DFT training or to address DFT concerns. The candidate will be the first recruit in the DFT methodology group in Bangalore and will be responsible for leading the team in bangalore. Required Skills And Experience: This role is for a Principal DFT engineer with 15 years plus experience Technical leadership in DFT and ability to train/work with junior team members Experience with Perl, TCL, and/or python with ability to build and deploy generic DFT flows Proficient in Unix/Linux environments One or more core DFT skills are considered crucial for this position including some of the following Knowledge of at-speed testing, test insertion and test coverage assessment, test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification, SSN, designing and conducting experiments/tool evaluations. Experience with Siemens, Cadence and/or Synopsys DFT tools Qualified candidates will have a university degree (or equivalent) in Electronic Engineering, Computer Engineering, or other relevant technical subject area. Nice To Have Skills and Experience : Familiarity with IEEE standards such as 1500, 1149.1, 1687 and 1838 Familiarity with supporting silicon into volume production Knowledge of SSN and 3DIC Gained some exposure to digital ASIC frontend and backend design verification processes Hands-on Synthesis and Static Timing Analysis (STA) experience Familiarity with SOC architectures (Auto/Infrastructure/Client) and low power design practices would be an advantage Understanding of Functional Safety as it applies to DFT Working knowledge of Siemens MBIST and LBIST tools Exposure to simulation and formal verification tools Exposure to AI tools for execution Exposure Arm MBIST interface In Return You will be provided with the training and environment to succeed in this role. As we'll as a friendly and high-performance working environment, Arm offers a competitive benefits package including private medical insurance, sabbatical, supplementary pension, and we'llness benefits. We are offering a hybrid approach to home and office working to provide an adaptable experience for all employees and to promote a strong collaborative environment.

In the Solutions Engineering team, we'design and verify subsystems for various application segments, using the latest IP products from Arm and other vendors. We are looking for a creative and skilled colleague to join the team and help in the development process of these systems. Would you love a wider exposure across multiple IP products? Do you want an opportunity to work globally with various internal teams to deliver innovative systems? Join our team to help us shape the future products together! Responsibilities: As a hardware design engineer, you will be involved in the design process of subsystems for different markets by integrating the latest Arm IP products with the target to reach maximum efficiency in terms of power consumption, performance and area while ensuring correct functional behaviour. Your key responsibilities will include creating plans, defining the microarchitecture of the products, developing system level RTL code using System Verilog, running design checks, identifying and fixing bugs. Collaboration with functions such as architecture, verification, performance analysis, power analysis, implementation and various IP teams is essential as we work together on enabling our partners success. Required Skills and Experience : You graduated from a University or Engineering School, in Computer Science, Mathematics, Electronic / Electrical Engineering, or other related Solid understanding of SoC / ASIC (or FGPA) design methodologies and techniques Experience in RTL design using Verilog, System Verilog or VHDL Proficiency in both written and oral English Nice To Have Skills and Experience : Practical experience of working on microprocessor or complex system designs / SoCs Knowledge of basic scripting languages, eg Perl/TCL/Python Experience with Linux, shell scripts and Makefiles Knowledge of hardware verification techniques Familiar with embedded C, assembly and compilers

We are looking for an FPGA / Embedded-Systems Engineer to join Arm s Solution Engineering FPGA team on a permanent basis working at the forefront of Arm based embedded design. Join our dynamic FPGA Prototyping team, a key part of Arms Solutions Engineering group! We are a dedicated group of engineers providing a robust platform to build and test software on Arms brand-new subsystems and System-on-Chips (SoCs). Our mission is to accelerate the development process by offering a versatile and high-performance prototyping environment that enables seamless software integration and validation. These solutions target a wide range of market segments including mobile, server, IoT, automotive, and more. you'll be part of a project team working collaboratively to create an FPGA prototype for enablement and validation, working with verification and software engineers. you'll have responsibilities estimating and owning tasks, delivering against a plan and have a strong focus on engineering efficiency and quality. The role will involve building a detailed technical understanding of incoming Arm IP RTL designs and making the relevant design changes of this ASIC RTL. The role includes RTL creation and modification along with implementation constraints with high-quality, clear, accurate technical documentation. The successful candidate will be responsible for delivery of designs using techniques such as gated clock conversion and synthesizable models to build accurate representations of real-world systems. Responsibilities: Modifying RTL from large complex systems to target a dedicated FPGA prototyping platform Working collaboratively to deliver to a structured plan Mentoring of junior engineers. Liaise and collaborate with development teams, where required, to understand requirements and guide design decisions, ensuring these are implemented and where not possible/feasible providing mitigations and alternatives. Translating technical requirements into estimated and sized packages of work that are direct inputs in forming a resourced project plan. Taking ownership, for your tasks, tracking to the project plan, identifying, and handling risks and reporting status Required Skills and Experience : Solid FPGA Engineer with strong technical skills are important for this role! Design automation is essential when constructing efficient design and delivery flows, scripting skills in Python and TCL would be advantageous. Detailed knowledge of the FPGA design flow from RTL design, simulation, synthesis, place & route, constraints, and timing closure Strong RTL skills in Verilog / System Verilog or VHDL. Knowledge and expertise in debugging sophisticated designs in both simulation and hardware. Excellent communications skills, written and spoken English; ability to write coherent documentation. Nice To Have Skills and Experience : Demonstrate an understanding of ASIC/SoC prototyping in FPGA. A creative and structured approach to problem-solving. Working with the latest Xilinx UltraScale+ devices and tools. Knowledge/Experience of implementation of PCIe/CXL and DDR memory sub-systems. Programming languages such as: assembly language (ideally Arm assembler), higher-level (eg C), object-orientated (eg C++) Use of a UNIX environment and shell programming Scripting skills in Python, Tcl, etc Experience and knowledge of Arm IP and the AMBA standard

Our software group is responsible for supporting and bringing out the best in the hardware we design as well as working with our hardware engineers to make things even better. Software drives our hardware that is shipped around the world and used in a plethora of industries. Our people are passionate and care about producing the best software possible to power the world. Job Overview: We are looking for Senior Software Engineers to help lead our team responsible for Display Processor Driver Development. This involves work on Linux kernel drivers and relevant related projects, upstreaming and code review, interacting with hardware engineering, using hardware emulation (software, FPGA), Android, testing/QA and more. Key Responsibilities: Develop and maintain display drivers and related software. Collaborate with team members in related areas to ensure our DPUs function best. Conduct thorough testing and debugging to ensure reliability and performance. Engage in device emulation to simulate and troubleshoot real-world scenarios. Contribute to related open-source projects and work with their communities. Support partners as they rely on our products. Help Arm grow and be better and be part of a wider team Required Skills and Experience: A bachelors degree in computer science, electrical engineering, or related fields. Strong knowledge of display pipelines, computer graphics, rendering, image processing and related technologies. High proficiency in C programming language. Low-level programming experience and familiarity with hardware-software interactions. Proven contribution to display driver and related projects. Nice to Have Skills and Experience: Experience in testing and device emulation. Familiarity with open-source development and contributions. Working knowledge of SCMS tools like Git and related infrastructure such as GitHub, GitLab, Gerrit etc. Familiarity with ARM architecture. Experience with other programming languages such as C++, Rust or Python. E xpe rience with non-Linux kernel based operating systems and their driver models. Knowledge of compositor and rendering frameworks and libraries such as OpenGL, Vulkan etc.

Role Purpose: The Architecture and Technology Group (ATG) at ARM develops technologies and products for ARM s future architecture roadmap. In ATG, we are developing world leading Secure CPU and System architectures and associated technologies; enabling our eco system to build compelling products. The Architecture Verification (AV) team in ATG develops a product Architecture Compliance Kits (ACK) that are delivered to multiple internal and external CPU design teams to validate that ARM architecture CPU implementations are compliant to the ARM architecture. This position gives an opportunity to be a senior individual contributor in the methodology team developing software tools, automation, front end design build flows for the latest Architecture of the Arm Cores & System IPs. Engineers in the team are required to develop software, develop automation flows, methodologies, ARM architecture tools and apply software engineering skills to develop high quality and scalable architecture compliance KIT. These kits are used internally within the team and by our internal ARM and external partners. In this role, you will interact with teams across all architecture validation products, within ATG and our external partners to develop solutions for future ARM architecture developments and influence the product offering. Roles & Responsibilities: Strong individual contributor responsible for design and development of industry standard automation tools, build flows and methodologies for the Architecture validation team. Member of a team of highly skilled engineers with an ability to drive forward innovation in technical areas. Strong and continuous communication on deliveries and risks and ensure that all engineering commitments are delivered optimally! Drive efficiency improvements through adoption of right development flows and practices. Qualification and Experience : Good University degree in Computer Engineering/Computer Science or Electronics Engineering. Other candidates will be considered if they have meaningful experience. 6-9 Years of engineering experience primarily focussing on automation tools/flows development, design automation. Demonstrated experience in handling and owning methodology, automation or build flow projects. Strong interpersonal skills, excellent verbal and written communication skills Self-motivated and willing to take up additional responsibilities to contribute to the team s success. Strong analytical, problem solving and debugging skills. Desirable Skills: Experience in developing regression management and build flows. Expertise in Unix/Linux working environment and shell scripting (bash/tcsh). Strong background in scripting and automation for software development or semiconductors. Expertise in at least one programming language (C or C++) and one scripting language (Perl or Python). In Return: We promise you endless opportunities to experiment and go even further in hardware! From architecture definition to sophisticated core implementation to full custom physical IPs, here youll have our backing to push limits in vital areas. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm

Responsibilities As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing Subsystems & SoCs. You will work the Architecture team to gather the requirements and develop Micro-architecture specifications for one or more SOC Infrastructure areas such as Power management, Debug, Clocks, Resets. Your key responsibilities will include writing micro-architecture specifications, developing the RTL, fixing bugs and running various design checks. You will work with the verification team to review test plans, and help debug design issues. You will work with the Power and Performance analysis team to evaluate and improve Subsystem/SOC PPA. You will also contribute to developing and enhancing the design methodologies used by the team. You will guide and support other members of the team as needed to enable the successful completion of project activities. You will balance other opportunities such as working with Project Management on activities, plans, and schedules Required Skills and Experience: In addition to bringing your accomplishment of either Bachelors or Master s degree or equivalent experience in Computer Science or Electrical/Computer Engineering. Experience of 5+ years working in design of complex compute subsystems or SoCs, you will need: Expertise in creating Micro-architecture and Design specifications for the SoC Infrastructure areas such as Power management, Debug, Clocks and Resets. Strong knowledge of digital hardware design and Verilog HDL. A thorough understanding and experience of the current design techniques for complex SoC development. Experience leading and developing RTL for Subsystems or SoCs. Conversant with Lint, CDC and RDC flows. Good communication (written, verbal, presentations) skills. Experience with Perl, Python or other scripting language Desired Skills and Experience: Experience with ARM-based designs and/or ARM System Architectures Experience developing subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet Experience with SystemVerilog and verification methodologies UVM/OVM Experience leading small teams or projects Experience or knowledge in the following areas Synthesis and timing analysis Static design checks, including CDC, RDC, X-Propagation, Linting Power management techniques DFT and physical implementation #LI-KR2 Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Equal Opportunities at Arm

We are looking for an experienced SAP Ariba Systems Specialist with broad experience in solution design and build, implementation and supporting end to end Cloud based SAP Ariba solutions, in an S/4 Hana Procurement on-prem connected global system landscape. Responsibilities: Support the IT SAP Delivery Technical leads in providing SAP Ariba best-practice solutions for the ongoing demand for change within the Procurement Finance domains. This would include SAP Ariba solution analysis, design and writing documentation, as we'll as development and implementation skills across the of SAP. Be technically responsible for configuration within Ariba for the Procure to Payment process that runs through and out of Ariba from/into SAP S/4. Experience and knowledge in Ariba (including - SAP Ariba Sourcing, SAP Ariba Contract Management, SAP Ariba Supplier Management, SAP Ariba Purchase to Pay). Both upstream (Sourcing, Contract Management, SLP) and downstream (Buying and invoicing, commerce automation) processes. Required Skills and Experience: 4 - 8 years experience in delivering or supporting SAP Ariba / Procurement technologies. Deep technical experience with SAP Ariba catalogs including Sourcing, Contract Management, Supplier Management and P2P. Experience in the SAP P2P or MM processes related to S2P Procurement, Strategic sourcing, Catalogue content management and Workflows, buying and invoicing, from both a process and configuration perspective. Consistent track record of supporting and delivering change in the area of procurement with Ariba as the main tool. Solid understanding of other core SAP S/4HANA ERP Modules (FI/CO). Proficient in SAP S/4HANA Business Partner Concept. Good knowledge about the Integration technology and B2B interfaces. Knowledge of the software development lifecycle and/or DevOps and Agile methodologies Nice To Have Skills and Experience: Good understanding of SAP Security structure Experience with Jira and Confluence

Reporting to the Director of People Enablement India, this role will serve as the primary People Team interface for our engineering colleagues based in India, acting as a trusted advisor and the key point of contact to surface and address opportunities, issues or concerns experienced by our colleagues. You will collaborate with broader People Team peers, to ensure all activities such as any organization changes or realignments, onboarding and interpersonal situations are effectively handled. You will lead regional initiatives to strengthen and develop the team, provide valuable insights to drive improvements and align HR strategies with business needs. As the local face of the People Team, collaborate with business leaders, managers, the broader People Team and our business colleagues to deliver exceptional support while driving both operational and strategic priorities to enable business success. This role also involves occasional travel to other key locations to ensure consistent and flawless People services! Partner with team members to create exceptional experiences that cultivate connection, engagement and belonging. Focus on building important relationships to understand our people s needs and find opportunities to enhance their experience of working at Arm, while creating and nurturing an engaging office community that brings our culture and values to life. Key Responsibilities: Regional Business Partnering: Acting as the trusted regional people partner and consultant to the business leadership, managers and local team. Providing tailored HR solutions aligned with group, local and regional goals. Collaborating with our operational teams on various employee lifecycle processes. Aligning with Global People Business Partners and guiding them through challenging situations at the regional level. Providing pragmatic advice on the whole range of people matters beyond policies and rules, to help our team create an environment where everyone can make their best possible contribution to Arm s success Employee Relations and Conflict Resolution: Acting as a mediator in disputes and conflicts, facilitating resolution through effective communication and dialogue. Conducting investigations of complaints or grievances raised and recommending appropriate actions. Working closely with the Legal team and relevant customers while addressing complaints and grievances, adhering to local legal requirements. Ensuring right documentation of the cases for future references. Promoting fair treatment and advocating for diversity, equity, and inclusion initiatives. Performance Management Support: Providing guidance and support to managers on performance management processes, including performance reviews and disciplinary actions. Ensuring fairness and consistency in performance-related decisions. Leading sensitive situations such as restructuring, or other organizational changes sensitively and effectively. People Experience Drive exceptional experiences throughout the employment lifecycle, with particular focus on creating meaningful first impressions and ongoing engagement. Create and champion community-building initiatives that strengthen team connections and promote an inclusive, collaborative environment. Training and Development: Identifying learning needs, including the strengths and gaps in manager capability for the different functions in India. Partnering with Learning & Development to deliver impactful development programs and ensure that global or regional L&D initiatives meet the needs of colleagues in India Conducting periodic training sessions for managers and individuals on a range of relevant soft-skills topics Additional Responsibilities: Ensuring adherence to company policies and procedures across all People sub-functions. Building positive relationships with individuals and managers (and leadership at Global level as well) so that you are seen as a credible confidante and trusted adviser. Interpreting data to identify themes, trends, areas for improvement and proactive interventions. Staying updated on labor laws and regulations to ensure policies and practices align with legal requirements . Collaborating with cross People (Rewards, TA, Workplace, PH, PT etc), Finance and IT functions (both local and Global) for aligning on business requirements. Experience, Skills, and Knowledge: Senior HR Business partner with a proven background in HR consulting role for business leaders. Solid knowledge of India employment laws, country and state compliance. Solid knowledge of organizational change, and engagement. Exceptional interpersonal and communication skills, with the ability to influence and build strong relationships across different geographies and functions. Expertise in handling all kinds of employee relations cases. Strong analytical and problem-solving skills, with a data-driven approach to decision-making. Ability to lead and prioritize a dynamic workload in a multi-site environment. Experience in supporting engineering or technical teams in a matrix organization. Passionate about experience, engagement and inclusion, in driving a people-first culture

: Arm s Solutions group DFT team implements DFT for test-chips and hard-macros to prove Arms soft IP power, performance, area, and functionality within the context of a SoC using the latest DFT techniques and process technologies. We closely collaborate with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Principal DFT Engineer with proven ability in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master s degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field Nice To Have Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promise

Arm s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need the best engineers to join a team responsible for the development of sophisticated Subsystems and Solutions. Soon, we could be using your talents to develop the technologies that will enable the latest compute solutions in todays Enterprise, Auto and Client markets. Responsibilities: As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy. Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level. Work with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development. Senior engineers are also encouraged to support junior members. Required Skills and Experience : 8+ years of proven experience in working on IP/Subsystem/Soc Verification Experienced in Protocol on Flash Storage device Controller with unipro and MIPI PHY. Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, low Power for High-speed IO IPs. Good Skills in System Verilog, shell programming/scripting (eg Tcl, Perl, Python etc) Experienced in one or more of various verification methodologies UVM, formal and low power. Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support. Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools and Debuggers. Nice To Have Skills and Experience : Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture / micro-architectures! In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process: Partner and customer focus Collaboration and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

We are seeking highly skilled and motivated System-on-Chip (SoC) Emulation engineers to join our diverse team at Arm! Our team focuses on performance architecture and PnP analysis of Arm SoCs/SoPs (System-on-Package), System level infrastructure (SoC/SoP/Rackscale/Podscale) in pre- and post- silicon environments. Working closely with implementation teams and customers, we'develop best-in-class silicon platforms across markets such as servers, accelerators, client, infrastructure, IoT, and automotive. Responsibilities: Supporting multiple Emulation environments using the latest emulation techniques. Building early SoC platforms to facilitate performance/power analysis and debug. Able to handle/modify RTL and stitch together SoCs with standardized interfaces from scratch for bare-metal and validation OS based bringups. Collaboration with design teams to ensure the production of clean RTL code. Developing system level testbenches to implement performance and power benchmarks, simpoints and use cases in emulation platform. Integrate observation options to assemble and debug performance/power studies, correlate with pre-Si simulation/post-Si, lead larger implementation teams for emulation at later implementation phases and work with post-Si teams for analysis/tuning. Help drive innovation in model building and debugging methodologies. Collaborate with SoC Architecture team to create testplans covering all metrics for the product. Define flexible/reduced SoC configurations allowing reduction in simulation and emulation capacities, while providing accurate performance estimates. Collaborate with emulation vendors to define distributed systems to split huge SOC netlist between multiple emulation boxes. Required Skills and Experience : Experience (3-6 years) in SoC Performance verification and emulation environment bringup in the semiconductor industry. A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture and microarchitecture. Proficient in RTL (SystemVerilog, Verilog, VHDL), C/C++ for bare metal code, system validation using OS, test code development, strong scripting capabilities, particularly in Python, TCL, and shell scripting. Excellent communication, and interpersonal skills with ability to convey complicated solutions. Drive early and detailed performance/power analysis as an expert Emulation Architect at Arm, focusing on diverse silicon platforms Preferred experience: Experience in developing, building, and releasing large multi-billion gate hardware emulation models. In-depth knowledge of key hardware emulation vendor solutions for emulation and prototyping. Experience working with design and software teams on design verification tests, PPA workloads, and software workloads

As an Implementation Engineer in Arms Solutions Engineering group we like to think we are not just crafting sophisticated CPUs, GPUs and SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC, CPU and GPU chip design possible. At Arm, our work goes beyond multiple divisions where we'drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies. Responsibilities: Synthesis, Physical design and implementation of CPU and GPU cores, system interconnect and other ARM IP, SoC Analyze design timing, area and power to help improve the quality of ARM IP Develop and deploy new methodologies to improve implementation efficiency and results Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience : Bachelors or masters degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields. 8 to 12 Years years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification The ability to demonstrate that you can express new insights and communicate them effectively. Possess a high level of dedicated, initiative and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Proven programming and scripting skills eg. Tcl, Perl, R, Make, sh. Nice To Have Skills and Experience : Knowledge around Arm based CPUs and SoCs! Experience with low power design techniques (power gating, voltage/frequency scaling) Experience with Verilog RTL design. Experience with ATPG tools/and or production testing. In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding! Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises

As an Implementation Engineer in Arms Solutions Engineering group we like to think we are not just crafting sophisticated CPUs, GPUs and SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC, CPU and GPU chip design possible. Responsibilities: Synthesis, Physical design and implementation of CPU and GPU cores, system interconnect and other ARM IP, SoC Analyze design timing, area and power to help improve the quality of ARM IP Develop and deploy new methodologies to improve implementation efficiency and results Support and develop detailed implementation analysis and data-mining methodologies. Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP. Converting R&D concepts into real implementation solutions. Enable our partners to achieve the best possible quality of results. Required Skills and Experience : Bachelors or masters degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields. 8 to 12 Years years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification The ability to demonstrate that you can express new insights and communicate them effectively. Possess a high level of dedicated, initiative and problem-solving skills. Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2. Proven programming and scripting skills eg. Tcl, Perl, R, Make, sh. Nice To Have Skills and Experience : Knowledge around Arm based CPUs and SoCs! Experience with low power design techniques (power gating, voltage/frequency scaling) Experience with Verilog RTL design. Experience with ATPG tools/and or production testing. In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises