Sr Staff Engineer, Subsystem Closure & Floorplanning

10 - 15 years

20 - 25 Lacs

Posted:1 day ago| Platform: Naukri logo

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Job Type

Full Time

Job Description


Key Responsibilities

  • Execute subsystem/block-level closure efforts, focusing on timing closure, congestion resolution, power integrity, and physical implementation.
  • Collaborate closely with SoC-level teams to align on clocking and floorplanning strategies, leveraging strong understanding of SoC methodologies without direct ownership of SoC-level activities.
  • Collaborate cross-functionally with physical design, microarchitecture, and verification teams to resolve timing bottlenecks and optimize design margins
  • Mentor and guide physical design engineers within the subsystem teams, promoting best practices and methodology adoption.
  • Work cross-functionally with RTL designers, STA, power, verification, and backend teams to ensure smooth subsystem integration and closure.
  • Proactively identify and mitigate physical design risks, coordinating with SoC teams on potential impacts and solutions.

Qualifications

10+ years of experience in physical design focusing on subsystem-level closure for complex hierarchical SoCs at advanced nodes (7nm, 5nm, or below).
  • Strong expertise in timing closure, congestion management, and physical implementation at the block and subsystem level.
  • Solid understanding of SoC-level floorplanning and clocking methodologies, including clock domain partitioning, clock tree architecture, skew management, and clock gating; candidate is expected to collaborate effectively on SoC-level activities but not lead them.
  • Hands-on experience with industry-standard physical design and timing tools such as Synopsys ICC2, Cadence Innovus, PrimeTime, and signoff platforms.
  • Proficient in scripting and automation (Tcl, Python, Perl) to support closure flows and methodology development.
  • Deep knowledge of SoC design flows with proven ability to work closely with timing closure, power integrity, clocking, verification.
  • Solid understanding of low-power design techniques and power-aware physical implementation.

Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

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