Join AISemiCon as a SerDes Engineer and drive the design and development of high-speed SerDes circuits for data communication. Collaborate with cross-functional teams to implement efficient and reliable SerDes architectures. We are looking for passionate individuals with expertise in SerDes design who enjoy tackling complex challenges. Responsibilities include defining and implementing SerDes architectures and collaborating with various teams. The key responsibilities for this role include, but are not limited to:

Responsibilities

Design of High Speed SERDES products on leading-edge technology nodes (FinFET or higher nodes)
Design and development of SerDes IPs from specification (jitter budget, power budget, etc.)
Interface with various engineering teams within the product line including verification, layout, validation, test, systems to successfully execute new products
Participate in technical leadership of the team in the areas of circuit design and SERDES architectures.
Collaborate with cross-functional teams to define and architect SerDes solutions for high-speed data communication applications.
Design and develop high-speed SerDes circuits, including transmitters, receivers, equalizers, clock and data recovery (CDR), and analog front-end blocks.
Conduct transistor-level design, simulation, and layout of SerDes blocks.
Perform system-level verification and characterization of SerDes designs, including eye diagram analysis, jitter measurements, and link performance analysis.
Work closely with the system engineering team to ensure the SerDes meets the performance requirements and specifications of the target applications.
Drive innovation by exploring new SerDes techniques, circuit topologies, and emerging technologies.
Collaborate with customers and partners to understand their requirements and provide customized SerDes solutions.
Provide technical guidance and mentorship to junior members of the team.
Stay updated with the latest advancements in SerDes design, industry standards, and emerging technologies.

Qualifications

(MTech/MS/PhD) with a minimum of 5-7 years of experience with High Speed SerDes analog design, and system architectures Design experience in some of the following High Speed SERDES circuit blocks: Driver, Receivers ( CTLE-DFE/ ADC based receivers ) , Phase Interpolators.
Design of High Speed SERDES products on leading-edge technology nodes (FinFET or higher nodes)
Design and development of SerDes IPs from specification (jitter budget, power budget, etc.)
Low jitter PLL, High Speed Clock Distribution and modeling of digitally assisted analog adaptive loops
Familiarity with CDR architectures
Proficient at partitioning chip level requirements to specifications at the block level.
Strong written and verbal communication skills. Proactive, collaborative, and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. Strong team player.
Ability to function independently, be self-driven.

Applied Intelligence Semiconductors Private Limited (AISemiCon), an

Innovative Product Enterprise

is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry.

We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing.

Note:

This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs.

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