8 Rom Jobs

As a Lead Memory Design Engineer, you will be responsible for driving the architecture, design, and development of advanced memory IPs including SRAMs, ROMs, CAMs, and Register Files. Your role will involve leading a team of designers, collaborating with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes. Your key responsibilities will include defining architecture and design specifications for custom memory IPs, optimizing circuits such as memory cell arrays, sense amplifiers, and decoders, leading schematic-level design and simulation, collaborating with layout and verification teams, guiding post-layout activities, ensuring designs meet requirements for DFM and reliability, contributing to methodology development, supporting silicon bring-up, and providing technical leadership to junior engineers. To be successful in this role, you should have a B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Engineering, along with 8+ years of experience in full-custom memory design. You should possess a solid understanding of CMOS analog/digital circuit design principles, expertise in circuit simulation tools, experience with advanced nodes, and hands-on experience with variation analysis, IR drop, and EM checks. Strong analytical, communication, and leadership skills are essential for this position. Preferred qualifications include experience in memory compiler design, knowledge of low-power memory design techniques, experience with ECC and redundancy strategies, familiarity with ISO 26262/Safety compliance, and scripting knowledge for automation of design and simulation flows. If you are interested in this opportunity, please share your CV with Sharmila.b@acldigital.com.,

As a candidate for this position, you are expected to possess strong team leadership skills. Your role will involve comprehending project requirements and devising solutions accordingly. You will be responsible for delegating tasks to team members based on their individual technical competencies. A solid understanding of computer hardware components such as RAM, ROM, GPU, CPU, and other spare parts is essential for this role. Additionally, you should have in-depth knowledge of display I/O ports like VGA, HDMI, DP, and LVDS. Familiarity with data transfer protocols including I2C, HTTP, FTP, TCS, and USB is also required. Your responsibilities will include interpreting analogue and digital circuits, as well as being well-versed in PLC, VFD, HMI, and other industrial-grade switches and contactors. It will be your duty to research and propose solutions to both software and hardware-related issues. You will be expected to diagnose and resolve technical problems within circuits and systems, encompassing both physical components and network configurations. Furthermore, your role will involve designing, constructing, and testing new hardware, as well as recommending innovative hardware designs. Troubleshooting and resolving performance concerns will also be part of your responsibilities. Collaboration with vendors and hardware suppliers to implement new designs, supporting the hardware engineering team, and providing technical assistance for hardware issues are key aspects of this role. Adherence to industry-standard processes and procedures, as well as effective communication with other engineers, will be crucial. Overall, strong communication skills and the ability to collaborate effectively with team members and external partners are essential for success in this position.,

VLSI MBIST Engineer Experience: 4-8 Years Work location: Bangalore Job Description: We are seeking a skilled VLSI MBIST Engineer with approximately 4 years of experience, specialized in Memory Built-In Self-Test (MBIST) methodologies. The ideal candidate will have hands-on experience with Synopsys SMS tool and be proficient in MBIST pattern generation, fault simulation, and test development for various embedded memories in ASIC/SoC designs Key Responsibilities: Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) using Synopsys SMS tool. Create MBIST test infrastructure and collaborate with design teams to integrate MBIST macros into SoC designs. Perform fault modeling, fault simulation, and analysis to ensure high fault coverage and test quality. Validate MBIST patterns through simulation and silicon validation. Debug MBIST failures at both pre-silicon and post-silicon stages and provide root cause analysis. Work closely with RTL designers, physical design, and test teams to optimize MBIST architecture and test flows. Generate MBIST test reports, documentation, and provide design-for-test (DFT) reviews. Stay updated with latest MBIST methodologies and industry trends. Required Skills & Qualifications: Bachelors/Master’s degree in Electronics, Electrical Engineering, VLSI, or related field. Minimum 4 years of experience in MBIST engineering for ASIC/SoC designs. Strong knowledge of MBIST architectures, memory testing algorithms, and fault models. Hands-on experience with Synopsys SMS tool for MBIST pattern generation and validation. Familiarity with other DFT tools and methodologies is a plus. Proficient in scripting languages such as TCL, Perl, or Python for automation of MBIST flows. Good understanding of digital design and RTL coding (Verilog/SystemVerilog). Experience with simulation tools (ModelSim, VCS, etc.) and testbench development. Strong analytical and problem-solving skills with attention to detail. Good communication skills and ability to work in a team environment. Preferred Skills: Experience with other memory test tools or DFT tools like Tessent. Knowledge of ATPG and other DFT methodologies. Exposure to silicon bring-up and failure analysis. Familiarity with industry standards such as IEEE 1149.1 (JTAG), IEEE 1500. Role & responsibilities Preferred candidate profile

Job Description : We are looking for a VLSI MBIST Engineer with strong expertise in Memory Built-In Self-Test (MBIST) methodologies for ASIC/SoC designs. The ideal candidate should have hands-on experience using Synopsys SMS tool and a solid understanding of MBIST test development, pattern generation, and fault simulation. Key Responsibilities : Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) Use Synopsys SMS tool for MBIST pattern generation and validation Perform fault modeling, fault simulation, and fault coverage analysis Integrate MBIST macros into SoC designs in collaboration with RTL and physical design teams Debug MBIST issues in pre- and post-silicon stages Document MBIST flows, generate test reports, and provide support for DFT reviews Stay updated on industry trends and best practices in MBIST and memory testing Required Skills : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, VLSI, or related fields 4+ years of experience in MBIST implementation and validation Strong experience with Synopsys SMS tool Proficiency in scripting languages like TCL, Perl, or Python Good knowledge of Verilog/SystemVerilog and digital design fundamentals Familiarity with simulation tools like VCS, ModelSim Preferred Skills : Experience with DFT tools such as Tessent Knowledge of ATPG, JTAG (IEEE 1149.1), and IEEE 1500 standards Exposure to silicon bring-up and failure analysis

Role & responsibilities Please interested candidate send me cv :galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Position Name VLSI MBIST Engineer Position type: Permanent Total Exp: 4-8 years HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore South Job Description Must have: We are seeking a skilled VLSI MBIST Engineer with approximately 4 years of experience, specialized in Memory Built-In Self-Test (MBIST) methodologies. The ideal candidate will have hands-on experience with Synopsys SMS tool and be proficient in MBIST pattern generation, fault simulation, and test development for various embedded memories in ASIC/SoC designs. Requirements Key Responsibilities: Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) using Synopsys SMS tool. Create MBIST test infrastructure and collaborate with design teams to integrate MBIST macros into SoC designs. Perform fault modeling, fault simulation, and analysis to ensure high fault coverage and test quality. Validate MBIST patterns through simulation and silicon validation. Debug MBIST failures at both pre-silicon and post-silicon stages and provide root cause analysis. Work closely with RTL designers, physical design, and test teams to optimize MBIST architecture and test flows. Generate MBIST test reports, documentation, and provide design-for-test (DFT) reviews. Stay updated with latest MBIST methodologies and industry trends. Required Skills & Qualifications: Bachelors/Master’s degree in Electronics, Electrical Engineering, VLSI, or related field. Minimum 4 years of experience in MBIST engineering for ASIC/SoC designs. Strong knowledge of MBIST architectures, memory testing algorithms, and fault models. Hands-on experience with Synopsys SMS tool for MBIST pattern generation and validation. Familiarity with other DFT tools and methodologies is a plus. Proficient in scripting languages such as TCL, Perl, or Python for automation of MBIST flows. Good understanding of digital design and RTL coding (Verilog/SystemVerilog). Experience with simulation tools (ModelSim, VCS, etc.) and testbench development. Strong analytical and problem-solving skills with attention to detail. Good communication skills and ability to work in a team environment. Preferred Skills: Experience with other memory test tools or DFT tools like Tessent. Knowledge of ATPG and other DFT methodologies. Exposure to silicon bring-up and failure analysis. Familiarity with industry standards such as IEEE 1149.1 (JTAG), IEEE 1500. AMD (Don’t Share AMD Profiles) Preferred candidate profile

Role & responsibilities a) Collaborating with the Estimation/Engineering team to develop competitive and accurate proposals. b) Conducting feasibility studies for new bids and providing Rough Order of Magnitude (ROM) estimates using historical data and costing models. c) Coordinating with cross-functional teams (Engineering, Supply Chain, Procurement, Finance) to gather precise inputs for bids. d) Ensuring timely turnaround of quotes within established processes. Preparing and submitting bid documentation, including technical and commercial proposals, as per customer requirements.

Job Title: Desktop Support Engineer / IT Engineer Software Developer Location: Chennai & Bangalore Job Type: Full-time Experience: Fresher Qualification: Diploma / B.E / B.Tech / BCA / MCA / Any Graduate with IT knowledge Job Summary: We are hiring fresh and enthusiastic Desktop Support Engineers and IT Engineers passionate and motivated Software Developer Freshers to join our IT team. As a fresher, you will be trained and guided to support and maintain IT infrastructure, resolve hardware/software issues, and ensure smooth functioning of desktops, laptops, and basic network systems. Key Responsibilities: Install, configure, and maintain desktop/laptop systems and peripherals (printers, scanners, etc.). Provide first-level technical support to users for hardware, software, and basic network-related issues. Troubleshoot system and network problems, diagnosing and resolving issues promptly. Set up and manage user accounts, passwords, and permissions in Windows or Linux environments. Monitor and maintain computer systems and networks. Assist in upgrading and updating software and operating systems. Maintain asset inventory and documentation of IT equipment. Coordinate with senior IT engineers for complex issues. Ensure timely ticket resolution and maintain service logs. Write clean, efficient, and well-documented code in languages such as Java, Python, C#, JavaScript, etc. Participate in software design, coding, testing, debugging, and documentation. Assist in developing web, mobile, or desktop applications based on project needs. Collaborate with other developers, designers, and QA engineers. Fix bugs and improve application performance. Stay updated with emerging technologies and apply them in real-world scenarios. Participate in code reviews and follow best development practices. Understand and follow the SDLC (Software Development Life Cycle). Required Skills: Basic understanding of operating systems (Windows, Linux), MS Office, and system configurations. Familiar with networking concepts (LAN, IP addressing, routers, etc.). Strong communication and problem-solving skills. Ability to work in a team and support end-users. Willingness to learn and grow in the IT infrastructure domain. Strong knowledge of at least one programming language (Java, Python, C++, etc.) Understanding of object-oriented programming (OOP) concepts. Familiar with front-end technologies (HTML, CSS, JavaScript) and/or back-end frameworks. Knowledge of databases (MySQL, MongoDB, PostgreSQL, etc.). Basic understanding of version control systems (e.g., Git). Analytical and problem-solving mindset. Good communication and teamwork skills. Preferred Certifications (Optional): CompTIA A+ / N+ Microsoft Certified: Modern Desktop Administrator Associate CCNA (Basic Level) Benefits: On-the-job training Exposure to real-time IT infrastructure Career growth opportunities Certificate of Experience after successful completion (if applicable) Hands-on experience with live projects Mentorship and training programs Career growth path into Software Engineer roles Work with modern tools and agile methodology Optional Skills (Good to Have): Exposure to frameworks like React, Angular, Django, Node.js, or .NET. Experience with academic or personal software projects. Understanding of APIs and web services. Mahalakshmi 8056905397

Job Description: Details: Memory Design Engineer Job Requirement: We are looking to hire engineers with 2 to 10 years of experience in Memory design. Candidate needs to have comprehensive knowledge of circuit design with experience in developing CMOS memories such as SP SRAM, DP SRAM, Register File, and ROM. Should have understanding of process technologies and device behaviour and reliability issues Experience in o ptimizing performance, power, and area, reduce leakage of circuits, and drive characterization of individual memory instances and memory compilers. Understanding of SRAM PPA trade-offs is required Strong documentation skills and collaborative attitude are must haves Preferred Qualifications: Education - BE/ME/B.Tech/M.Tech Work location: Bangalore