AMS Verification Engineer - System Verilog Creeno Solutions Pvt Ltd

5.0 - 9.0 years

0 Lacs

karnataka

On-site

We are looking for 2 AMS (Analog Mixed Signal) verification engineers who possess more than 5 years of experience, have hands-on RNM modeling exposure, and are well-versed with Cadence AMS/DMS Flow. As an AMS Verification Engineer, you should have the following skills: - Strong RNM modeling skills. - Proficiency with Cadence AMS/DMS flow. - Experience with SystemVerilog and Verilog-AMS. - Knowledge of analog and mixed-signal design principles. - Experience with UVM (Universal Verification Methodology). - Ability to debug AMS modeling issues. - Experience with basic scripting/automation. - Good communication and documentation skills. Your responsibilities will include: - Developing and executing verification plans for AMS designs. - Creating and automating testbenches for AMS verification. - Building and maintaining SystemVerilog real number models. - Working with analog and digital design teams to ensure designs meet specifications. - Verifying AMS/DMS IP/chip functionality. If you meet the above requirements and are eager to contribute to a dynamic team, we would like to hear from you.,

Posted 1 day ago

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AMS Verification Engineer Creeno Solutions Pvt Ltd

5.0 - 9.0 years

0 Lacs

karnataka

On-site

As an AMS Verification Engineer, you will play a crucial role in ensuring the successful verification of Analog Mixed Signal designs. With a minimum of 5 years of experience in this field, you will be responsible for developing and executing verification plans, creating testbenches, and collaborating with design teams to guarantee that designs meet specifications. Your key skills will include strong RNM modeling proficiency, hands-on experience with Cadence AMS/DMS flow, familiarity with SystemVerilog and Verilog-AMS, and a solid understanding of analog and mixed-signal design principles. Additionally, you should have expertise in UVM, the ability to debug AMS modeling issues, and experience with basic scripting and automation. Your responsibilities will involve building and maintaining SystemVerilog real number models, verifying AMS/DMS IP/chip functionality, and ensuring effective communication and documentation throughout the verification process. By working closely with both analog and digital design teams, you will contribute to the successful verification of complex AMS designs. If you are a detail-oriented verification engineer with a passion for analog mixed-signal design and a strong background in AMS verification, this role offers an exciting opportunity to further your career in a dynamic and collaborative environment.,

Posted 3 days ago

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