Principal Engineer, VLSI Design Engineering

Western Digital

8 - 14 years

18 - 20 Lacs

Bengaluru

Posted:1 week ago| Platform:

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Skills Required

C++ Automation Coding SOC Debugging Agile Data structures Perl System verilog Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

We are seeking a highly skilled and experienced Principal Engineer in

Logic Verification

to join our innovative team in Bengaluru, India. As a Principal Engineer, you will play a crucial role in shaping our technical direction, leading complex projects, and mentoring junior engineers.

Able to lead and Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure.
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups Etc.
Python coding would be a plus
Knowledge on NAND concepts will be an advantage
Knowledge on Memory and Digital Design Concepts would be preferable
(SRAM/DRAM/ROM/Flash) Circuits/Logic
- Software Skills Required:
Proficiency in Computer Science fundamentals object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable
-
Functional Verification:
Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL & Gate Level Simulations
Proficiency in Verilog, System Verilog & Assertions
Exposure to Verification Fundamentals
Verification Automation using scripts like Python, Perl,shell,tcl/tk
Good debugging and problem solving skills.
Good communication skills and ability, desire to work as a team player
Able to mentor junior members and work with global cross functional team
Exposure to Analog verification will additional plus point
Digital design Concepts

- CMOS VLSI, Digital Circuits

- Knowledge on Memory (preferred)
(SRAM/DRAM/ROM/
Flash
) Circuits/Logic

- Preferred exposure

- NCSIM,
Xcellium
, IMC, IEV, Verdi, Jasper, VS Formal

- Cadence Schematic and layout environment

Qualifications

Bachelors or Masters degree in Computer Science or a related field
B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering
8 to 14 years of front end verification experience, with a proven tr

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