10 Photolithography Jobs

Home The University Job Opportunities and Working At Swansea Current Vacancies Molecular Semiconductor and MVD Technician Back to list Molecular Semiconductor and MVD Technician Related pages Current Vacancies Benefits & Rewards Equality Diversity & Inclusion Information for Applicants Information for New Staff Performance Enabling UK Visas & Immigration Apply Now Job Number SU01099 Contract Type Fixed Term Salary £29,959 to £33,482 per annum Working Pattern Full Time Faculty/Directorate Faculty of Science and Engineering Location Bay Campus, Swansea Closing Date 1 Aug 2025 Interview Date 18 Aug 2025 Informal Enquiries Dr Gareth Blayney g.j.blayney@swansea.ac.uk Dr Matthew Elwin m.p.elwin@swansea.ac.uk About The University Swansea University is a research-led university that has been making a difference since 1920. The University community thrives on exploration and discovery and offers the right balance of excellent teaching and research, matched by an enviable quality of life. Our stunning waterfront campuses and multicultural community make us a desirable workplace for colleagues from around the world. Our reward and benefits, and ways of working enable those who join us to have enriching careers, matched by an excellent work-life balance. About The Role This is an excellent opportunity for an individual with technical experience to obtain a position supporting the state-of-the-art semiconductor facilities at Swansea University’s new Centre for Integrative Semiconductor Materials (CISM). The position will play a key role in the running of the facility’s fabrication and characterisation laboratories. The primary function will be to maintain the cleanrooms and semiconductor equipment. The cleanroom has an impressive array of equipment allowing for advanced R&D into a wide range of electronic devices. Such equipment includes Dry and Oxygen Free Glovebox Cluster Tools for Processing Molecular Semiconductors Devices, Vapour Deposition (PECVD, PVD, MVD), Plasma Etching (RIE, ICP, APS, DRIE), Thermal Annealing (Tube, RTA) as well as a full Photolithography Suite (Spin/Spray Coaters, Mask Aligners, Nanoimprint). Whilst experience with semiconductor equipment (& specifically Glovebox and/or deposition techniques) is preferred, we also welcome candidates with technical experience in any high-tech setting involving advanced mechanical, electrical & process plant and equipment with an eagerness to learn. The Centre for Integrative Semiconductor Materials (CISM) provides vital research and innovation support for the CSConnected Cluster, a growing network of regional semiconductor industry partners. The Cluster partners also include Swansea and Cardiff Universities; the Welsh Government and the Cardiff Capital Region City Deal in a highly coordinated effort to deliver critical mass and a competitive advantage for semiconductor manufacturing in the region. Equality, Diversity & Inclusion The University is committed to supporting and promoting equality and diversity in all its practices and activities. We aim to establish an inclusive environment and welcome diverse applications from the following protected characteristics: age, disability, gender reassignment, marriage and civil partnership, pregnancy and maternity, race (including colour, nationality, ethnic and national origin), religion or belief, sex, sexual orientation. As an inclusive and welcoming workplace, we value people for their skills regardless of their background. Applications are welcome in Welsh and will not be treated less favourably than those submitted in English. Welsh Language Skills The Welsh language level required for this role is Level 1 - A little. The role holder will be able to pronounce Welsh words, answer the phone in Welsh (good morning/afternoon) and use very basic everyday words and phrases (thank you, please etc.). Level 1 can be reached by completing a 1 hour course. The University is a proud bilingual institution, our Welsh Language Strategy outlines our aspiration to promote the language and enable our staff to engage with the language as an additional workplace skill and as a gateway to new cultural and social opportunities. Applications are welcome in Welsh and will not be treated less favourably than those submitted in English. Welsh speakers have the right to an interview in Welsh. Applicants for a role where Welsh skills are essential are expected to present their application in Welsh and will be interviewed in Welsh, if shortlisted. Additional Information Applications for this role will take the format of a CV submission and cover letter. Apply Now Share Share; Molecular Semiconductor and MVD Technician Share this via Or copy the link Download Job description Download FSE-Candidate-Brochure-(EN).pdf Print this page Back to list Current Vacancies Benefits & Rewards Equality Diversity & Inclusion Information for Applicants Information for New Staff Performance Enabling UK Visas & Immigration

Exciting Opportunity for Physical Verification Engineers ! Elevate your career with Digicomm Semiconductor Private Limited and take the next leap in your professional journey. Join us for unparalleled growth and development. Responsibilities:- Design Rule Checking (DRC): Run DRC checks using industry-standard tools to identify violations of manufacturing design rules. Collaborate with layout designers to resolve DRC issues. Layout vs. Schematic (LVS) Verification: Perform LVS checks to ensure that the physical layout accurately matches the schematic and that there are no electrical connectivity discrepancies. Electrical Rule Checking (ERC): Verify that the layout adheres to electrical constraints and requirements, such as voltage and current limitations, ensuring that the IC functions as intended. Design for Manufacturing (DFM): Collaborate with design and manufacturing teams to optimize the layout for the semiconductor fabrication process. Address lithography and process variation concerns. Process Technology Calibration: Calibrate layout extraction tools and parameters to match the specific process technology used for fabrication. Resolution Enhancement Techniques (RET): Implement RET techniques to improve the printability of layout patterns during the photolithography process. Fill Insertion: Insert fill cells into the layout to improve planarity and reduce manufacturing-related issues, such as wafer warping and stress. Multi-Patterning and Advanced Nodes: Deal with challenges specific to advanced process nodes, including multi-patterning, coloring, and metal stack variations. Hotspot Analysis: Identify and address potential hotspot areas that may lead to manufacturing defects or yield issues. Post-Processing Simulation: Perform post-processing simulations to verify that the layout is compatible with the manufacturing process and does not introduce unwanted parasitics. Process Integration Checks: Collaborate with process integration teams to ensure the smooth integration of the design with the semiconductor fabrication process. Documentation: Maintain detailed documentation of verification processes, methodologies, and results. Qualifications:- BTECH/MTECH Experience:- The Engineers with 5+ years of Experience Location:- Bangalore/ Noida

Job Description Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND memory. We are looking for an energetic, ambitious, result-driven individual with strong work ethic and integrity to join us as the Lead Engineer for MaskTech Tapeout Operations/Production OPC team. As Production Optical Proximity Correction (OPC) Lead , you will be responsible for a team that is working in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Aside from running reticle data through correction, the team will also be expected to develop processes, automated verifications, and systems to support OPC processing. Working in Micron’s MaskTech department, OPC Engineers collaborate cross-functionally with Design, Process Integration, Mask Development, Scribe, Lithography, Tapeout Operations, Mask Shop and Fab. Your responsibilities will encompass interaction with a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working a non-standard work week (For Example, Friday through Tuesday) to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities. Responsibilities include, but are not limited to the following: Lead the Production OPC team in Micron India to deliver the team output with highest standards of quality and cycle time to meet team’s targets. Be a strong customer interface, mentor for team to build expert team, and contribute for deliverables Work towards methodologies and processes for improvement of development and qualification flows for OPC working with stakeholder teams. Will need to be able to work and understand different vendor flows and optimize. Drive OPC Jobdeck development and process flow execution Work independently with the Mask and Litho Development team to advocate the use of best-known methods (BKM) Coordinate with next level managers as a member of the steering committee for team’s operational strategies Apply project management skills to projects of the team and demonstrate the ability to exchange complex information with customers Evaluate optical proximity correction process issues and execute provided solutions and/or propose solutions. Understand OPC recipes and resolve the issues to ensure a quality production environment Develop OPC recipe codes to test new ideas and solutions Coordinate with Mask Litho engineers to develop new OPC flows and offer solutions Communicate clearly to management and stakeholders on highly complex information Document and report issues to related groups Troubleshooting with strong problem-solving skills to drive problems to resolution; identify and manage risks Facilitate effective meetings with key stakeholders Team Development and Performance Management: Foster a collaborative and inclusive team environment, encouraging open communication and continuous improvement. Create and implement training programs to support the professional growth of team members. Conduct regular performance reviews, set clear goals, and provide constructive feedback to team members. Leadership by Example: Demonstrate strong leadership qualities by setting a high standard of work ethic, professionalism, and integrity. Lead by example in adhering to company policies and promoting a culture of accountability and excellence Successful candidates for this position will have: Proven track record in working with people Linux operating system and licensing schemes familiarity is needed. Outstanding interpersonal and teamwork skills Excellent organizational, multi-tasking and management skills High degree of self-initiative and ability to work under tight timeframes and be able to react to changing, sometimes competing priorities in a timely fashion Programming skill (python, perl) is a plus Proficient with Microsoft Office Suite applications Layout viewer (i.e. K2View) experience; DF2 database layout experience is ideal Basic understanding of semiconductor manufacturing technologies (basic CMOS understanding is desirable) Basic understanding of lithography and photo masks Experience working with off-shore teams (US and Japan desirable) Strong verbal and written ability in English Education: Bachelor's or Master's in EE or related science discipline Experience: Minimum 8+ years experience in the semiconductor industry

Exciting Opportunity for Physical Verification Engineers ! Elevate your career with Digicomm Semiconductor Private Limited and take the next leap in your professional journey. Join us for unparalleled growth and development. Responsibilities:- Design Rule Checking (DRC): Run DRC checks using industry-standard tools to identify violations of manufacturing design rules. Collaborate with layout designers to resolve DRC issues. Layout vs. Schematic (LVS) Verification: Perform LVS checks to ensure that the physical layout accurately matches the schematic and that there are no electrical connectivity discrepancies. Electrical Rule Checking (ERC): Verify that the layout adheres to electrical constraints and requirements, such as voltage and current limitations, ensuring that the IC functions as intended. Design for Manufacturing (DFM): Collaborate with design and manufacturing teams to optimize the layout for the semiconductor fabrication process. Address lithography and process variation concerns. Process Technology Calibration: Calibrate layout extraction tools and parameters to match the specific process technology used for fabrication. Resolution Enhancement Techniques (RET): Implement RET techniques to improve the printability of layout patterns during the photolithography process. Fill Insertion: Insert fill cells into the layout to improve planarity and reduce manufacturing-related issues, such as wafer warping and stress. Multi-Patterning and Advanced Nodes: Deal with challenges specific to advanced process nodes, including multi-patterning, coloring, and metal stack variations. Hotspot Analysis: Identify and address potential hotspot areas that may lead to manufacturing defects or yield issues. Post-Processing Simulation: Perform post-processing simulations to verify that the layout is compatible with the manufacturing process and does not introduce unwanted parasitics. Process Integration Checks: Collaborate with process integration teams to ensure the smooth integration of the design with the semiconductor fabrication process. Documentation: Maintain detailed documentation of verification processes, methodologies, and results. Qualifications:- BTECH/MTECH Experience:- The Engineers with 3 to 5+ years of Experience Location:- Bangalore/ Noida

Company Description Lab on chip & Biosensors Group of Prof. Sandeep K. Jha at Centre for Biomedical Engineering, IT Delhi is one of the forefront research team in India which works on microfluidics, point-of-care biosensors and embedded systems for clinical applications. Details at www.sandeepjha.com Indian Institute of Technology (IIT) Delhi is a renowned institution recognized as a National Centre of Excellence for training, research, and development in science, engineering, and technology in India. Established in 1961, IIT Delhi has produced over 50,000 graduates, including more than 5500 with Ph.D. degrees in various disciplines. In 2018, IIT Delhi was granted the special status of Institution of Eminence (IoE) by the Govt. of India, allowing for greater autonomy in academic pursuits and collaborations. Role Description This is a full-time on-site role for a Microfabrication Engineer/Scientist specializing in Microfluidics development. The role involves daily tasks related to Photolithography or Direct Maskless lithography based glass- PDMS and SU-8 moulding type rapid Microfluidic prototyping. Since these skillsets are required from day 1 hence Only the experienced engineer /Scientist should apply. Applications of these devices are in Biomedical or Biotech. domains. The position is based at the IIT Delhi campus in Delhi, India. Qualifications Photolithographic techniques hands-on Experience in Microfluidics development Strong analytical and problem-solving skills Excellent communication and collaboration abilities M.Tech. degree in any Engineering with Microfabrication experience It shall be a six days work week and difficulty level of job as you can imagine commensurate to India's top academic Institute. Therefore matching above skill sets utmost to apply for this challenging and career rewarding job Pay scale shall be commensurate with experience level. On Successful Completion of project & when Candidate has displayed full potential he / she shall be encouraged to join Ph.D program at our Centre NOTE: CANDIDATES WHO HAVE COMPLETED Ph.D. DEGREE NEED NOT APPLY. CANDIDATES NOT HAVING GOOD HANDS-ON IN MICROFAB AND PHOTOLITHOGRAPHY NEED NOT APPLY. THEY WILL NOT BE CONSIDERED.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JR67683 Lead Engineer -Production OPC Job Description Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND memory. We are looking for an energetic, ambitious, result-driven individual with strong work ethic and integrity to join us as the Lead Engineer for MaskTech Tapeout Operations/Production OPC team. As Production Optical Proximity Correction (OPC) Lead , you will be responsible for a team that is working in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Aside from running reticle data through correction, the team will also be expected to develop processes, automated verifications, and systems to support OPC processing. Working in Micron’s MaskTech department, OPC Engineers collaborate cross-functionally with Design, Process Integration, Mask Development, Scribe, Lithography, Tapeout Operations, Mask Shop and Fab. Your responsibilities will encompass interaction with a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working a non-standard work week (For Example, Friday through Tuesday) to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities. Responsibilities Include, But Are Not Limited To The Following Lead the Production OPC team in Micron India to deliver the team output with highest standards of quality and cycle time to meet team’s targets. Be a strong customer interface, mentor for team to build expert team, and contribute for deliverables Work towards methodologies and processes for improvement of development and qualification flows for OPC working with stakeholder teams. Will need to be able to work and understand different vendor flows and optimize. Drive OPC Jobdeck development and process flow execution Work independently with the Mask and Litho Development team to advocate the use of best-known methods (BKM) Coordinate with next level managers as a member of the steering committee for team’s operational strategies Apply project management skills to projects of the team and demonstrate the ability to exchange complex information with customers Evaluate optical proximity correction process issues and execute provided solutions and/or propose solutions. Understand OPC recipes and resolve the issues to ensure a quality production environment Develop OPC recipe codes to test new ideas and solutions Coordinate with Mask Litho engineers to develop new OPC flows and offer solutions Communicate clearly to management and stakeholders on highly complex information Document and report issues to related groups Troubleshooting with strong problem-solving skills to drive problems to resolution; identify and manage risks Facilitate effective meetings with key stakeholders Team Development And Performance Management Foster a collaborative and inclusive team environment, encouraging open communication and continuous improvement. Create and implement training programs to support the professional growth of team members. Conduct regular performance reviews, set clear goals, and provide constructive feedback to team members. Leadership By Example Demonstrate strong leadership qualities by setting a high standard of work ethic, professionalism, and integrity. Lead by example in adhering to company policies and promoting a culture of accountability and excellence Successful Candidates For This Position Will Have Proven track record in working with people Linux operating system and licensing schemes familiarity is needed. Outstanding interpersonal and teamwork skills Excellent organizational, multi-tasking and management skills High degree of self-initiative and ability to work under tight timeframes and be able to react to changing, sometimes competing priorities in a timely fashion Programming skill (python, perl) is a plus Proficient with Microsoft Office Suite applications Layout viewer (i.e. K2View) experience; DF2 database layout experience is ideal Basic understanding of semiconductor manufacturing technologies (basic CMOS understanding is desirable) Basic understanding of lithography and photo masks Experience working with off-shore teams (US and Japan desirable) Strong verbal and written ability in English Education Bachelor's or Master's in EE or related science discipline Experience Minimum 8+ years experience in the semiconductor industry About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Seeking motivated CAD engineer • Supporting product and test chip PG’s across various technologies at TI • Supporting Scribe Layout (KERF) Development and Support across various process nodes Job description: • Conversion of product or technology development test chip layouts (LAFF, GDS) into fracture data • Preparing mask orders for shipment to vendors and managing the integrity and archival of data that is generated through this process. (Mask Data Preparation) • Development and Support of Tech/fab-specific scribe recipe development & maintenance to generate reticle floorplan databases • Drive design and development of new software tools, scripts, automation and interfaces for use in the PG/Tapeout process. • Collaborate with & guide various teams within Advanced Technology Development (process development, PDK), EDA and business units to ensure the necessary information is available to complete the PG process. • Ensure consistent application of methodologies and best practices Required Key Skills o Understanding of Layout and basics of fabrication process (FEOL/BEOL) o Knowledge of Mask data tools like Cadence Virtuoso, (Pegasus designrev / Mentor calibredrv o Maintain a high standard for cycle time and quality o Excellent scripting skills with atleast one of PERL, Python, TCL and Cadence skill with special focus on layout automation and geometry processing algorithms Nice to have: o Knowledge of Scribe, KERF, Reticle development o Understanding of ETEST structures, fab alignment structures and photolithography o Understanding of Physical Verification signoff (DRC) and runset flow o Mask Data Preparation tools like Cadence Mask Compose Educational Qualifications Bachelor's degree in Computer Science, Electrical/Electronic Engineering or related field with (2-6) years of Hardware Engineering or related work experience. Show more Show less

Purpose Tata Electronics is setting up a state-of-the-art Front-End Semiconductor Fab in Gujarat. We are seeking a Front-End Semiconductor Fab Manager to oversee semiconductor fabrication processes, including wafer processing, lithography, etching, deposition, and initial testing. The role involves managing the sourcing of materials and equipment from multiple locations, coordinating different fab modules, and addressing the challenges of setting up a semiconductor fab in India. Key Responsibility Liaise with business teams (sales, product development, marketing) to understand expected demand for semiconductor products and translate this into actionable production plans. Convert demand forecasts into detailed production schedules, managing challenges such as frequent product specification changes, market volatility, and long lead times for specialized materials and equipment sourced globally. Source and manage materials and spare parts from multiple vendors and locations globally, ensuring the availability of critical components, tools, and consumables required for fab operations, while managing the challenges of global sourcing and long lead times for these high-value materials. Address the complexities of sourcing specialized modules and critical spare parts from different countries, considering import/export constraints, logistical delays, and geopolitical risks. Coordinate the integration of multiple fab modules (e.g., photolithography, etching, deposition) from different suppliers, ensuring that all pieces of equipment are installed and calibrated on time to avoid production bottlenecks. Manage material flow across the fabrication process, ensuring the synchronization of equipment installation, calibration, and materials delivery to maintain a steady production pace. Develop and implement strategies to resolve bottlenecks in the production process, adapting production plans based on shifting market demands and unexpected supply chain disruptions such as raw material price fluctuations, lead time uncertainties, and material shortages. Ensure traceability throughout the fabrication process to maintain quality control and comply with regulatory standards, keeping full visibility of the process from raw material procurement to final testing. Manage inventory levels of high-precision semiconductor components, balancing between minimizing stockouts and avoiding overstocking, while adhering to best practices in inventory management for low-volume, high-cost materials. Communicate and align production plans with multiple stakeholders (vendors, procurement teams, equipment manufacturers, upper management) to ensure seamless coordination across the supply chain, from sourcing materials to final production. Additional Technical Requirements Strong experience in demand planning, production scheduling, and supply chain management in semiconductor manufacturing, particularly with challenges unique to front-end fabs. Proven ability to manage complex sourcing operations, overcoming challenges related to global sourcing, import/export constraints, and the procurement of specialized equipment and materials from various regions. Expertise in coordinating multiple fab modules, managing the integration of equipment from different suppliers and ensuring smooth installation and calibration, avoiding delays in production. Problem-solving skills to address supply chain disruptions, fluctuations in raw material prices, geopolitical risks, and logistical challenges that can impact semiconductor fabrication. In-depth understanding of inventory management in semiconductor manufacturing, especially managing high-value, low-volume components, and balancing between stockouts and overstocking. Ability to adapt production plans quickly in response to shifting market demands, material shortages, or unexpected equipment issues, ensuring that timelines and customer expectations are met. Strong communication skills to collaborate with internal teams (procurement, logistics, production) and external stakeholders (suppliers, equipment manufacturers) to ensure smooth integration of materials and equipment into the fab production process. Qualification Bachelor's degree in Semiconductor Manufacturing, Supply Chain Management, Industrial Engineering, or a related field. Experience 5+ years of experience in semiconductor manufacturing, with a specific focus on front-end fab operations and managing the challenges of equipment integration, material sourcing, and production scheduling. Proven expertise in managing supply chains, sourcing materials, and integrating fab modules within a semiconductor facility, including the ability to navigate the complexities of global sourcing and long lead times. Show more Show less

Sensor Development Engineer We are seeking a skilled Sensor Development Engineer with expertise in electrochemical techniques and materials science. The ideal candidate will have experience in sensor calibration, microfabrication, and data analysis. Responsibilities include developing and optimizing sensors, troubleshooting performance issues, and maintaining laboratory safety protocols. Key Requirements: Proficiency in electrochemical techniques (cyclic voltammetry, EIS) Knowledge of nanomaterials and conductive polymers Experience with microfabrication (screen printing, photolithography) Analytical chemistry expertise Proficiency in data acquisition using Origin, MATLAB, or LabVIEW Strong documentation and problem-solving skills Interested candidates should send their resume to the following Email Id within 7 Days khushal.bansode32084@paruluniversity.ac.in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Non-Volatile Engineering (NVE) Product Engineer working in the Mask Design & Tapeout Solutions team at Micron Technology, Inc., you are part of a team committed to quality, efficient NAND Memory Design through Custom Layout Design and Tapeout Management. Layout & Mask Designer In our team, we support New Design Development and own the Design Revisions through the Product Lifecycle. As an expert Mask Design Engineer, you will apply DFM, Process Input and Fab Feedback while engaging in multi-functional teams. You will be committed to driving yield improvements, building new processes and tools and mitigating reliability fails through innovative Layout Design techniques. As an owner of the Design Library, you will build, verify and manage all Design Revisions. You will also mentor and train new Engineers and assist partner teams with Design Debug. Tapeout Solutions Our team also owns and supports the Tapeout Process of all Production Reticles for NAND Memory Designs. As such, you will craft and maintain Design Edit Documentation, contribute to Design Reviews and own Reticle Compatibility definitions for Fabs. In this role, you will work with various Engineering and Manufacturing groups to prioritize projects and coordinate resources to ensure critical schedules are met. Responsibilities Include Layout Mask Design Design, Implement and Drive Layout edits needed for development, yield improvement, quality and process enablement. Run (DFM) Flows and collaborate with Design & Technology Development and to craft and implement solutions. Design Library Management & Tapeout Build, Validate and Handle New Design Libraries and Final archives. Accountable for Final EDA checks (LVS, DRC, LVL) Generate Final Data and manage post-processing tapeout flows and Validate final mask data Lead Tapeout order paperwork and Coordinate with Partner Teams to ensure alignment of needs, expectations, priorities and resources to hit schedules. Who We Are We strive for a team culture where you are empowered to develop your skills and have a meaningful impact! We believe in enabling opportunity for you to explore interests that contribute to the team and your career. We prioritize having fun and care about and support each other! Who You Are You believe in driving continuous improvement. You are an Engineer who is passionate about learning new things as well as creating and innovating. You are tenacious and motivated by new challenges. You enjoy mentoring and training others. Your Skills: 6-8+ Years Experience in Layout Design / Design Library Management & Tapeout Solutions Self-motivated and driven with a Growth Mindset Excellent problem solving and analytical skills Strong multitasking, organizational and project management skills Knowledge of Semiconductor Processing including Photolithography Strong understanding of Semiconductor Physics and VLSI techniques Strong Communication skills in written and spoken English Exposure to EDA Tools About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less