30 Odt Jobs

Category Engineering Hire Type Employee Job ID 10209 Remote Eligible No Date Posted 30/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and initiative-taking individual with a strong technical background inPhysicaldesign,physicalverificationand STA at IP/block/full chip level implementation/methodology. You thrive in collaborative environments andpossessa passion for creating innovative technology. Yourexpertiselies in working with advancedFinfet and GAA process challenges, and you have a proactive analytical approach with a keen eye for detail. Your dedication to delivering high-quality results is complemented by excellent communication and people skills, allowing you to effectively collaborate with both internal teams and external customers. Driven by a desire to innovate, you are eager to contribute to the success of ourcutting-edgetechnology products. WhatYou'llBe Doing: * Conceptualizing, designing, and productizingstate-of-the-artRTLto GDS implementationfor SLM monitors realized through ASIC design flow. * Designing on-chip Process, Voltage, Temperature, glitch, and Droop monitors for monitoring silicon biometrics. * DevelopingDigital BE activities includessynthesis, pre-layout STA,SDCconstraints development, floor planning, bump placement, power planning, MV design techniques,VCLP, UPFunderstanding,placement, CTS, routingand collaborating with thedifferent functionalteamsto achieveoptimaldesign solutions. *Post layout STA,timing& functionalECOdevelopment, timingsignoffmethodologyat higher frequency IPdesignsclosure. * Physical verification, DRC, LVS, PERC, ERC, Antenna, EMIR, Power signoff. * Creating new flows/methodologies and updating existing ones through collaboration with architects and circuit design engineering teams. * Pre-layout and post-layout timing closure and timing model characterizations across various design corners to ensure reliability and aging requirements for Automotive & consumer products. The Impact You Will Have: * Accelerating the integration of next-generation intelligent in-chip sensors and analytics into technology products. *Optimizingperformance, power, area, schedule, and yield of semiconductor lifecycle stages. * Enhancing the reliability and differentiation of products in the market with reduced risk. * Driving innovation inPhysical design, physical verification, STA and signoffdesign methodologies and tools. * Contributing to the development of industry-leading SLM monitors and silicon biometrics solutions. * Collaborating with cross-functional teams to ensure the successful deployment of advanced technologies. WhatYou'llNeed: * BS/B.Techor MS/M.Techdegree in Electrical Engineering with 5+ years of relevant industry experience. * StrongPhysical design, physical verification,pre&post layoutSTA andEMIR/Powersignoffexperience, includingSDCdevelopment, UPF/Mutlivoltagedesigndevelopment experience. * Experience in DRC, LVS, DFM cleaning andtimingclosureis mandatory. * Proficiency with Digital design tool from any EDA vendor, preferably from Synopsys tools like FC/VCLP/PT/PT-PX/ICV and Redhawk * Sound understanding of Physical design, Physical verification and STA and signoff concepts. * Experience with design methodologies like developing custom scripts and enhancing flows for better execution. Experience in scripting with TCL/PERL is required. Who You Are: * Proactive and detail-oriented with excellent problem-solving skills. * Adept at working independently and providingphysical design and signoffsolutions. * Excellent communicator and team player, capable of collaborating effectively with diverse teams. * Innovative thinker with a passion for technology and continuous improvement. * Committed to delivering high-quality results and achieving project goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Job Description Category Engineering Hire Type Employee Job ID 9978 Remote Eligible No Date Posted 19/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Analog Design Engineer with a strong passion for innovation and technology. With a solid background in analog design fundamentals and device physics, you excel at developing high-speed IO designs in advanced technologies. Your expertise in memory interface PHY IPs (DDR/HBM/UCIe) and your familiarity with JEDEC requirements position you as a valuable asset in our team. You are adept at collaborating with cross-functional teams, driving innovation, and ensuring the delivery of high-quality products. Your excellent written, verbal communication, and interpersonal skills enable you to effectively convey complex technical concepts and work seamlessly with colleagues across the globe. You thrive in a dynamic environment where you can leverage your skills to make a significant impact on the development of next-generation technologies. What You'll Be Doing: Leading the development of next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe). Driving innovation towards high-speed IO designs for memory interface PHY IP in CMOS/FinFET/GAA. Collaborating with cross-functional teams across the globe to ensure seamless project execution. Ensuring compliance with JEDEC requirements for memory interfaces and standards. Implementing and validating ESD and reliability concepts in design processes. Focusing on signal integrity and power integrity to enhance product performance. The Impact You Will Have: Accelerating the development and integration of high-speed memory interface PHY IPs. Enhancing the performance and reliability of our silicon IP portfolio. Driving innovation in high-speed IO designs, setting new industry benchmarks. Facilitating cross-functional collaboration to achieve project milestones efficiently. Contributing to the successful launch of differentiated products in the market. Ensuring that our products meet the highest quality standards and customer expectations. What You'll Need: BTech/MTech in Electrical Engineering or a related field. 8-15 years of experience in analog design and high-speed IO designs in advanced technologies. Proficiency in analog design fundamentals and device physics. Expertise in high-speed IO designs for memory interface PHY IPs (DDR/HBM/UCIe). Knowledge of JEDEC requirements for memory interfaces and standards. Understanding of ESD and reliability concepts. Familiarity with signal integrity and power integrity. Excellent written, verbal communication, and interpersonal skills. Who You Are: A proactive and innovative problem solver. A collaborative team player with exceptional communication skills. Detail-oriented and committed to delivering high-quality results. Able to work independently and manage multiple projects simultaneously. Adaptable to fast-paced and dynamic work environments. The Team You'll Be A Part Of: You will be part of a highly skilled and collaborative team of engineers focused on developing cutting-edge memory interface PHY IPs. Our team is dedicated to pushing the boundaries of technology and delivering innovative solutions that meet the evolving needs of our customers. We work closely with cross-functional teams across the globe, ensuring that our products are of the highest quality and performance. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10118 Remote Eligible No Date Posted 18/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking a highly skilled Senior DevOps Engineer who is proactive and knowledgeable with a passion for cutting-edge technologies for the central software engineering organization at Synopsys. As an ideal candidate, you are experienced in driving engineering efforts related to Continuous Integration and Delivery (CI/CD), automated testing, and deployment across all phases of the Software Development Life Cycle. You are adept at implementing frameworks and best practices for deploying automation via pipelines into various environments including on-premises, cloud (AWS, GCP, Azure), and containerized environments (Kubernetes, Docker Swarm). Your expertise lies in building platforms and frameworks that enable consistent, verifiable, and automated management of applications and infrastructure. You thrive in an Agile framework, identifying, creating, designing, and integrating processes for repeatable, automated software delivery. You are an advocate for innovation and automation, always seeking ways to enhance efficiency and effectiveness in CI/CD processes. Your strong communication skills enable you to effectively design cross-functional deployments and triage efforts, and you possess excellent analytical and problem-solving abilities. Additionally, you are skilled in mentoring and providing oversight to other DevOps team members, guiding them in implementing recommended solutions for process automation and best practices. What You'll Be Doing: Driving engineering efforts related to Continuous Integration and Delivery (CI/CD) and automated testing and deployment across all phases of the Software Development Life Cycle. Implementing frameworks and best practices for deploying automation via pipelines into on-premises, cloud environments (AWS, GCP, Azure), and containerized environments (Kubernetes, Docker Swarm). Building platforms and frameworks to create consistent, verifiable, and automatic management of applications and infrastructure in both on-premises and cloud infrastructure. Defining the development pipeline to ensure that software development flows match operational testing and deployment goals. Working within the Agile framework to identify, create, design, and integrate processes for repeatable, automated software delivery. Identifying and initiating the development of metrics and dashboards to monitor the adoption and maturity of DevOps practices. Advocating for innovation and automation, continuously seeking ways to improve CI/CD processes. Reviewing technical operations and providing mentoring and oversight to other DevOps team members in implementing recommended solutions for process automation and best practices. The Impact You Will Have: Enhancing the efficiency and effectiveness of our CI/CD pipelines to ensure high-quality software delivery. Enabling consistent and automated management of applications and infrastructure, improving reliability and scalability. Streamlining the software development lifecycle, ensuring alignment with operational testing and deployment goals. Driving the adoption and maturity of DevOps practices through the development of metrics and dashboards. Fostering a culture of innovation and automation within the engineering team. Mentoring and guiding other DevOps team members, enhancing their skills and knowledge. What You'll Need: Bachelor's or Master's degree in Engineering streams such as Computer Science, EEE, ECE, IT, or equivalent. At least 5 years of overall software development/deployment/infra experience. Cloud and other architect-level industry certifications (AWS, GCP, Azure, Security, etc.). 3-5 years of DevOps experience in modern tech stack to support products in the cloud. 2+ years of scripting/automation experience with Bash, Python, Perl, and/or other scripting languages. Strong CI/CD experience with code build, source control, testing, continuous integration, and delivery using standard DevOps CI/CD tools (Jenkins, Git). 3+ years of experience with containerization, source control (Docker/Docker Hub/Helm), and container orchestration (Kubernetes, Docker Swarm). Familiarity with programming languages (C/C++/Java). Familiarity with build tools (Make, CMake, Maven, Gradle) and dependency management (Conan). Experience developing Ansible Playbooks/Jenkins automation for infrastructure automation. Proficiency in multiple DevOps-related tools and technologies (JIRA, Confluence, GitHub/Azure, Jenkins, Ansible, Prometheus, Grafana, ELK). Who You Are: A proactive and knowledgeable engineer with a passion for cutting-edge technologies. An advocate for innovation and automation, always seeking ways to enhance efficiency and effectiveness in CI/CD processes. A strong communicator, able to effectively design cross-functional deployments and triage efforts. An excellent problem solver with strong analytical skills. A mentor and guide, capable of providing oversight and guidance to other DevOps team members. The Team You'll Be A Part Of: You will be part of a dynamic and innovative central software engineering organization at Synopsys. The team is focused on driving engineering efforts and automating processes to deliver high-quality EDA products. We work collaboratively within an Agile framework, continuously seeking ways to improve and innovate in the field of DevOps.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Business Analyst with over 10 years of experience in IT, including at least 7 years in software testing and quality-related roles. Your expertise in Tricentis Tosca automation, particularly with SAP, Salesforce, Oracle CPQ, APIs, and web applications, sets you apart. You have a deep technical knowledge and understanding of software testing best practices and are proficient in automating User Experience (UX) for web-based, API, and desktop applications, including Vision AI+. You excel in test data management, continuous integration/continuous deployment (CI/CD) pipelines, and integrating Tricentis Tosca with QTest. Your leadership experience in test automation, collaborative mindset, and excellent communication skills make you an invaluable asset to any team. You are customer-centric, always seeking to deliver unique solutions, and you thrive in agile environments. You are open to learning new skills and technologies to stay ahead in a dynamic industry. What You'll Be Doing: Designing and developing Test Automation Frameworks, approach, and methodologies for large enterprise projects. Creating, maintaining, and executing end-to-end test cases, test scripts, and test data. Defining test automation strategy, best practices, project structure, and review processes. Performing test infrastructure setup, upgrades, and migrations, including Tricentis Tosca. Managing users, projects, and test portfolios using Tosca Server and Tosca Commander. Integrating Tricentis Tosca with third-party tools. Conducting regular reviews and maintenance of the test portfolio to ensure adherence to best practices. Defining upgrade and maintenance approaches and performing necessary upgrades and migrations. Collaborating effectively with global cross-functional teams and stakeholders. Mentoring and guiding team members on test automation best practices. The Impact You Will Have: Enhancing the quality and reliability of software products through robust automation frameworks. Streamlining testing processes, leading to faster time-to-market for our solutions. Ensuring seamless integration of Tricentis Tosca with other tools and platforms. Driving continuous improvement in testing methodologies and practices. Providing leadership and mentorship to junior team members, fostering a culture of excellence. Contributing to the overall success and innovation of Synopsys technology offerings. What You'll Need: Minimum 7 years of experience in Tricentis Tosca automation with SAP, Salesforce, Oracle CPQ, APIs, Web applications, etc. Expertise in automating User Experience (UX) for Web-based, API, and Desktop applications, including Vision AI+. Proficient in Test Data management using Tricentis Data Services (TDS) and Tricentis Test Case Design (TCD). Experience in DEX Configuration & Execution. Ability to set up Continuous Integration/Continuous Deployment (CI/CD) pipelines with Tricentis Tosca. Expertise in QTest integration with Tosca Certifications TRICENTIS Certified SAP Testing Specialist TRICENTIS Certified Tosca Architect TRICENTIS Certified Automation Engineer TRICENTIS Certified QTest Specialist TRICENTIS Certified Test Design Specialist Who You Are: As a professional with a sophisticated understanding of software testing and automation, you possess excellent written and verbal communication skills, enabling you to effectively engage with diverse audiences. You have a customer-centric approach, always striving to deliver unique and impactful solutions. Your collaborative mindset allows you to work seamlessly within global cross-functional teams, and your openness to learning new skills and technologies ensures you remain at the forefront of industry advancements. You are a proactive leader, advocating for test-driven development (TDD) practices and driving necessary changes to achieve optimal results. The Team You'll Be A Part Of: You will join a dynamic team of forward-thinking professionals dedicated to advancing software testing and automation practices. The team focuses on integrating cutting-edge technologies and methodologies to enhance the quality and reliability of our software products. Collaboration, innovation, and continuous improvement are at the core of our team's values, and we strive to create an environment where every member can thrive and contribute to our collective success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Job description (VC Spyglass Lint Technology on VC Platform) Responsible for designing, developing, troubleshooting the core VC-Static engine, which is integral part of Lint Design and develop Lint standard and customized Lint checks using VC Platform technologies for analysis, synthesis and simulations. Will be working closely with other teams both locally and globally Design and development of state of the art EDA tools involving development in one or more of the following areas-: developing new and innovative algorithms in the area of electronic design automation. Skills Required 4 to 10 years of Software development experience Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Fluent in C++ with work experience in data-structures and algorithms. Excellent algorithm analysis skills and a good knowledge of data structures. Good knowledge of Tcl and Perl-based development on Unix. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Ability to develop new architecture Knowledge on GenAI is Value added Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success Quality focus one who believes in quality and wants to make a difference Experience of production code development on Unix/Linux platforms. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10151 Remote Eligible No Date Posted 21/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated professional with a strong technical background in analog and mixed-signal (A&MS) layout design. You thrive in collaborative environments, working closely with cross-functional teams to deliver high-quality layout designs. Your expertise in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler, allows you to create and optimize complex layouts efficiently. You are well-versed in physical verification processes and design rule checks, ensuring the integrity and manufacturability of your designs. Your problem-solving skills and systematic approach enable you to tackle challenges effectively. You are a lifelong learner, staying updated with the latest industry trends and advancements in A&MS layout design. Your excellent communication and interpersonal skills make you a valuable team player, contributing to the success of your projects and the organization as a whole. What You'll Be Doing: * Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. * Create and optimize layout designs using industry-standard EDA tools. * Perform physical verification and design rule checks to ensure design integrity and manufacturability. * Participate in design reviews and provide feedback to improve design quality. * Work closely with circuit designers to understand design specifications and constraints. * Contribute to the development and enhancement of layout design methodologies and best practices. * Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: * Ensure the delivery of high-quality layout designs for PVT Sensor IP development, integral to SOC subsystems. * Enhance the manufacturability and reliability of our silicon lifecycle monitoring solutions. * Drive innovation in layout design methodologies and best practices. * Collaborate effectively with circuit designers to meet design specifications and constraints. * Contribute to the overall success of the rapidly expanding PVT IP group. * Support Synopsys leadership in the market for process, voltage, temperature, current, and droop sensors. What You'll Need: * Bachelor's or master's degree in electrical engineering or a related field. * 5+ years of experience in A&MS layout design for integrated circuits. * Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. * Exceptional knowledge of layout design methods, techniques, and methodologies. * Experience with physical verification tools, such as Calibre or Assura. * Understanding of semiconductor process technologies and their impact on layout design. * Excellent problem-solving and systematic skills. * Ability to work effectively in a team-oriented environment. * Good communication and interpersonal skills. Who You Are: You are a dedicated and detail-oriented professional with a passion for A&MS layout design. Your ability to work collaboratively with cross-functional teams and your strong technical skills make you an asset to any project. You are proactive in staying updated with the latest industry trends and continuously seek to improve your knowledge and skills. Your excellent communication and interpersonal skills enable you to contribute effectively to team discussions and design reviews. The Team You'll Be A Part Of: You will be part of the rapidly expanding PVT IP group at Synopsys, a team dedicated to developing cutting-edge PVT Sensor IPs for SOC subsystems. This team is at the forefront of innovation, working on custom layout designs for Process, Voltage, Temperature, Current, and Droop sensors. You will collaborate with talented professionals who share your passion for excellence and innovation in layout design. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned VLSI professional with extensive experience in product engineering management. Your background includes at least eight years of hands-on experience in VLSI product engineering, with a deep understanding of analog and digital SOC design flows. You have a proven track record of working on various technology nodes and driving product innovation. Your expertise spans across RTL Development, RTL Verification, and RTL to GDS flow, making you a versatile asset to any team. You excel in customer-centric roles, adept at managing multiple projects and setting priorities effectively. Your communication skills, both written and verbal, are top-notch, and you have a knack for interfacing with different levels of an organization. You are well-versed in database management and maintaining data cleanliness across product portfolios. If you are looking for a new challenge and are passionate about driving product success in the VLSI domain, we would love to connect with you. What You'll Be Doing: Collaborating with cross-functional teams to drive product success. Developing and executing product engineering strategies. Serving as the technical interface between teams. Interacting with Sales and Pre-Sales teams. Buildingtimeplansand schedules for product development. Ensuring customer satisfaction by addressing and prioritizing issues effectively. The Impact You Will Have: Driving the success of our VLSI products through strategic engineering management. Enhancing product innovation by working on various technology nodes. Improving customer satisfaction through effective communication and issue resolution. Ensuring seamless technical interfacing between cross-functional teams. Contributing to the development of high-performance silicon chips and software content. Supporting the sales process by providing technical insights and solutions. What You'll Need: Minimum 5 years of experience in VLSI product engineering. Exposure to analog and digital SOC design flows and methodologies. Experience in RTL Development, RTL Verification, and RTL to GDS flow. Proven track record of working on different technology nodes. Ability to manage multiple projects and set priorities effectively. Who You Are: Customer-centric with excellent communication skills. Able to interface with different levels of an organization. Proficient in database management and maintaining data cleanliness. Experienced in buildingtimeplansand schedules. Knowledgeable about industry trends and emerging technologies in VLSI. The Team You'll BeAPart Of: You will be part of a dynamic and innovative project management team dedicated to driving product success in the VLSI domain. Our team collaborates closely with cross-functional teams, including Sales, Pre-Sales, and technical experts, to ensure the successful development and delivery of high-performance silicon chips and software content. We are passionate about continuous technological innovation and strive to create a collaborative and supportive work environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10209 Remote Eligible No Date Posted 30/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and initiative-taking individual with a strong technical background inPhysicaldesign,physicalverificationand STA at IP/block/full chip level implementation/methodology. You thrive in collaborative environments andpossessa passion for creating innovative technology. Yourexpertiselies in working with advancedFinfet and GAA process challenges, and you have a proactive analytical approach with a keen eye for detail. Your dedication to delivering high-quality results is complemented by excellent communication and people skills, allowing you to effectively collaborate with both internal teams and external customers. Driven by a desire to innovate, you are eager to contribute to the success of ourcutting-edgetechnology products. WhatYou'llBe Doing: * Conceptualizing, designing, and productizingstate-of-the-artRTLto GDS implementationfor SLM monitors realized through ASIC design flow. * Designing on-chip Process, Voltage, Temperature, glitch, and Droop monitors for monitoring silicon biometrics. * DevelopingDigital BE activities includessynthesis, pre-layout STA,SDCconstraints development, floor planning, bump placement, power planning, MV design techniques,VCLP, UPFunderstanding,placement, CTS, routingand collaborating with thedifferent functionalteamsto achieveoptimaldesign solutions. *Post layout STA,timing& functionalECOdevelopment, timingsignoffmethodologyat higher frequency IPdesignsclosure. * Physical verification, DRC, LVS, PERC, ERC, Antenna, EMIR, Power signoff. * Creating new flows/methodologies and updating existing ones through collaboration with architects and circuit design engineering teams. * Pre-layout and post-layout timing closure and timing model characterizations across various design corners to ensure reliability and aging requirements for Automotive & consumer products. The Impact You Will Have: * Accelerating the integration of next-generation intelligent in-chip sensors and analytics into technology products. *Optimizingperformance, power, area, schedule, and yield of semiconductor lifecycle stages. * Enhancing the reliability and differentiation of products in the market with reduced risk. * Driving innovation inPhysical design, physical verification, STA and signoffdesign methodologies and tools. * Contributing to the development of industry-leading SLM monitors and silicon biometrics solutions. * Collaborating with cross-functional teams to ensure the successful deployment of advanced technologies. WhatYou'llNeed: * BS/B.Techor MS/M.Techdegree in Electrical Engineering with 5+ years of relevant industry experience. * StrongPhysical design, physical verification,pre&post layoutSTA andEMIR/Powersignoffexperience, includingSDCdevelopment, UPF/Mutlivoltagedesigndevelopment experience. * Experience in DRC, LVS, DFM cleaning andtimingclosureis mandatory. * Proficiency with Digital design tool from any EDA vendor, preferably from Synopsys tools like FC/VCLP/PT/PT-PX/ICV and Redhawk * Sound understanding of Physical design, Physical verification and STA and signoff concepts. * Experience with design methodologies like developing custom scripts and enhancing flows for better execution. Experience in scripting with TCL/PERL is required. Who You Are: * Proactive and detail-oriented with excellent problem-solving skills. * Adept at working independently and providingphysical design and signoffsolutions. * Excellent communicator and team player, capable of collaborating effectively with diverse teams. * Innovative thinker with a passion for technology and continuous improvement. * Committed to delivering high-quality results and achieving project goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10209 Remote Eligible No Date Posted 30/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and initiative-taking individual with a strong technical background inPhysicaldesign,physicalverificationand STA at IP/block/full chip level implementation/methodology. You thrive in collaborative environments andpossessa passion for creating innovative technology. Yourexpertiselies in working with advancedFinfet and GAA process challenges, and you have a proactive analytical approach with a keen eye for detail. Your dedication to delivering high-quality results is complemented by excellent communication and people skills, allowing you to effectively collaborate with both internal teams and external customers. Driven by a desire to innovate, you are eager to contribute to the success of ourcutting-edgetechnology products. WhatYou'llBe Doing: * Conceptualizing, designing, and productizingstate-of-the-artRTLto GDS implementationfor SLM monitors realized through ASIC design flow. * Designing on-chip Process, Voltage, Temperature, glitch, and Droop monitors for monitoring silicon biometrics. * DevelopingDigital BE activities includessynthesis, pre-layout STA,SDCconstraints development, floor planning, bump placement, power planning, MV design techniques,VCLP, UPFunderstanding,placement, CTS, routingand collaborating with thedifferent functionalteamsto achieveoptimaldesign solutions. *Post layout STA,timing& functionalECOdevelopment, timingsignoffmethodologyat higher frequency IPdesignsclosure. * Physical verification, DRC, LVS, PERC, ERC, Antenna, EMIR, Power signoff. * Creating new flows/methodologies and updating existing ones through collaboration with architects and circuit design engineering teams. * Pre-layout and post-layout timing closure and timing model characterizations across various design corners to ensure reliability and aging requirements for Automotive & consumer products. The Impact You Will Have: * Accelerating the integration of next-generation intelligent in-chip sensors and analytics into technology products. *Optimizingperformance, power, area, schedule, and yield of semiconductor lifecycle stages. * Enhancing the reliability and differentiation of products in the market with reduced risk. * Driving innovation inPhysical design, physical verification, STA and signoffdesign methodologies and tools. * Contributing to the development of industry-leading SLM monitors and silicon biometrics solutions. * Collaborating with cross-functional teams to ensure the successful deployment of advanced technologies. WhatYou'llNeed: * BS/B.Techor MS/M.Techdegree in Electrical Engineering with 5+ years of relevant industry experience. * StrongPhysical design, physical verification,pre&post layoutSTA andEMIR/Powersignoffexperience, includingSDCdevelopment, UPF/Mutlivoltagedesigndevelopment experience. * Experience in DRC, LVS, DFM cleaning andtimingclosureis mandatory. * Proficiency with Digital design tool from any EDA vendor, preferably from Synopsys tools like FC/VCLP/PT/PT-PX/ICV and Redhawk * Sound understanding of Physical design, Physical verification and STA and signoff concepts. * Experience with design methodologies like developing custom scripts and enhancing flows for better execution. Experience in scripting with TCL/PERL is required. Who You Are: * Proactive and detail-oriented with excellent problem-solving skills. * Adept at working independently and providingphysical design and signoffsolutions. * Excellent communicator and team player, capable of collaborating effectively with diverse teams. * Innovative thinker with a passion for technology and continuous improvement. * Committed to delivering high-quality results and achieving project goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10335 Remote Eligible No Date Posted 26/03/2025 Alternate Job Titles: - Senior Digital Verification Engineer - Sr Staff ASIC Verification Engineer - Senior RTL Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and passionate ASIC Digital Verification Engineer with a deep understanding of RTL-based IP cores and complex protocols. You have over 12 years of experience in functional verification and are adept at making architectural decisions for test bench designs. You are proficient in SystemVerilog (SV) and Universal Verification Methodology (UVM), and you have a proven track record of implementing coverage-driven methodologies. You bring a wealth of knowledge in protocols such as DDR, PCIe, AMBA, and more. Your technical expertise is matched by your strong communication skills, ability to work independently, and your innovative problem-solving capabilities. Your experience may also include familiarity with functional safety standards such as ISO26262 and FMEDA. What You'll Be Doing: Making architectural decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Implementing a coverage-driven methodology. Leading technical aspects of verification projects. Collaborating with international teams of architects, designers, and verification engineers. The Impact You Will Have: Enhancing the robustness and reliability of IP cores used in critical applications. Driving innovation in verification methodologies and tools. Ensuring high-quality deliverables through rigorous verification processes. Improving productivity, performance, and throughput of verification solutions. Contributing to the success of Synopsys customers in industries such as AI, automotive, and server farms. Mentoring and guiding junior engineers in the verification domain. What You'll Need: Knowledge of protocols such as DDR, PCIe, AMBA (AXI, CHI), SD/eMMC, Ethernet, USB, MIPI. Hands-on experience with UVM/VMM/OVM, test planning, and coverage closure. Proficiency in SystemVerilog and UVM, object-oriented coding, and verification. Experience with scripting languages like C/C++, TCL, Perl, Python. Experience with functional safety standards such as ISO26262 and FMEDA (preferred). Who You Are: Independent and precise in your work. Innovative and proactive in problem-solving. Excellent communicator and team player. Detail-oriented with a strong analytical mindset. Eager to learn and grow within a technical role. The Team You'll Be A Part Of: You will join the Solutions Group at our Bangalore Design Center, India. This team is dedicated to developing functional verification solutions for IP cores used in various end-customer applications. You will work closely with architects, designers, and verification engineers across multiple international sites, fostering a collaborative and innovative environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and experienced Program Manager with a proven track record in the semiconductor industry. With 7-10 years of experience, you bring a wealth of knowledge in SoC design flow, IC manufacturing, process technology, and the signoff process. Your ability to communicate effectively at all levels of the organization, coupled with your exceptional interpersonal and teamwork skills, sets you apart. You thrive in a fast-paced environment, adept at prioritizing and managing multiple projects simultaneously while meeting deadlines. Your background in program management in IPs and experience with tools like JIRA make you an ideal candidate. You have a customer-centric approach, with prior experience in customer interfacing or support, and a knack for developing and maintaining key performance indicators to measure program effectiveness. What You'll Be Doing: Acting as the focal point of contact and managing internal communications relating to the program, including customer interactions. Coordinating with cross-functional teams spanning geographical and organizational boundaries to manage requirements and changes in the program. Driving day-to-day execution of key programs: directing schedules, identifying and escalating issues, driving problems to resolution, and managing risk. Effectively prioritizing and tracking multiple projects simultaneously using tools like JIRA. Collaborating with stakeholders to define project scope, objectives, and deliverables. Leading program and change management initiatives for audits and developing key performance indicators (KPIs) to measure effectiveness. The Impact You Will Have: Ensuring seamless internal and external communication for program success. Facilitating cross-functional collaboration to meet project goals and timelines. Driving the resolution of issues and managing risks to maintain project momentum. Enhancing program efficiency through effective prioritization and management of multiple projects. Contributing to the development of clear and comprehensive project requirements and specifications. Improving audit program effectiveness through the creation and maintenance of KPIs. What You'll Need: BE or equivalent with 7-10 years of experience in the semiconductor industry. Background in program management in IPs. Knowledge of SoC design flow, IC manufacturing, process technology, and signoff process. Experience communicating at different levels of the organization. Proficiency in using tools like JIRA. Who You Are: You are a proactive and organized individual with a strong ability to lead and align cross-functional teams. Your exceptional verbal and written communication skills enable you to effectively convey complex information. You are detail-oriented and excel in a collaborative environment, consistently delivering high-quality results. Your customer-centric approach and ability to manage multiple projects simultaneously make you a valuable asset to our team. The Team You'll Be A Part Of: You will join a dedicated team focused on driving program management excellence within the semiconductor industry. Our team collaborates closely with various departments and stakeholders to ensure the successful execution of projects and programs. We are committed to fostering a supportive and innovative work environment where every team member can thrive and contribute to our collective success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10560 Remote Eligible No Date Posted 08/04/2025 Analog Design, Sr Engineer-10560 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What You'll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IO's. - Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What You'll Need: * Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design. * Experience Required: 1 - 3 yrs Who You Are: * Creative and results-oriented, capable of managing multiple tasks concurrently. * Strong verbal and written communication skills in English. * Ability to work collaboratively across teams to deliver solutions to customers. * Strong analytical, reasoning, and problem-solving skills. * Willingness to travel occasionally to support customer engagements. The Team You'll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9020 Remote Eligible No Date Posted 25/03/2025 ASIC Verification- Principal Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned verification engineer with a passion for cutting-edge technology. With a BSEE in Electrical Engineering and over 10 years of relevant experience, or an MSEE with over 8 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics. You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools. Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB. Your experience with Scatter Gather DMA and exposure to serial protocols like SPI/I2C/I2S/UART are highly valued. Additionally, you are proficient in scripting languages such as Perl, TCL, or Python, and have knowledge of HDLs like Verilog. Your exposure to VC Formal and IP design and verification processes, including VIP development, is an added advantage. You exhibit excellent written and oral communication skills, demonstrate strong analytical and problem-solving abilities, and show high levels of initiative. This role is not open for college fresh grads and requires prior industry experience. What You'll Be Doing: * Specify, design/architect, and implement state-of-the-art verification environments for the Synopsys family of synthesizable cores. * Perform verification tasks for IP cores, ensuring they meet the highest standards of quality. * Collaborate closely with RTL designers and be part of a global team of expert verification engineers. * Work on next-generation AMBA protocols and serial protocols for commercial, enterprise, and automotive applications. * Engage in test planning, test environment coding at both unit and system levels, test case coding and debugging, and FC coding and analysis. * Manage regression and meet quality metric goals. The Impact You Will Have: * Ensure the reliability and performance of Synopsys IP cores, contributing to the success of our cutting-edge products. * Drive innovations in verification methodologies, enhancing the efficiency and effectiveness of our processes. * Collaborate with a global team to deliver high-quality solutions that meet the needs of our customers. * Support the development of next-generation technologies that will shape the future of various industries. * Contribute to the continuous improvement of verification practices and standards within the organization. * Play a key role in the successful delivery of IP cores for commercial, enterprise, and automotive applications. What You'll Need: * BSEE in Electrical Engineering with 10+ years of relevant experience or MSEE with 8+ years of relevant experience. * Experience in developing System Verilog based test environments and implementing test plans. * Strong HVL coding skills and hands-on experience with industry-standard simulators and waveform-based debugging tools. * Familiarity with verification methodologies such as VMM, OVM, or UVM. * Knowledge of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB. Who You Are: * Excellent written and oral communication skills. * Strong analytical and problem-solving abilities. * High levels of initiative and the ability to work independently. * Collaborative mindset with the ability to work effectively in a global team environment. * Detail-oriented with a focus on quality and continuous improvement. The Team You'll Be A Part Of: You will be part of the R&D in Solutions Group at our Bangalore Design Center, India. This dynamic team focuses on IP verification and works on technically challenging IP cores using the latest verification methodologies and flows. You will collaborate with RTL designers and verification engineers across multiple sites, contributing to the development of next-generation technologies. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9622 Remote Eligible No Date Posted 25/03/2025 Formal Verification Principal Engineer: We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced Formal Verification Specialist with a strong background in RTL design and a passion for ensuring the correctness and reliability of digital designs. You have a minimum of 10+ years of industry experience, with at least the last 5 years focused on formal techniques for verification. You possess deep knowledge of architectures of designs and digital logic, synthesis flow, static timing flows, and formal checking. Your hands-on experience with HDLs such as Verilog or System Verilog and understanding of temporal logic assertions make you an ideal candidate for this role. You have worked on complex verification projects and have experience with formal verification tools like Jasper or VC-Formal. Your skills in Python, Perl, or Shell scripting are a plus. You are a team player with excellent communication skills, capable of mentoring junior engineers and collaborating with geographically diverse cross-functional teams. Your problem-solving abilities and attention to detail enable you to debug RTL designs effectively and identify causes of failure scenarios. You hold a Bachelor's or Master's degree in Computer Science or Electrical Engineering from a reputed engineering college. What You'll Be Doing: * Specifying, implementing, and maintaining an integrated end-to-end formal verification flow for the formal verification objective. * Guiding and training team members on effective usage of FV tools. * Reviewing formal setups and proofs with design and verification teams. * Maintaining and extending assertion libraries, including support for both simulation and formal verification. * Identifying key behaviors for verification of DUT and creating a formal verification plan. * Developing verification environments, including environment assumptions, assertions, and cover properties in the context of the verification plan. * Applying various formal verification techniques to prove the correctness of digital designs. * Debugging RTL to identify causes of failure scenarios. The Impact You Will Have: * Enhance the reliability and quality of our digital designs through rigorous formal verification. * Contribute to the development of high-performance silicon chips and software content. * Improve the overall design and verification process by maintaining and extending assertion libraries. * Facilitate knowledge sharing and skill development within the team by providing guidance and training on FV tools. * Ensure the correctness of designs by identifying key behaviors and creating comprehensive verification plans. * Support the success of geographically diverse cross-functional teams through effective collaboration and communication. What You'll Need: * Strong knowledge of architectures of designs and digital logic. * Experience with synthesis flow and static timing flows, formal checking, etc. * Hands-on experience with HDLs such as Verilog / System Verilog. * Understanding of temporal logic assertions. * Experience with at least one formal verification tool (e.g., Jasper, VC-Formal). * Experience with complex verification projects that used formal techniques for closure. * Skills in Python, Perl, or Shell scripting (a plus). Who You Are: * A seasoned professional with a comprehensive understanding of formal verification techniques. * A collaborative team player with excellent communication skills. * A problem solver with strong debugging skills. * A mentor capable of guiding junior engineers and interns. * An individual with a proactive and detail-oriented approach to work. The Team You'll Be A Part Of: You will be part of the Solutions Group at our Bangalore Design Center, India. This team focuses on delivering high-quality digital designs and verification solutions. The position offers learning and growth opportunities, allowing you to work with a diverse group of talented engineers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9898 Remote Eligible No Date Posted 25/03/2025 Analog Design, Manager (high-speed circuit design) We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are looking for a seasoned and enthusiastic professional who thrives on problem-solving, is committed to ongoing learning, and is eager to work with advanced technologies. You possess outstanding communication skills and enjoy working in a dynamic team of highly talented engineers. As the Manager- Analog Design, you have a deep understanding of deep understanding of high-speed circuit design. You are experienced in leading teams, designing and analyzing analog circuits, combined with your knowledge of network/transmission line/SI analysis and semiconductor devices/physics, makes you a valuable asset. managing regression analysis and collaborating closely with design, layout and other stakeholders.You have experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. Your ability to micro-architect circuits from specifications and focus on enhancing PPA targets and reducing turnaround time sets you apart. You possess a strong grip on design reliability analysis and can work effectively both independently and lead the team. Your excellent communication skills and collaborative nature enable you to work seamlessly with cross-functional teams to achieve project goals. You are dedicated to staying updated with the latest advancements in analog design and are eager to contribute to innovative solutions that shape the future of technology. What You'll Be Doing: * Collaborate with design, Layout, ESD teams to align requirements and resolve bottlenecks effectively. * Innovate and refine design methodologies to enhance scalability, efficiency, and reliability. * Design, develop, and verify high-speed analog and mixed-signal integrated circuits. * Collaborate with cross-functional teams to define design specifications and requirements. * Model complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Perform circuit simulations and layout verification to ensure design accuracy and performance. * Optimize designs for power, performance, and area (PPA) and reduce turnaround time. * Contribute to the development of design methodologies and best practices. The Impact You Will Have: * Advance the design and verification of high-speed analog and mixed-signal integrated circuits. * Ensure the accuracy and reliability of analog designs through rigorous verification and testing. * Collaborate with cross-functional teams to deliver innovative solutions that meet market demands. * Contribute to the continuous improvement of design methodologies and processes. * Support the development of cutting-edge technologies that enhance our products and services. * Drive innovation and excellence in analog design at Synopsys. What You'll Need: * Bachelor's degree in electrical engineering, Computer Engineering, or a related field. * 10+ years of experience in analog circuit design and analysis. * Deep understanding of analog circuits design and analysis techniques. * Experience in modeling complex/non-linear circuit behavior to linear models for stability and jitter analysis. * Good understanding of network/transmission line/SI analysis and semiconductor devices/physics. * Strong grip on design reliability analysis. * Ability to micro-architect circuits from specifications. * Focus on enhancing PPA targets and reducing turnaround time. Who You Are: * A strong leader with excellent communication and mentoring skills. * Innovative and committed to continuous improvement. * Detail-oriented with a strategic mindset. * Collaborative, with the ability to work effectively in a team environment. * Passionate about technology and eager to work on cutting-edge projects. You are a meticulous and innovative Leader who excels in high-speed analog and mixed-signal design. Your ability to communicate effectively and work collaboratively with cross-functional teams makes you an essential team Leader. You have a passion for staying current with the latest advancements in analog design and are always looking for ways to improve design methodologies and processes. Your strong technical skills, combined with your problem-solving abilities and attention to detail, enable you to tackle complex challenges and drive innovation at Synopsys. The Team You'll Be A Part Of: You will join a team of dedicated professionals who are passionate about analog and mixed-signal design. Our team collaborates closely with various business groups to deliver high-performance integrated circuits that meet market demands. We value innovation, collaboration, and continuous learning, and we are committed to making a significant impact on the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. If you have the capability to make things happen, drive results and work with a Yes-if attitude, then Synopsys Inc will provide the right environment for you to prosper. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10560 Remote Eligible No Date Posted 08/04/2025 Analog Design, Sr Engineer-10560 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What You'll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IO's. - Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What You'll Need: * Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design. * Experience Required: 1 - 3 yrs Who You Are: * Creative and results-oriented, capable of managing multiple tasks concurrently. * Strong verbal and written communication skills in English. * Ability to work collaboratively across teams to deliver solutions to customers. * Strong analytical, reasoning, and problem-solving skills. * Willingness to travel occasionally to support customer engagements. The Team You'll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 7768 Remote Eligible No Date Posted 27/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and passionate GPU R&D Engineer with a strong background in optimizing and implementing GPU-accelerated algorithms. You have a deep understanding of CUDA or similar technologies, and you excel in performance improvements and integration with existing tools. Your expertise in algorithms and data structures, combined with your collaborative skills, make you a valuable asset to any team. You are always eager to stay current on GPU technology trends and incorporate the latest advancements into your work. With at least 8 years of experience, you are ready to take on challenging projects and deliver optimal solutions rapidly, contributing to the fast-paced environment at Synopsys. What You'll Be Doing: Optimize existing GPU implementations for ILT software. Design new GPU-accelerated algorithms for large-scale geometric data handling for ILT. Collaborate with cross-functional teams to ensure seamless integration of GPU features. Lead benchmarking and performance testing initiatives. Stay current on GPU technology trends and design the latest advancements into the system. Work closely with customers and hardware vendors to deliver optimal solutions swiftly. The Impact You Will Have: Enhance the performance and efficiency of ILT software through optimized GPU implementations. Drive innovation in GPU-accelerated algorithms for complex geometric data handling. Ensure the seamless integration of GPU features within existing Mask Synthesis tools. Lead initiatives that set new benchmarks for performance and reliability. Keep Synopsys at the forefront of GPU technology advancements. Accelerate the manufacturing of new chips by delivering rapid and optimal solutions. What You'll Need: Bachelor's, Master's, or Ph.D. in Computer Science or a related field. At least 8 years of experience in GPU optimization and implementation. Advanced knowledge of CUDA or similar technologies. Proficiency in C/C++, Python, and distributed computing environments. Strong understanding of algorithms and data structures. Who You Are: Exceptional troubleshooting and collaborative skills. Passionate about staying up-to-date with the latest GPU technology trends. Detail-oriented and committed to delivering high-quality solutions. Strong communicator with the ability to work effectively in cross-functional teams. Innovative thinker who thrives in a fast-paced, dynamic environment. The Team You'll Be A Part Of: You will be part of a dedicated team of engineers focused on developing and optimizing ILT software. The team collaborates closely with customers, hardware vendors, and cross-functional groups within Synopsys to ensure the delivery of cutting-edge solutions. Together, we strive to push the boundaries of what is possible in the EDA industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned technical writer with a passion for making complex information accessible and engaging. With a keen eye for detail and a deep understanding of technical writing standards, you excel in creating comprehensive and clear documentation for highly technical audiences. You thrive in fast-paced environments, and your ability to learn new technologies quickly sets you apart. Your excellent communication skills enable you to collaborate effectively with engineers, designers, and other stakeholders, ensuring that the documentation you produce meets the highest standards of quality and usability. You have a strong background in engineering or science, with a Bachelor's or Master's degree to support your technical expertise. With 5 to 12 years of experience in technical writing within a software product development company, you bring a wealth of knowledge and best practices to the role. Your proficiency in DITA and XML authoring tools, as well as your familiarity with UNIX or Linux, make you an invaluable asset to the team. Additionally, your experience with electronic design automation (EDA) tools gives you a unique perspective that enhances your ability to create relevant and impactful documentation. What You'll Be Doing: * Developing and maintaining documentation for EDA products used by chip designers and scientists. * Planning, organizing, and creating user guides, reference material, and release notes for design engineering audiences. * Researching and organizing initial source material into high-quality drafts, including product specifications, training materials, and engineering input. * Collaborating with Applications and R&D engineers to solicit feedback and reviews. * Implementing good standard writing practices to develop clear and concise technical content. * Ensuring documentation is up-to-date with the latest product releases and features. The Impact You Will Have: * Enhancing the usability and adoption of Synopsys products through clear and comprehensive documentation. * Supporting the success of chip designers and scientists by providing them with the information they need to effectively use Synopsys tools. * Improving customer satisfaction by addressing their requirements through well-crafted documentation. * Contributing to the overall quality and reliability of Synopsys products by ensuring accurate and detailed documentation. * Facilitating better communication and collaboration between engineering teams and end-users. * Helping to drive continuous improvement in documentation processes and standards. What You'll Need: * Bachelor's or Master's degree in Engineering or Science. * 5 to 12 years of technical writing experience in a software product development company. * Good knowledge of technical writing standards and processes. * Ability to grasp new technology quickly. * Excellent written and verbal communication skills. * Experience with DITA and XML authoring tools such as Oxygen XML Author. * Working knowledge of UNIX or Linux. * Experience with electronic design automation (EDA) tools. Who You Are: * A detail-oriented professional with a passion for technical writing. * A quick learner who adapts easily to new technologies and processes. * An excellent communicator who can convey complex information clearly and effectively. * A team player who collaborates well with engineers and other stakeholders. * A proactive problem-solver who can make decisions quickly and reprioritize tasks as needed. The Team You'll Be A Part Of: You will join a dynamic team dedicated to developing and updating product documentation for Synopsys product releases. This team includes experienced technical writers, engineers, and product managers who work collaboratively to create high-quality documentation that meets the needs of our highly technical audience. Together, you will contribute to the success of Synopsys products by ensuring that users have access to clear, accurate, and comprehensive information. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10225 Remote Eligible No Date Posted 28/03/2025 R&D Engineering, Custom Circuit Architect Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world's first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk. We are seeking an experienced, initiative-taking, and high-calibre individual to join our SLM Monitors group as a Monitor IP Design, Architect. Someone who thrives in a collaborative environment and has a passion for creating innovative technology. Have a strong technical background in Custom Circuit design, System Design, methodologies and tools and is adept at working with advanced finfet / GAA process challenges. Proactive analytical person with a keen eye for detail and a dedication to delivering high-quality results. Excellent communication and people skills and can collaborate effectively with internal teams and external customers. Driven by a desire to innovate and contribute to the success of our innovative technology products. Job Descriptions Looking forward towork on conceptualizing, designing and productizing state of the art Monitor IP to be used in SLM monitors realized though ASIC design flow. Work on Architecting sensing elements for on-chip Process, Voltage, Temperature, glitch and Droop monitors for monitoring silicon biometrics. You will be the part of SLM team. Individual should have strong technical experience in full custom mixed-signal circuit design, circuit simulations, working knowledge of custom layout, and pre-post-silicon characterization. Additional responsibilities include: Development of statistical simulation methodologies. Liaising with layout team to achieve best possible design solution. End to end ownership of the designed custom cells. Deployment of new circuits into test chips and post-silicon characterization Architecting new sensors and enhancing existing ones through collaboration with other architects and stakeholders. Building and refining design flows to enhance efficiency and effectiveness. Conducting pre and post-layout simulations and characterization across various design corners. Ensuring designs meet advanced finfet / GAA reliability and aging, reliability and Automotive grade requirements Working closely with the RTL, Verification and Physical Design teams for ensuing integration and Quality. Owning the product from Spec to Silicon report. Preferred skills: Strong custom design experience specification, circuit design description and schematics. Strong understanding of device Physics and Can work independently and debug and provide circuit solutions. Hands on experience with circuit design & simulation tools, IC design CAD packages from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies. Job Requirements BS or MS degree in Electrical Engineering with 15+ years of relevant industry experience. Sound knowledge of custom / Standard cell design methodologies, layout tools, and physical verification. Familiarity with advanced finfet / GAA process challenges, simulation techniques and modeling. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10560 Remote Eligible No Date Posted 08/04/2025 Analog Design, Sr Engineer-10560 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced professional with a deep understanding of VLSI design and a strong background in high-speed protocols Analog Circuit Design - CMOS circuit design and layout methodology & flow. Familiarity with ASIC design flow. Knowledge of JEDEC requirements for DDR interfaces & standards, DDR Timing, ODT and SDRAM functionality would be a plus. What You'll Be Doing: DDR/HBM Memory Interface I/O Circuit and layout design including GPIO and Special IO's. - Work with DDR/HBM PHY team, package engineers and system engineers to meet design specifications. What You'll Need: * Bachelor's and/or Master's Degree in Electrical Engineering or similar with a focus on VLSI design. * Experience Required: 1 - 3 yrs Who You Are: * Creative and results-oriented, capable of managing multiple tasks concurrently. * Strong verbal and written communication skills in English. * Ability to work collaboratively across teams to deliver solutions to customers. * Strong analytical, reasoning, and problem-solving skills. * Willingness to travel occasionally to support customer engagements. The Team You'll Be A Part Of: The team focuses on enabling our Interface IP customers to integrate the IP into their SoC and assist them through their design flows, debugging critical issues, and supporting silicon bring-up. This collaborative team works closely with customers to ensure the successful deployment of Synopsys leading Interface IP products in various market segments. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10094 Remote Eligible No Date Posted 01/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking innovative and out-of-the-box thinking Design For Test (DFT) Engineers to be a part of the Fast Solution Team under the Test Group at Synopsys. You are someone who thrives in a project-oriented environment, delivering comprehensive DFT solutions ranging from integration to silicon bring-up for customers designing digital ICs of varying complexity. You excel in assessing customer methodologies and flows, gathering requirements, and proposing solutions. You are adept at providing technical support to ensure customer success and satisfaction, winning new customers through product demonstrations, evaluations, and competitive benchmarking. You are skilled in resolving technical problems, training, and account management, and you can interact effectively with end-users at customer sites and with first-level managers. You are also responsible for working with Solution Architects to develop and productize the next-gen test technologies. Your role involves prototyping new methodologies, analyzing gathered data, identifying the viability of technology, and presenting the findings under the guidance of a Solution Architect. What You'll Be Doing: Providing expertise for test solutions during design planning, budgeting, and implementation. MBIST implementation and validation, including BIST architecture planning, memory grouping, pattern generation, validation, silicon bring-up, diagnostics analysis, and debug. Participating in customer's design and flow reviews. Driving, prototyping, and developing new Design for Test methodologies. Multitasking across various issues and priorities to help customers exploit new technologies. Collaborating with Solution Architects to develop and productize next-gen test technologies. The Impact You Will Have: Enhancing Synopsys ability to deliver cutting-edge test solutions that meet customer needs. Contributing to the successful integration and silicon bring-up of complex digital ICs. Ensuring high customer satisfaction through effective technical support and problem resolution. Driving innovation in test methodologies and technologies. Supporting the development of next-gen test technologies that push the boundaries of what's possible. Playing a key role in winning new customers and expanding Synopsys market presence. What You'll Need: Minimum BS+10 years of relevant experience/MS+8 years of relevant experience in Electrical Engineering, Computer Engineering, or other relevant fields of study. Experience with RTL coding, DFT insertion, ATPG, MBIST architecture planning, insertion, validation, pattern generation, and silicon bring-up. Excellent knowledge of memory BIST flows, memory fault models, MBIST algorithms, hard/soft repair, and eFuse repair flow. Experience in handling memory BIST for large, complex SoCs with various IPs. Exposure to MBIST of automotive designs is a plus. Good understanding of protocols like 1149.1, 1500, 1687. Who You Are: You possess excellent soft skills and can communicate effectively with various stakeholders. You are highly motivated, proactive, and can work independently with limited supervision. Your advanced knowledge and wide-ranging experience enable you to work on complex issues requiring in-depth evaluation of various factors. You are a sophisticated professional who can communicate and influence parties within and outside your subfamily area. The Team You'll Be A Part Of: The Test Group at Synopsys is a critical part of the change, delivering a complete DFT solution to fulfill customer needs. You will be part of the Fast Solution Team, working closely with Solution Architects and other engineers to develop and productize next-gen test technologies. This team is dedicated to driving innovation and ensuring customer success through comprehensive test solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a proactive and detail-oriented individual with a passion for People Operations. With 0 - 2 years of experience in HR operations, you have a solid foundation in managing the employee lifecycle from pre-onboarding through offboarding. Your experience with HRIS systems, ServiceNow, particularly SuccessFactors or similar tools, equips you with the skills to handle complex employee data and processes. You hold a BA/BS degree and have honed your ability to manage multiple tasks and deadlines with exceptional organizational skills. Your strong stakeholder partnering skills enable you to collaborate effectively with various teams, ensuring the delivery of impactful HR solutions. You are familiar with Microsoft Office and project management tools, and your excellent written and spoken communication skills make you a reliable and clear communicator. Your resourceful problem-solving abilities allow you to troubleshoot issues independently and drive meaningful solutions. What You'll Be Doing: Collaborate effectively with stakeholders to proactively determine and deliver relevant and impactful People (HR) operation solutions to business and system challenges. - Accurately perform employee lifecycle transactions/processes, including onboarding, offboarding, transfers/job status changes, timekeeping, time off and leave, extended workforce, and other responsibilities as assigned. - Recommend and draft employee lifecycle processes and procedures that enhance and optimize existing HR practices, ensuring they remain fit for purpose and benefit stakeholder teams. - Be a trusted resource for People (HR) systems, data, and process knowledge to interpret and analyze processes. - Drive People operation enhancements by supporting new module roll-out and optimization initiatives. - Manage requests, workflows, and develop a knowledge base and reporting metrics using ServiceNow. The Impact You Will Have: Streamline HR processes to improve efficiency and accuracy in employee lifecycle management. - Enhance stakeholder satisfaction by delivering timely and effective HR solutions. - Contribute to the optimization of HR practices, ensuring they are aligned with organizational goals. - Support the successful rollout and adoption of new HR modules and tools. - Provide valuable insights and data analysis to drive informed decision-making in HR operations. - Foster a collaborative and supportive HR environment, building trust with stakeholders and team members. What You'll Need: 0 - 2 years of People (HR) operations related APAC work experience. - BA/BS degree. - Experience with HRIS administration, particularly SuccessFactors or similar tools. - Knowledge of managing requests, workflows, developing knowledgebase, and reporting metrics using ServiceNow. - Exceptional organizational skills and attention to detail. - Proficiency in Microsoft Office suite and familiarity with project management tools. - Excellent written and spoken communication skills. Who You Are: Detail-oriented and organized. - Resourceful problem-solver. - Effective communicator. - Collaborative team player. - Proactive and initiative-driven. The Team You'll Be A Part Of: You will be part of a dynamic People Operations team focused on delivering exceptional HR services and solutions. Our team collaborates closely with various stakeholders to ensure smooth HR operations and continuous improvement of HR processes. We value innovation, teamwork, and a commitment to excellence in all our endeavors. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10431 Remote Eligible No Date Posted 03/04/2025 Sr. Staff- ASIC Verification. This is a verification focused individual contributor's role. The candidate will be part of the DesignWare IP Verification R&D team at our Bangalore Design Center, India. Implement state-of-the-art Verification environments for the DesignWare family of synthesizable cores and perform Verification tasks for the IP cores. Work closely with RTL design team and be part of a global team of expert Verification Engineers. Domains will include but not be limited to USB, PCI Express, Ethernet,AMBA. Job role will have a combination of Test planning, Test environment coding both at unit level and system level, Test case coding and debugging, FC coding and analysis and meeting quality metric goals and regression management. Requirements: - BS/BE in EE with 8+ years of relevant experience or MS with 6+ years of relevant experience in the verification of IP cores and/or SOC verification. - Experience in developing HVL based test environments, developing and implementing test plans, implementing and extracting verification metrics such as functional coverage. - HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and relevant debugging tools. - Exposure to verification methodologies such as UVM/VMM/OVM is required. - Familiarity with HDLs such as Verilogand scripting languages such as perl is highly desired. - Exposure to IP design and verification processes including VIP development is an added advantage. - Basic understanding of functional & Code coverage. - It is essential that the individual has good written and oral communication skills and is able to demonstrate good analysis, debug and problem solving skills and be self-driven. Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the world's broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're poweringit all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10442 Remote Eligible No Date Posted 03/04/2025 Job role: At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon IP business is all about integrating more capabilities into an SoCfaster. We offer the world's broadest portfolio of silicon IPpredesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. We're looking for ASIC Digital Verification Engineers with different experience levels to join the team! Does this sound like a good role for you You will be working on VLSI IP verification of controllers related to complex protocols.You will be part of the Solutions Group at our Bangalore Design Center, India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. Job Responsibilities - Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/DSC/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/ USB/ MIPI Be an individual contributor in the Verification Tasks Architect testbenches, coding of TE, debug, verification coverage improvement, etc. Will contribute to technical review of TE Code of medium complexity. Will contribute to technical process and quality improvement to achieve high quality deliveries Will be expected to Solve complex/ abstract problems The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers. The role offers ample scope to mentor junior engineers and interns and to enhance ones leadership skills. Key Qualifications and Experience Must have BSEE/ MSEE in EE with 5 to 8 years of relevant experience in the following areas: Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. Knowledge of one or more of protocols: Ethernet/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/USB/ DDR/PCIe MIPI/DSC. Knowledge of Ethernet protocol will be plus. Hands on experience with creating detailed design of components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM, OVM Test Planning, Coverage Planning, Assertion Planning Hands on experience with System Verilog coding and Simulation tools; Deep Knowledge of OOPs Concepts Experience with Perforce or similar revision control environment Knowledge of Perl/Shell scripts. Exposure to quality processes in the context of IP design and verification is an added advantage In addition, the candidate should have good communication skills, will be a team player, and will have good problem-solving skills. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

The candidate will be part of the Static Verification team, a group of talented engineers dedicated to developing and enhancing platform for our static verification products. This team collaborates closely with other departments, including design, development, and customer support, to ensure seamless integration and execution. Together, the candidate will work on cutting-edge projects that push the boundaries of technology and contribute to the success of Synopsys and its customers. Person will work in platform team of static verification. Platform team provides support to various apps which are part of static verification. The hired candidate will provide features and support needed for successful deployment and ongoing business for apps of static verification. He might also work in developing GenAI application related to static platform. Technical competencies required for the role Strong hands-on experience in C/C++ based Object Oriented large and complex enterprise software development. Strong background in Design Patterns, Data Structure, Algorithms , and programming concepts. Well versed with Software Engineering and development processes. Experience with popular AI/ML frameworks (e.g., TensorFlow, PyTorch) is desirable. Experience with production code development on Unix/Linux platforms. Ability to develop new architectures and demonstrate strong leadership skills. Ability to troubleshoot, debug, and support software applications. Good analysis and problem-solving skills. 4+ years of software development experience. Preferable skills Experience in EDA/AI/ML research and development Exposure to Tcl, Python, Shell scripting and/or Vim Exposure to developer tools such as gdb, Valgrind,Visual Studio and Eclipse. Exposure with source code control tool like Perforce, Clearmake, CVS or Git . At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.