67 Formal Verification Jobs - Page 3

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. 8+ years RTL Design/Hardware Engineering experience or related work experience. Strong Domain Knowledge on RTL design(Verilog/VHDL/System Verilog) , implementation, and integration, micro-architecture & designing cores and ASICs Familiar with the Synthesis, Formal Verification, Linting, CDC, Low Power, UPFs, etc Exposure in scripting (Pearl/Python/TCL) Strong debugging capabilities at simulation, emulation, and Silicon environments Collaborate closely with cross-functional teams to research, design and implement performance and power management strategy for product roadmap Knowledge on Designing low power/power management controller IP blocks including AVS (adaptive voltage scaling), ACD (adaptive clock distribution), on-chip sensor controller Work closely with technology/circuit design team to close IP block specification/requirement. Work closely with verification/physical design team to complete the IP design implementation Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows Work closely with system/software/test team to enable the low power feature in SoC products Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Title : Formal Verification Engineer Experience range : 6-15 Yrs Location : Hyderabad Availability : Immediate 30 days Job Description : Responsibilities : Identify blocks suitable for applying Formal Verification Create Formal Test-plan for blocks identifying properties to be implemented and sign-off metrics. Implementation and maintenance of Formal Verification environments in Chisel Applying various FV techniques to reduce complexity and prove correctness of DUT. Debugging RTL to identify causes of failure scenarios. Guide and train team members on effective usage of Formal Verification tools Develop/modify scripts to automate the verification process. Review formal setups and proofs with design and verification teams. Maintain and extend assertion libraries. 7+ years of experience in Formal Verification of Digital Hardware Design Extensive experience with Formal Abstraction Techniques and sign-off process Familiarity with industry-standard Formal Verification Tools, such as VC Formal, Jasper Gold Knowledge of Hardware Description and Verification Languages, such as VHDL, Verilog/ System Verilog Knowledge of Object-oriented Programming is a plus. A keen interest in Processors and Digital systems Strong reasoning skills and excellent attention to detail Good interpersonal and teamwork skills!

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: "¢ Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPDPhysical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and / or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc.

You Are: You are a seasoned digital verification engineer with a passion for innovation and problem-solving With a BE/b-tech degree in electronics or a related engineering field, you bring 3-5 years of hands-on experience in digital verification Your proficiency in system verilog, UVM, coupled with a strong understanding of formal verification techniques, sets you apart You thrive in UNIX/Linux OS environment and have a keen interest in exploring new technologies Your ability to build UVM based testbenches , along with your prior knowledge of EDA tools and simulators, makes you an ideal candidate Excellent English communication skills and the ability to compile verification plans and strategies are essential for this role, What Youll Be Doing: Creation of test plans Development of testbenches Creation of tests both directed and random Functional coverage modelling and review, Code coverage review Debugging and resolving mismatches between design and C-model Integration of third party and internal verification IP Review and improvement of verification test suites and testbench Mentor junior team members Creation of Test plan, test strategy Coverage databases (Fully traceable from test plan and specification) The Impact You Will Have: Driving innovation in processor verification techniques Enhancing the efficiency and effectiveness of our verification mechanisms Contributing to the development of cutting-edge technology that sets Synopsys apart in the industry Ensuring high-quality IP delivery through rigorous verification Supporting the continuous improvement of our hardware verification processes What Youll Need: Bachelors degree in engineering from a reputed college Minimum 3+ years of relevant experience Microprocessor verification experience is an advantage Hands-on experience with SystemVerilog and Verilog Proficiency with Verification methodologies: UVM/OVM Programming skills: C, assembly, Perl, makefile generation Experience with latest verification techniques like formal, low-power, safety etc is an added advantage Who You Are: Innovative thinker with a passion for technology Excellent communicator and collaborator Detail-oriented and highly organized Adept at problem-solving and critical thinking Proactive and self-motivated The Team Youll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and verifying ARC processor IPs Our team values collaboration, creativity, and continuous improvement, and we are dedicated to pushing the boundaries of technology to deliver exceptional products,

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA * Development responsibilities will include core algorithmic advances and software design/architecture. * You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. * Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: * B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. * Strong knowledge of C/C++, algorithms, and data structures. * Familiarity with compiler concepts and optimizations. * Experience with UNIX and/or LINUX platforms is essential. * Excellent problem-solving and analytical skills. * Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: * Strong understanding of basic digital electronics concepts. * Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. * Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. * Experience with parallel algorithms and job distribution techniques. * Exposure to simulation or formal verification methodologies is a plus.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-7 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus.

We make real what matters. This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 5- 8 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and TCL.

Looking for Siemens EDA ambassadors This is your role. At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey! This is the Role Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis. Guide and lead others toward successful project completion by innovating and implementing powerful solutions. Collaborate with a hardworking team of experts. Must-Have Requirements B.Tech or M.Tech in CSE/ EE/ ECE from a reputed engineering college with 8-12 years of experience in software development. Validated understanding of C/C++, algorithms, and data structures. Demonstrate excellent problem-solving and analytical skills. Lead and encourage the team with your expertise. Great to Have Experience in: You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power. Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power. Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and TCL.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities : We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA Development responsibilities will include core algorithmic advances and software design/architecture. You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 2-5 years of experience. Strong knowledge of C/C++, algorithms, and data structures. Candidate having worked in Design Verification domain who are well versed with System Verilog & UVM is a plus. Familiarity with compiler concepts and optimizations. Experience with UNIX and/or LINUX platforms is essential. Excellent problem-solving and analytical skills. Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: Strong understanding of basic digital electronics concepts. Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. Experience with parallel algorithms and job distribution techniques. Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #LI-EDA #LI-Hybrid #DVT

- We work with a team of component validation, integration, protocol test engineers, firmware developers and system engineers to create firmware verification test cases and end to end physical layer performance- Design and develop validation frameworks for the 4G/5G firmware Also, design, develop, and execute test cases for the 4G/5G firmware and debug and analyze issues found during the testing- Create test automation of 4G/5G UEs, test simulators and test gNodeBs - Verify key protocol, signal processing and numerical algorithms with very tight time, latency and energy budgets - Work with Systems / Firmware teams to perform validation of new and existing features - We are looking for candidates who can assist in the development of pre-silicon emulation systems/virtual platforms and use them for pre-silicon firmware design and HW verification Also, evaluate and implement cutting edge tools for build, formal verification and test In-depth understanding of 5G and 4G 3GPP physical layer and protocol stack procedures and configurations Experience with firmware test case planning, design, and development for the 4G/5G functional and performance scenarios Strong understanding of automation tools and scripting languages, such as Python, C/C++, Java (a plus) Solid understanding of multiple 4G/5G signaling and physical layer test equipment (Keysight/Anritsu/R&S) along with their automation interfaces Strong analysis and debugging capabilities to be able to define issues and work with firmware development and systems design teams to close these issues Deep understanding of software engineering principles, and core computer science fundamentals Fundamental facility with build and source code control tools Versatile to learn new architecture, frameworks and experience with network emulators, silicon prototyping, emulation systems, and virtual platforms a plus Education & Experience Bachelors degree in Electrical Engineering, Computer Science or related experience is required

We are seeking an exceptional Senior ASIC Verification Engineer to join our innovative semiconductor team. You will lead verification initiatives for complex ASIC designs and drive technical excellence across projects. About the Role : You will be responsible for developing advanced verification environments, leading cross-functional technical initiatives, and mentoring team members while ensuring the highest quality standards in our ASIC designs. What You'll Do : - Design and implement advanced System Verilog/UVM verification infrastructures - Lead verification planning and execution for complex ASIC projects - Develop comprehensive test strategies ensuring thorough design validation - Drive debug resolution through collaboration with cross-functional teams - Mentor and provide technical guidance to verification team members - Enhance and optimize verification methodologies - Own end-to-end SOC verification environments Required Skills & Experience : - BS/MS in Electrical/Computer Engineering - 2+ years of hands-on ASIC verification experience - Expert-level SystemVerilog, UVM, and object-oriented programming skills - Strong proficiency with industry tools like VCS, Xcelium, QuestaSim - Advanced debugging and problem-solving capabilities - Excellent communication and collaboration abilities - CLP and GLS - Python/Perl scripting expertise Nice to Have : - Experience with PCIe, DDR, USB, C2C - Knowledge of on-chip interconnects and processor subsystems - Background in formal verification methods - Prior experience on Emulators

Staff Silicon Formal Verification Engineer :- Bangalore Founded in 2023,by Industry veterans HQ in California,US We are revolutionizing sustainable AI compute through intuitive software with composable silicon Silicon Formal Verification Engineer Job Description In this role you will be responsible for developing and applying formal verification techniques to ensure functional correctness and completeness of high performance AI/ML Chiplet and SiP products. You will collaborate with a team of highly skilled team Architects and RTL Design engineers to identify, define, and verify components suited for formal analysis. Create robust formal abstract models to verify system-level properties, such as deadlocks, livelocks, anti-starvation, coherency. Innovate by integrating formal methods with simulation-based techniques to enhance bug detection efficiency. Develop scalable and reusable proof methodologies to support the verification process. Technical Requirements In-depth knowledge in formal verification algorithms, methods and use cases Expert user of formal verification tools (JasperGold, VC Formal, Questa Formal tools) Expertise in system Verilog assertion and abstract model development Hands on experience as Formal verification Engineer on AI or CPU designs. Comprehensive knowledge of computer architecture and familiarity with x86 or ARM or RISC processors:- Job Description In this role you will be responsible for developing and applying formal verification techniques to ensure functional correctness and completeness of high performance AI/ML Chiplet and SiP products. You will collaborate with a team of highly skilled team Architects and RTL Design engineers to identify, define, and verify components suited for formal analysis. Create robust formal abstract models to verify system-level properties, such as deadlocks, livelocks, anti-starvation, coherency. Innovate by integrating formal methods with simulation-based techniques to enhance bug detection efficiency. Develop scalable and reusable proof methodologies to support the verification process. Technical Requirements In-depth knowledge in formal verification algorithms, methods and use cases Expert user of formal verification tools (JasperGold, VC Formal, Questa Formal tools) Expertise in system Verilog assertion and abstract model development Hands on experience as Formal verification Engineer on AI or CPU designs. Comprehensive knowledge of computer architecture and familiarity with x86 or ARM or RISC processors Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

We are seeking a Senior CAD Engineer with 10+ years of experience to join our team in Bangalore. The ideal candidate will be responsible for deploying and supporting front-end tools such as RTL simulators, low power tools, and static RTL checkers. They will also develop scripts to automate regression/debug flows, manage CI/CD processes, interface with EDA vendors, and support global teams across geographies. Proficiency in scripting (Python, Bash, Makefiles), Linux system administration, and version control tools (Git, Mercurial) is essential. Experience in ASIC flows and standard CAD tools is required. Immediate joiners with a notice period of 15 days or less are preferred.

We are seeking a Senior CAD Engineer with 10+ years of experience to join our team in Bangalore. The ideal candidate will be responsible for deploying and supporting front-end tools such as RTL simulators, low power tools, and static RTL checkers. They will also develop scripts to automate regression/debug flows, manage CI/CD processes, interface with EDA vendors, and support global teams across geographies. Proficiency in scripting (Python, Bash, Make, Linux system administration, and version control tools (Git, Mercurial) is essential. Experience in ASIC flows and standard CAD tools is required. Immediate joiners with a notice period of 15 days or less are preferred.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities o Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. o Work closely with design/verification teams within CPU to develop comprehensive test plan. o Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. o Verify power intent through use of methodologies like UPF. o Work closely with system architects, software teams and Soc team to validate system use cases. o Work closely with emulation team to enable verification on emulators and FPGA platforms. o Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. o BE/BTech degree in CS/EE with 3+ years"™ experience. o Experience in power management verification. o Implementation of assembly and C language embedded firmware. o Experience in C/C++, scripting languages, Verilog/system Verilog. o Strong understanding of power management features in CPUs and CPU based Socs. o Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements: o Good Understanding of CPU architectures and CPU micro-architectures. o In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture o Experience with advanced verification techniques such as formal and assertions is a plus o Knowledge and verification experience in DFT and structural debug concepts and methodologiesJTAG, IEEE1500, MBIST, scan dump, memory dump is a plus

We are seeking a Senior CAD Engineer with 10+ years of experience to join our team in Bangalore The ideal candidate will be responsible for deploying and supporting front-end tools such as RTL simulators, low power tools, and static RTL checkers They will also develop scripts to automate regression/debug flows, manage CI/CD processes, interface with EDA vendors, and support global teams across geographies Proficiency in scripting (Python, Bash, Makefiles), Linux system administration, and version control tools (Git, Mercurial) is essential Experience in ASIC flows and standard CAD tools is required Immediate joiners with a notice period of 15 days or less are preferred

As part of the team, design, develop and drive improvements to the verification technology Support the existing functionality and continually aim to enhance the versatility, performance and memory utilization while improving quality of the software. Work requires algorithm, data structure design as well as developing robust and efficient implementations. Interact with other members of Synopsys R&D, customer as necessary to understand customer needs and product goals. Skills Required: A minimum of 8 years of related experience. Excellent Software development experience with C / C++ on UNIX/Linux platforms Broad understanding of data structures, algorithms and their applications. Should have experience working in a multi-person product development environment with high dependencies and tight schedules. It is essential that the applicant is highly motivated and has solid desire to learn and explore new technologies. Demonstrated history of good analytical, debugging and problem-solving skills. Experience with complex software tool development and usage with legacy code base Exercise of judgment in developing methods, techniques, and evaluation criteria to meet project goals. Ability to work in both self-directed and collaborative settings. Understanding/Experience in Unified Power Format (UPF) would be beneficial Good written and oral communication skills, for team collaboration and product presentations. Preferred Skills: Special consideration given to those with background and experience in formal verification and/or synthesis techniques. Experience in Compilers and RTL Synthesis would be beneficial Knowledge of software specification and design process, and regression testing. Ability to know about customer wants and needs in the formal verification user community, by working with sales and field personnel.