Design and Verification Engineer

Innominds Software

7 - 12 years

18 - 30 Lacs

Pune

Posted:1 day ago| Platform:

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Skills Required

Test Bench Bluetooth Amba SOC Verification PCIE WiFi UVM System Verilog

Work Mode

Hybrid

Job Type

Full Time

Job Description

Role & responsibilities

7+ years of design verification experience.
MS (or higher) in EE/EC/ECC Engineering
As a member of the Design Verification [
Pre-Silicon DV
] Team for client WCS/SCE BU
You will be responsible for verification of various IPs and/or SoC.
Candidate must be self-motivated and capable of working independently or as part of a team
You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
You will also assist with developing test-plans, debugging failures and analyzing coverage information.
Must have excellent knowledge of computer architecture and design verification fundamentals
Must have experience with Verilog and popular EDA simulation,
System Verilog assertions and testbench methodologies
Must have experience in developing complex test bench in System Verilog using OVM/
UVM methodology
Hands-on experience in
AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol
Experience in
Low Power Simulation/UPF setup, debug low power simulation failures.
Exposure to scripting languages like Perl, Unix shell or similar languages
Good to have some experience with assembly language programming required
Excellent written and oral communication skills necessary

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