249 Compiler Jobs - Page 2

Introduction IBM Research takes responsibility for technology and its role in society. Working in IBM Research means you'll join a team who invent what's next in computing, always choosing the big, urgent and mind-bending work that endures and shapes generations. Our passion for discovery, and excitement for defining the future of tech, is what builds our strong culture around solving problems for clients and seeing the real world impact that you can make. IBM's product and technology landscape includes Research, Software, and Infrastructure. Entering this domain positions you at the heart of IBM, where growth and innovation thrive. Your role and responsibilities Research Scientist position at IBM India Research Lab is a challenging, dynamic and highly innovative role, where you will be responsible for coming up with new innovative ideas, developing solutions working as a team, building prototypes, publishing research papers and demonstrating the value of your ideas in an enterprise setting. Some of our current areas of work where we are actively looking for top researchers are: Optimized runtime stacks for foundation model workloads including fine-tuning, inference serving and large-scale data engineering, with a focus on multi-stage tuning including reinforcement learning, inference-time compute, and data preparation needs for complex AI systems. Optimizing models to run on multiple accelerators including IBM’s AIU accelerator leveraging compiler optimizations, specialized kernels, libraries and tools. Innovative use cases that effectively leverage the infrastructure and models to deliver value Pre-training language and multi-modal foundation models working with large scale distributed training procedures, model alignment, and creating specialized pipelines for various tasks including effective LLM-generated data pipelines. Required education Bachelor's Degree Required technical and professional expertise You Should Have One Or More Of The Following A master’s degree in computer science, AI or related fields from a top institution 0-8 years of experience working with modern ML techniques including but not limited to model architectures, data processing, fine-tuning techniques, reinforcement learning, distributed training, inference optimizations Experience with big data platforms like Ray and Spark Experience working with Pytorch FSDP and HuggingFace libraries Programming experience in one of the following: Python, web development technologies Growth mindset and a pragmatic attitude Preferred Technical And Professional Experience Peer-reviewed research at top machine learning or systems conferences Experience working with pytorch.compile, CUDA, triton kernels, GPU scheduling, memory management Experience working with open-source communities About Business Unit IBM Research is the organic growth engine of IBM and an innovation engine for our customers and partners. As part of this mission, IBM Research anticipates and examines 'What's Next in Computing' to ultimately create and integrate the technologies the world relies upon to solve big challenges and unlock new opportunities. We create and pioneer new markets for IBM, our partners and customers as exemplified in our ongoing quest to reach practical and large-scale quantum computing. Across IBM Research, we realize the power and potential to accelerate discovery with our partners and clients by combining the power of high performance computing, AI, and Quantum, all integrated through the hybrid cloud. YOUR LIFE @ IBM In a world where technology never stands still, we understand that, dedication to our clients success, innovation that matters, and trust and personal responsibility in all our relationships, lives in what we do as IBMers as we strive to be the catalyst that makes the world work better. Being an IBMer means you’ll be able to learn and develop yourself and your career, you’ll be encouraged to be courageous and experiment everyday, all whilst having continuous trust and support in an environment where everyone can thrive whatever their personal or professional background. Our IBMers are growth minded, always staying curious, open to feedback and learning new information and skills to constantly transform themselves and our company. They are trusted to provide on-going feedback to help other IBMers grow, as well as collaborate with colleagues keeping in mind a team focused approach to include different perspectives to drive exceptional outcomes for our customers. The courage our IBMers have to make critical decisions everyday is essential to IBM becoming the catalyst for progress, always embracing challenges with resources they have to hand, a can-do attitude and always striving for an outcome focused approach within everything that they do. Are you ready to be an IBMer? About Ibm IBM’s greatest invention is the IBMer. We believe that through the application of intelligence, reason and science, we can improve business, society and the human condition, bringing the power of an open hybrid cloud and AI strategy to life for our clients and partners around the world. Restlessly reinventing since 1911, we are not only one of the largest corporate organizations in the world, we’re also one of the biggest technology and consulting employers, with many of the Fortune 50 companies relying on the IBM Cloud to run their business. At IBM, we pride ourselves on being an early adopter of artificial intelligence, quantum computing and blockchain. Now it’s time for you to join us on our journey to being a responsible technology innovator and a force for good in the world. IBM is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status. Other Relevant Job Details When applying to jobs of your interest, we recommend that you do so for those that match your experience and expertise. Our recruiters advise that you apply to not more than 3 roles in a year for the best candidate experience. For additional information about location requirements, please discuss with the recruiter following submission of your application. Job Title Research Scientist Job ID 25934 City / Township / Village BANGALORE State / Province Karnataka Country India Work arrangement Hybrid Area of work Research Employment type Regular Position type Professional Travel required No Travel Company (0063) IBM India Private Limited Shift General (daytime) Is this role a commissionable/sales incentive based position? No Apply now Show more Show less

Summary: Contribute to the enhancement and maintenance of one or more Charles River IMS modules or components as a senior member of an agile scrum team. Provide engineering troubleshooting assistance to customer support teams and other development teams within Charles River. Responsibilities: Work under minimal supervision to analyze, design, develop, test, and debug small to medium software enhancements and solutions within Charles River’s business and technical problem domains Collaborate with Business Analysts and Product Managers to turn business requirements of moderate complexity into working and sustainable software Participate in the design of product architecture within the team’s scope of responsibility Develop, test, debug, and implement software programs, applications and projects using Java, C#, SQL, JavaScript, or other related software engineering languages Provide thoughtful insight and suggestions in code reviews Write unit and automation tests to ensure a high quality end product Conduct manual tests to ensure a high quality end product Contribute to written design and API documentation, and participate in customer documentation process Actively participate in the agile software development process by adhering to the CRD scrum methodology including attending all daily standups, sprint planning, backlog grooming, and retrospectives Participate in cross-team group activities to complete assignments Qualifications: Education: B.S. degree (or foreign education equivalent) in Computer Science, Engineering, Mathematics, and Physics or other technical course of study required. MS degree strongly preferred. Experience: 4 to 7 years of progressively responsible professional software engineering experience preferably in a financial services product delivery setting 2 to 5 years of experience in financial services developing solutions for Portfolio Management, Trading, Compliance, Post-Trade, IBOR or Wealth Management is strongly desired Demonstrated experience with object-oriented programming, compiler or interpreter technologies, embedded systems, operating systems, relational databases (RDBMS), scripting and new/advanced programming languages Able to contribute to design specs with some assistance from senior staff Able to work on small to medium projects with little to no supervision and on more complex tasks with moderate oversight Very good written and verbal communication skills Able to work well with peers in a collaborative team environment A minimum of 3 years working with an Agile development methodology strongly desired Supervisory Responsibility: Individual Contributor Team Lead Manager of Managers

Summary: Act as a front-end engineer responsible for the enhancement and maintenance of one or more Alpha/Charles River Development modules or components of an agile scrum team. Provide engineering troubleshooting assistance to customer support teams and other development teams within Charles River. Responsibilities: Analyze, design, develop, test, and debug large and complex software enhancements and solutions within Charles River’s business and technical problem domains including modifications to core frameworks and other primary facilities critical to system operation Collaborate with Business Analysts and Product Managers to create simple and sustainable software solutions for complex problems Direct problem solving for projects or major phases of projects to resolve software technical issues Develop, test, debug, and implement software programs, applications and projects using C#, JavaScript, TypeScript, React or other related software engineering languages as well as keeping abreast of emerging technologies impactful to CRDs business Provide informed guidance and critical analysis of proposed changes during code reviews Write unit and automation tests to ensure a high quality end product Identify ways of improving development test methodologies contribute to and related test methodology frameworks Conduct manual tests to ensure a high quality end product Provide troubleshooting on large, mission critical client implementations Engage in the agile software development process by adhering to and advancing the CRD scrum methodology, including attending all daily standups, sprint planning, backlog grooming, and retrospectives Plan and coordinate cross-team activities groups to complete assignments Junior engineers should expect critique and guidance on designs. Mid-level engineers will demonstrate more independence of design and development. Senior-level engineers are expected to drive technical excellence, coach and inform application level architectures and roadmaps. Qualifications: Recommended Education: B.S. degree (or foreign education equivalent) in Computer Science, Engineering, Mathematics, and Physics or other technical course of study required. MS degree strongly preferred. Recommended Experience: Experience with Single Page Application (SPAs) using React and Angular. Experience with prominent React packages and best practices, including Redux and RxJs. Knowledge of JavaScript with extensive experience in ReactJS and Typescript Familiarity with test standard and popular supporting frameworks such as Jest, Cypress, and Jasmine Familiarity with the NodeJS ecosystem, including NPM and/or Yarn. Experience delivering single page applications in cloud-based deployments with major cloud vendors (Azure preferred) Experience with object-oriented programming (JAVA and/or C#), compiler or interpreter technologies, embedded systems, operating systems, relational databases (RDBMS), scripting and new/advanced programming languages Experience in financial services developing solutions for Portfolio Management, Trading, Compliance, Post-Trade, IBOR or Wealth Management is strongly desired Demonstrated problem solving abilities involving multi-tiered, high-performance database applications Demonstrated ability to design and develop simple software solutions to business and technical problems of high complexity Outstanding written and verbal communication skills Able to work well with peers in a collaborative team environment A minimum of 3 years working with an Agile development methodology Supervisory Responsibility: Individual Contributor Team Lead Manager of Managers Travel: May be required on a limited basis.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a passion for cutting-edge technology and innovation. With 3-12 years of experience, you bring a wealth of knowledge in CMOS memory design and circuit implementation. Your expertise lies in developing non-volatile memories or SRAM. You are proficient in schematic entry, circuit simulation, layout planning, and design verification. You thrive in a collaborative environment, interfacing with CAD and Frontend engineers to drive memory compiler automation and EDA model generation. Your attention to detail ensures the highest quality in circuit and physical layout design. Self-motivated and self-directed, you demonstrate excellent analytical and problem-solving skills. You are adept at programming in C-Shell or Perl. Your strong command of English, both verbal and written, enables you to communicate effectively with team members and stakeholders. You are committed to continuous learning and professional growth, and you bring professionalism, critical thinking, and a focus on future goals to your work. Inclusion and diversity are important to you, and you contribute to a collaborative and inclusive work environment. What You’ll Be Doing: Develop CMOS embedded non-volatile memories such as MRAM and RRAM. Design architecture and circuit implementation, focusing on high speed, low power, and high-density designs. Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation. Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow. Perform design verification and drive physical layout design and verification. Provide support and/or perform other duties as assigned and required. The Impact You Will Have: Contribute to the development of high-performance silicon chips and software content. Enhance the efficiency and performance of our CMOS non-volatile memory designs. Drive innovation in high speed, low power, and high density memory designs. Ensure the highest quality in circuit development and physical layout design. Collaborate effectively with CAD and Frontend engineers to streamline automation and verification processes. Support the continuous improvement and advancement of our memory design technology. What You’ll Need: Bachelor’s or Master’s degree in Electrical Engineering, Telecommunication, or related fields. Proficiency in CMOS memory design (NVM or SRAM), circuit simulation, memory layout designs, layout parasitic extraction, and layout verification tools and debugging techniques. Basic circuit know-how of Charge Pump, Voltage Regulator, Current Mirror, Reference voltage and current, Comparators preferred Programming capability in C-Shell or Perl Strong analytical and problem-solving skills with attention to detail. Experience in developing documents, reports, or presentations for a range of tasks. Who You Are: Self-motivated, self-directed, detail-oriented, and well-organized. Possess excellent analytical, problem-solving, and negotiation skills. Capable of leading and mentoring trainees and junior engineers, as well as managing projects. Strong command of English, both verbal and written. Exhibit strong interpersonal communication and teamwork skills. Professional, critical/logical thinker, and focused on future goals. Highly committed to continuous learning and professional development. The Team You’ll Be A Part Of: You will be a key member of our innovative R&D Engineering team, focused on developing cutting-edge CMOS embedded non-volatile memories (MRAM/RRAM). Our team thrives on collaboration and continuous improvement, working together to achieve technological advancements that shape the future. You will have the opportunity to lead and mentor junior engineers, contributing to a culture of learning and excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

2–4 years of experience in ASIC Physical Design and Timing Analysis. Hands-on expertise with tools such as: Physical Design: Innovus, ICC2, Fusion Compiler, or similar STA: PrimeTime, Tempus Physical Verification: Calibre, Pegasus Open position - PD- 2-4(Chennai) STA - Top level or Fullchip - 4+ Years (Bangalore/Pune/Hyderabad) Notice period - immediate - 30 days Show more Show less

Radiant Semiconductors is a global player in Semiconductor Industry Founded in 2018, offering tailored semiconductor solutions to meet clients' needs, Headquarters in Bengaluru, Hyderabad and USA. Our services are RTL Design, ASIC Verification, Physical Design, DFT, Analog Layout, Analog Design and Physical Verification. Our dedicated and experienced team of engineers ensures delivery of high-quality results to accelerate clients' success. Trust in Radiant to illuminate your path to success. Why Radiant? 🌟 Competitive Salary & Benefits 📈 Career Growth Opportunities 🤝 Collaborative Work Environment 🎯 Cutting-Edge Projects We have Job Opportunity for Analog Layout Engineer Experience – 3 to 8 Yrs Location – Noida Availability – Immediate to 15 Days Job Description Design and implement analog layouts for high-performance circuits (e.g., amplifiers, ADCS, DACS, voltage regulators) using TSMC/Samsung 7nm and below nodes. Perform design rule checks (DRC), layout versus schematic (LVS), and electrical rule checks (ERC) to ensure design compliance. Required Skills: Strong experience in analog layout design at advanced nodes (TSMC/Samsung 7nm and below). Proficiency in layout tools like Cadence Virtuoso, Synopsys IC Compiler, or similar. Understanding of layout-dependent effects (LDE) and its impact on performance. Knowledge of parasitic extraction, simulation, and optimization. Familiarity with design for manufacturability (DFM) techniques. Knowledge on Basic SKILL/PERL. Show more Show less

About Us: Classiq Technologies, the world’s leading quantum computing software startup based in Tel Aviv, Israel. We provide an all-encompassing platform (IDE, high-level language, compiler, and OS), supported by 70 patents, as a gateway to quantum computing, taking users from algorithm design to execution. The high-level descriptive quantum software development environment and Classiq’s high-level language Qmod, capture the programmer’s functional intent and automate quantum programming. Classiq’s core technology, algorithmic quantum circuit compilation, is engineered to power the quantum ecosystem of today and tomorrow by ensuring your quantum code is scalable and implementable. Backed by investors such as HPE, HSBC, Samsung, Intesa Sanpaolo and NTT, Classiq’s world-class team of scientists and engineers has distilled decades of quantum expertise into its groundbreaking quantum engine technology. We recently raised $110 million in our Series C round, bringing our total funding to $173 million. Role Description: We are looking for a dynamic and entrepreneurial Commercial Director to lead our business growth in South Korea. This individual will be responsible for achieving revenue targets in the region, while identifying and nurturing key partnerships with local system integrators, quantum ecosystem players, academia, and government initiatives to scale both revenue streams and platform adoption in the region. In this role, you will work closely with local enterprises, consultancies, system integrators, cloud providers, and academic institutions, as well as collaborate with internal cross-functional teams, particularly our technical and product teams. Your efforts will be critical in building scalable and sustainable revenue streams for Classiq in the region. This position reports directly to the Managing Director, Japan & APAC, based in Tokyo, Japan. Responsibilities: Revenue Ownership: Drive new business and upsell opportunities to meet or exceed annual revenue targets within South Korea. Go-to-Market Execution: Define and implement local GTM strategies aligned with global goals; prioritize customer segments (commercial, academic, and public sector). Partnership Development: Establish and manage strategic relationships with local ecosystem partners, including system integrators, cloud providers, research institutions, and government agencies. Pipeline Management: Build and manage a strong pipeline of opportunities, from prospecting to closing, using CRM tools and structured sales processes. Customer Engagement: Act as a trusted advisor to customers and prospects, demonstrating Classiq’s value in solving real-world quantum computing problems. Cross-Functional Collaboration: Work closely with Product, Marketing, Engineering, and Customer Success to ensure regional feedback is incorporated and customers are supported. Market Intelligence: Stay current on quantum developments in South Korea and provide insights to inform strategy and roadmap. Requirements: 15+ years of experience in enterprise software sales, business development, or commercial leadership roles, preferably in deep-tech or emerging technology sectors. Strong network in South Korea’s tech ecosystem (especially enterprise, academic, or government verticals). Proven track record of meeting/exceeding revenue targets and building partnerships. Self-starter with the ability to work independently and thrive in a fast-paced, evolving environment. Excellent communication, negotiation, and relationship management skills. Knowledge of quantum computing or adjacent technologies is a strong advantage, but not mandatory. Fluency in English and Korean language What We Offer: Opportunity to shape the quantum computing industry from the frontlines. A collaborative and international work environment. Competitive compensation package with performance-based incentives. Access to world-leading technology and thought leadership. Join us at Classiq and be part of a pioneering team shaping the future of quantum computing. If you are passionate about quantum technology and have the skills and experience we are looking for, we would love to hear from you. Show more Show less

Summary Contribute to the enhancement and maintenance of one or more Charles River IMS modules or components as a senior member of an agile scrum team. Provide engineering troubleshooting assistance to customer support teams and other development teams within Charles River. Responsibilities Work under minimal supervision to analyze, design, develop, test, and debug small to medium software enhancements and solutions within Charles River’s business and technical problem domains Collaborate with Business Analysts and Product Managers to turn business requirements of moderate complexity into working and sustainable software Participate in the design of product architecture within the team’s scope of responsibility Develop, test, debug, and implement software programs, applications and projects using Java, C#, SQL, JavaScript, or other related software engineering languages Provide thoughtful insight and suggestions in code reviews Write unit and automation tests to ensure a high quality end product Conduct manual tests to ensure a high quality end product Contribute to written design and API documentation, and participate in customer documentation process Actively participate in the agile software development process by adhering to the CRD scrum methodology including attending all daily standups, sprint planning, backlog grooming, and retrospectives Participate in cross-team group activities to complete assignments Qualifications Education: B.S. degree (or foreign education equivalent) in Computer Science, Engineering, Mathematics, and Physics or other technical course of study required. MS degree strongly preferred. Experience 4 to 7 years of progressively responsible professional software engineering experience preferably in a financial services product delivery setting 2 to 5 years of experience in financial services developing solutions for Portfolio Management, Trading, Compliance, Post-Trade, IBOR or Wealth Management is strongly desired Demonstrated experience with object-oriented programming, compiler or interpreter technologies, embedded systems, operating systems, relational databases (RDBMS), scripting and new/advanced programming languages Able to contribute to design specs with some assistance from senior staff Able to work on small to medium projects with little to no supervision and on more complex tasks with moderate oversight Very good written and verbal communication skills Able to work well with peers in a collaborative team environment A minimum of 3 years working with an Agile development methodology strongly desired Supervisory Responsibility ☒ Individual Contributor ☐ Team Lead ☐ Manager of Managers Job ID: R-773916 Show more Show less

Job Description: Required Experience/skill: Python based build tool development, validation, debugging, GUI creation, Visual studio, MinGW, embedded electronics EXPERIENCE: 4-7 YEARS To be a part of the EV software development team by learning and understanding the battery simulator or BECM module/features and support build tool development. Strong Python scripting knowledge, script debugging and validation skills, Visual studio/MinGW compiler knowledge, embedded electronics knowledge required. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Systems Engineering General Summary: Summary - We are seeking experts with a robust background in the field of deep learning (DL) to design state-of-the-art low-level perception (LLP) as well as end-to-end AD models, with a focus on achieving accuracy-latency Pareto optimality. This role involves comprehending state-of-the-art research in this field and deploying networks on the Qualcomm Ride platform for L2/L3 Advanced Driver Assistance Systems (ADAS) and autonomous driving. The ideal candidate must be well-versed in recent advancements in Vision Transformers (Cross-attention, Self-attention), lifting 2D features to Bird's Eye View (BEV) space, and their applications to multi-modal fusion. This position offers extensive opportunities to collaborate with advanced R&D teams of leading automotive Original Equipment Manufacturers (OEMs) as well as Qualcomm's internal stack teams. The team is responsible for enhancing the speed, accuracy, power consumption, and latency of deep networks running on Snapdragon Ride AI accelerators. A thorough understanding of machine learning algorithms, particularly those related to automotive use cases (autonomous driving, vision, and LiDAR processing ML algorithms), is essential. Research experience in the development of efficient networks, various Neural Architecture Search (NAS) techniques, network quantization, and pruning is highly desirable. Strong communication and interpersonal skills are required, and the candidate must be able to work effectively with various horizontal AI teams. Minimum Qualifications: Bachelor's degree in Computer Science, Engineering, Information Systems, or related field and 1+ years of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. OR Master's degree in Computer Science, Engineering, Information Systems, or related field and 1+ year of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. OR PhD in Computer Science, Engineering, Information Systems, or related field. Preferred Qualifications: Good at software development with excellent analytical, development, and problem-solving skills. Strong understanding of Machine Learning fundamentals Hands-on experience with deep learning network design and implementation. Ability to define network from scratch in PyTorch, ability to add new loss function, modify network with torch.fx. Adept at version control system like GIT. Experience in neural network quantization, compression, pruning algorithms. Experience in deep learning kernel/compiler optimization Strong communication skills Principal Duties And Responsibilities: Applies Machine Learning knowledge to extend training or runtime frameworks or model efficiency software tools with new features and optimizations. Models, architects, and develops machine learning hardware (co-designed with machine learning software) for inference or training solutions. Develops optimized software to enable AI models deployed on hardware (e.g., machine learning kernels, compiler tools, or model efficiency tools, etc.) to allow specific hardware features; collaborates with team members for joint design and development. Assists with the development and application of machine learning techniques into products and/or AI solutions to enable customers to do the same. Develops, adapts, or prototypes complex machine learning algorithms, models, or frameworks aligned with and motivated by product proposals or roadmaps with minimal guidance from more experienced engineers. Conducts complex experiments to train and evaluate machine learning models and/or software independently. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3074561 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Systems Engineering Responsibilities General Summary: The Successful Candidate(s) Will Be Responsible For Development and productize Sensing Camera Firmware on Qualcomm chipsets for mobile/XR/Auto projects. Role is to develop embedded firmware for ISP HW that is targeted for different tiers of Qualcomm camera solutions. Programming language is C/C++ on DSP processor, so the role involves understanding the processor architecture/RTOS/peripherals/compiler/linker toolsets. Prototype the end-to-end use cases with Firmware Test bench for early verification of the FW/HW Collaborate with systems, software, hardware teams at various stages of chipset life during design/bring-up/validation/commercialization. Interaction with customer engineering teams to commercialize Qualcomm camera solutions with global OEMs, stabilize the existing solution for customer use-cases/requirements Relevant experience required in one or more of the following areas: Design and implement embedded firmware for embedded processors/microcontrollers Good understanding of image processing or computer vision fundamentals. Hands on knowledge\experience on camera/video/computer vision HW pipeline, development and optimization of firmware for performance, power consumption and memory usage. Solid C\C++ programming skills, multithreading and RTOS/OS concepts. Experience in device driver development, communication protocols(I2C, SPI, UART etc..) is plus Hands on experience on Q6 processors is a plus. Strong debugging skills to debug complex system level issues. Collaborate with cross-functional teams to design, implement, bring-up of new hardware and debug camera/multimedia/firmware integration issues and features for mobiles/XR/IOT use cases Good analytical and problem-solving skills. Looking for 2-4 years of relevant industry experience Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076235 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Working experience (2+ years) in preferably Memory design Compiler approach of developing embedded SRAM/ROM development Fundamental know how on bit cell and its characteristics (SNM, WM, Cell current, Standby current, data retention) Fundamentals of process variability and its effect on memory design Strong understanding of Digital/Memory circuit design/layouts Critical path modeling concept, various type of models ( RC, C, Pai, ladder, distributive, etc) Good knowledge of semiconductor physics in general. Knowledge of and affinity to IC technology and IP design is mandatory Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075616 Show more Show less

About the Role At Ceryneian, we’re building a next-generation, research-driven algorithmic trading platform aimed at democratizing access to hedge fund-grade financial analytics. Headquartered in California, Ceryneian is a fintech innovation company dedicated to empowering traders with sophisticated yet accessible tools for quantitative research, strategy development, and execution. Our flagship platform is currently under development. As a Backend Engineer , you will play a foundational role in designing and building the core trading engine and research infrastructure from the ground up. Your work will focus on developing performance-critical components that power backtesting, real-time strategy execution, and seamless integration with brokers and data providers. You’ll be responsible for bridging core engine logic with Python-based strategy interfaces, supporting a modular system architecture for isolated and scalable strategy execution, and building robust abstractions for data handling and API interactions. This role is central to delivering the reliability, flexibility, and performance that our users will rely on in fast-moving financial markets. We are a remote-first team and are open to hiring exceptional candidates globally. Core Tasks Build and maintain the trading engine core for execution, backtesting, and event logging. Develop isolated strategy execution runners to support multi-user, multi-strategy environments. Implement abstraction layers for brokers and market data feeds to offer a unified API experience. Bridge the core engine language with Python strategies using gRPC, ZeroMQ, or similar interop technologies. Implement logic to parse and execute JSON-based strategy DSL from the strategy builder. Design compute-optimized components for multi-asset workflows and scalable backtesting. Capture real-time state, performance metrics, and slippage for both live and simulated runs. Collaborate with infrastructure engineers to support high-availability deployments. Top Technical Competencies Proficiency in distributed systems, concurrency, and system design. Strong backend/server-side development skills using C++ , Rust , C# , Erlang , or Python . Deep understanding of data structures and algorithms with a focus on low-latency performance. Experience with event-driven and messaging-based architectures (e.g., ZeroMQ , Redis Streams ). Familiarity with Linux-based environments and system-level performance tuning. Bonus Competencies Understanding of financial markets, asset classes, and algorithmic trading strategies. 3–5 years of prior backend experience. Hands-on experience with backtesting frameworks or financial market simulators. Experience with sandboxed execution environments or paper trading platforms. Advanced knowledge of multithreading, memory optimization, or compiler construction. Educational background from Tier-I or Tier-II institutions with strong computer science fundamentals, a passion for scalable system design, and a drive to build cutting-edge fintech infrastructure. What We Offer Opportunity to shape the backend architecture of a next-gen fintech startup. Competitive compensation with performance-based bonuses. Flexible working hours and a remote-friendly environment for candidates across the globe. Exposure to financial modeling, trading infrastructure, and real-time applications. Collaboration with a world-class team from Pomona , UCLA , Harvey Mudd , and Claremont McKenna . Ideal Candidate You’re a backend-first thinker who’s obsessed with reliability, latency, and architectural flexibility. You enjoy building scalable systems that transform complex strategy logic into high-performance, real-time trading actions. You think in microseconds, architect for fault tolerance, and build APIs designed for developer extensibility. Show more Show less

About the Role At Ceryneian, we’re building a next-generation, research-driven algorithmic trading platform aimed at democratizing access to hedge fund-grade financial analytics. Headquartered in California, Ceryneian is a fintech innovation company dedicated to empowering traders with sophisticated yet accessible tools for quantitative research, strategy development, and execution. Our flagship platform is currently under development. As a Backend Engineer , you will play a foundational role in designing and building the core trading engine and research infrastructure from the ground up. Your work will focus on developing performance-critical components that power backtesting, real-time strategy execution, and seamless integration with brokers and data providers. You’ll be responsible for bridging core engine logic with Python-based strategy interfaces, supporting a modular system architecture for isolated and scalable strategy execution, and building robust abstractions for data handling and API interactions. This role is central to delivering the reliability, flexibility, and performance that our users will rely on in fast-moving financial markets. Core Tasks Build and maintain the trading engine core for execution, backtesting, and event logging. Develop isolated strategy execution runners to support multi-user, multi-strategy environments. Implement abstraction layers for brokers and market data feeds to offer a unified API experience. Bridge the core engine language with Python strategies using gRPC, ZeroMQ, or similar interop technologies. Implement logic to parse and execute JSON-based strategy DSL from the strategy builder. Design compute-optimized components for multi-asset workflows and scalable backtesting. Capture real-time state, performance metrics, and slippage for both live and simulated runs. Collaborate with infrastructure engineers to support high-availability deployments. Top Technical Competencies Proficiency in distributed systems, concurrency, and system design. Strong backend/server-side development skills using C++ , Rust , C# , Erlang , or Python . Deep understanding of data structures and algorithms with a focus on low-latency performance. Experience with event-driven and messaging-based architectures (e.g., ZeroMQ , Redis Streams ). Familiarity with Linux-based environments and system-level performance tuning. Bonus Competencies Understanding of financial markets, asset classes, and algorithmic trading strategies. 0–3 years of prior DevOps experience (containerization, build pipelines, Infrastructure as Code). Hands-on experience with backtesting frameworks or financial market simulators. Experience with sandboxed execution environments or paper trading platforms. Advanced knowledge of multithreading, memory optimization, or compiler construction. Educational background from Tier-I or Tier-II institutions in India with strong computer science fundamentals, a passion for scalable system design, and a drive to build cutting-edge fintech infrastructure. What We Offer Opportunity to shape the backend architecture of a next-gen fintech startup. A collaborative, technically driven culture. Competitive compensation with performance-based bonuses. Exposure to financial modeling, trading infrastructure, and real-time applications. Collaboration with a world-class team from Pomona , UCLA , Harvey Mudd , and Claremont McKenna . Ideal Candidate You’re a backend-first thinker who’s obsessed with reliability, latency, and architectural flexibility. You enjoy building scalable systems that transform complex strategy logic into high-performance, real-time trading actions. You think in microseconds, architect for fault tolerance, and build APIs designed for developer extensibility. Show more Show less

o Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks o Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build o Basic Timing understanding to independently analyze timing paths o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage o Basic equivalency check understanding. Good to have Conformal LEC experience. o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks Show more Show less

Permanent work from home is offered *Candidates who are well versed with French Language *Outstanding verbal & listening skills in English is must *Freshers are welcomed *Salary upto 10Lac PA *Rotational shifts *2 week offs Barkha @ 8851644223 Required Candidate profile Need only B2 Certified candidates *Any dropout/12th pass/UG & Graduate (Fresher & experienced) both can apply *Work from home *Telephonic Interview *Experienced candidates will have added advantage

Overview We are looking for a Software Engineer-2 to help us build and evolve the core backend systems that power our next-generation tax platform. This role is ideal for someone who thrives at the intersection of high-scale backend engineering , and language runtime integration . You will work on the systems that underpin our business-critical tax calculation engines, contributing to the scalability, reliability, and performance of services that support critical tax logic execution. What you'll bring 3+ years of professional experience in backend or systems-level software development. Proven experience building scalable, distributed backend systems in production environments. Strong programming skills in Java, C# and/or C++. Low-level experience with JVM, CLR, or other language runtime environments. Solid understanding of performance optimization, multithreading, memory management, and networking. Experience with modern CI/CD pipelines, observability tools, and DevOps best practices. Preferred Qualifications Exposure to compiler or interpreter internals is a plus, but not required. Familiarity with containerized environments (Docker, Kubernetes) and cloud platforms. Knowledge of language tooling, custom DSLs, or domain-specific platforms is a bonus. Strong communication skills and a collaborative, growth-oriented mindset. How you will lead Design, build, and scale backend systems that support our tax development language and runtime. Contribute to the modernization and integration of legacy systems with modern runtimes (e.g., JVM, CLR). Implement performance-critical components using Java and C++ in a distributed, service-oriented architecture. Collaborate with compiler/runtime engineers and AI/ML teams to support intelligent language tooling. Ensure system reliability, observability, and operational excellence in production environments. Write clean, well-tested code and participate in design and code reviews. Mentor junior engineers and contribute to the technical growth of the team. Show more Show less

Position: DFT Engineer (ASIC) Experience: 2 to 8 years Location: Hyderabad Job Summary: We are seeking a talented DFT (Design for Testability) Engineer with expertise in ASIC design and a strong background in EDA tools such as Synopsys . The ideal candidate will have hands-on experience in developing, implementing, and optimizing DFT architectures to ensure high test coverage and manufacturability. Key Responsibilities: Design and implement DFT methodologies for ASIC projects, including scan insertion, ATPG, and BIST. Work with EDA tools from Synopsys (such as TetraMAX, DFT Compiler, TestMAX, etc.) to achieve high test coverage and efficient test solutions. Develop and validate test strategies for scan-based testing, MBIST, and boundary scan. Collaborate with RTL and physical design teams to ensure seamless DFT integration. Perform fault simulations , analyze test results, and drive improvements in test efficiency. Optimize DFT architectures for low-power, high-performance, and manufacturability . Support silicon bring-up and debug of test patterns on actual hardware. Work closely with foundries and test teams to ensure smooth production testing. Keep up to date with the latest DFT methodologies, trends, and innovations. Required Skills & Qualifications: 4+ years of experience in DFT implementation for ASIC designs. Proficiency in Synopsys EDA tools for test implementation and validation. Solid understanding of digital design, scan insertion, ATPG, and BIST . Experience with fault modeling, test coverage analysis, and debugging . Strong scripting skills in Python, Perl, or TCL for automation. Ability to work in a multi-disciplinary team and communicate technical concepts effectively. Preferred Qualifications: Experience with Post-Silicon Debug and ATE Testing . Knowledge of Verilog/VHDL and simulation tools . Familiarity with industry-standard DFT flows and methodologies . Show more Show less

Job Description Job Description : We are looking for a highly skilled & experienced PD expert to join our Flows & Methodologies team. The candidate must be experienced, hands-on and have robust understanding of physical design including Floorplan, Power-plan, Place & Route, UPF, CTS. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope Of Responsibilities As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define Physical Design methodology to meet SoC & IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC Place & Route, UPF, Formal Verification, Floorplan & Power-Plan You will work with EDA Vendors to proactively review latest tools and flows offerings in Physical Implementation domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. Work with EDA Vendors to review and resolve blocking issues You will be an actor of change for deploying new tools & methodologies across the organization Qualifications Specific skills & knowledge : Bachelor or Master or Ph.D. in Electronics Engineering and specialization in VLSI domain 10+ years of hands-on experience in Physical Design : UPF, Formal & Physical verification, floorplan, power-plan, Place & Route Proven experience in delivering physical implementation closure methodology ensuring timing & physical convergence Experience in Synopys & Cadence tool sets (Fusion Compiler, Innovus) , low geometry node issues, working with EDA team in reviewing & resolving blocking issues in project Experience in customizing flows & methodology to meet low power & area objectives of SoC Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can – do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Additional Information Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com. Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com. Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Show more Show less

IPrincipal P/RTL Design Engineer for ARM CMN Fabric and Neoverse Bangalore / Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Principal IP/RTL Design Engineer for ARM CMN Fabric and Neoverse Position Overview Seeking an IP/RTL Design Engineer with 10+ years of experience to design IP/RTL for ARM Neoverse-based SoCs, focusing on CMN fabric, using Socrates for configuration, targeting AI/HPC datacenter applications. Key Responsibilities Design IP blocks for ARM Neoverse SoCs, integrating CMN fabric (e.g., CMN-700/S3) for cache coherence and interconnect. Develop Verilog/SystemVerilog RTL for high-performance, low-latency designs. Configure CMN topologies using Arm Socrates for optimized performance and scalability. Implement protocols like AMBA CHI, ACE, CXL, PCIe for coherent interconnects. Optimize designs for bandwidth, latency, and power in AI/HPC workloads. Support synthesis, timing closure, and FPGA prototyping and Design Verification team Document microarchitecture and design specifications. Required Qualifications Education: BS/MS/PhD in Electronics/Computer Engineering. Experience: 10+ years in ASIC/FPGA IP/RTL design, 5+ years with ARM Neoverse and CMN fabrics (e.g., CMN-600/700/S3). Skills: Expert in Verilog/SystemVerilog RTL design. Deep knowledge of ARM Neoverse (V1/V3/N2/N3) and CMN interconnects. Deep understanding in system architecture, coherence and cache Experience with Arm Socrates for CMN configuration. Proficiency in AMBA CHI, CXL, PCIe, or CCIX protocols. Familiarity with synthesis and timing tools (e.g., Synopsys Design Compiler). Experience with AI/HPC or datacenter SoC design. Knowledge of DDR5, HBM3, or chiplet-based architectures. Familiarity with UALink or Ultra Ethernet. Strong problem-solving and collaboration skills. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Principal IP/RTL Design Engineer for Ethernet Switch Bangalore / Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Position Overview IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols such as InfiniBand, NVLink, Infinity Fabric, with a focus on delivering high-performance, low-latency solutions for large-scale AI workloads. Key Responsibilities Design and optimize IP blocks (MAC, PCS, packet processors) for Ethernet switches. Develop synthesizable RTL (Verilog/SystemVerilog) meeting performance and timing goals. Optimize designs for low latency, high throughput, and power efficiency. Implement Ethernet protocols (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Apply knowledge of InfiniBand, NVLink, or similar protocols for feature implementation. Use P4 or related languages for programmable packet processing. Collaborate with teams for synthesis, timing closure, and IP integration. Document designs and stay updated on AI networking trends. Required Qualifications Education: BS/MS/PhD in Electrical or Computer Engineering. Technical Skills: Proficient in Verilog/SystemVerilog for design. Knowledge of Ethernet (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Experience with InfiniBand, NVLink, or similar protocols. Proficiency in P4 or programmable data plane languages. Knowledge of UALink, Ultra Ethernet, or RDMA/RoCE. Familiarity with power optimization or SDN. Familiarity with synthesis (e.g., Synopsys Design Compiler) and timing tools. Soft Skills: Strong problem-solving, communication, and teamwork skills. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Company Description Mirafra Technologies is a technology consulting company specializing in semiconductor design services, embedded software development, and digital transformation. Headquartered in Bangalore, with offices in Hyderabad, Chennai, Pune, the US, Singapore, and Sweden, Mirafra boasts a team of over 1,000 engineers. Our engineers have a proven track record of successfully delivering hundreds of projects and solving the toughest problems. We prioritize hiring top talent and provide ongoing training and development. Mirafra maintains long-term engagements with clients, including startups and leading semiconductor companies. Role Description This is a full-time on-site role located in Bangalore. The candidate will be responsible for developing, maintaining, and optimizing C/C++ based compiler tools. Day-to-day tasks include working with Linux environments, understanding computer architecture, and integrating hardware design flows. The role also involves troubleshooting issues, providing training to team members, and managing projects. Qualifications Proficiency in C/C++ programming and compiler tool development Strong understanding of Linux environments and computer architecture Experience with hardware design flows and integration Troubleshooting and Communication skills Skills in Training and Project Management Minimum of 4 years of relevant experience Bachelor's or Master's degree in Computer Science, Engineering, or related field Strong analytical and problem-solving skills Ability to work independently and as part of a team Experience in the semiconductor industry is a plus Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER Full Chip Low Power Design and Signoff Engineer Overview WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities MTS SILICON DESIGN ENGINEER ( Full Chip Low Power Design & Signoff Engineer ) The Role As a member of the Strategic Silicon Solution Group Full Chip Low Power Design and Signoff team, you will help bring to life cutting-edge designs. You will work closely with the Full Chip/Subsystem Floorplan / Netlist, Tile/Block/Partition level Physical Design, Full Chip Static Timing Analysis and Constraints teams, to achieve first pass silicon success. The Person A successful candidate should have minimum 8 to 15 years approximate work experience. He will work closely with Fellows, Principal Engineers, Architects, collaborate with cross functional worldwide teams across Physical Design, Timing Analysis, Synthesis, Physical Verification, Power design/signoff, and mentor/coach/guide Design Engineers. The candidate should be highly accurate and detail-oriented, possessing good communication and problem-solving skills. Key Responsiblities Expertise in Full Chip Power Delivery Network Design, Implementation and Signoff Must have good understanding of RDL & Power grid design. Must know the NPV Static, Dynamic & SEM Run. Must have good experience of Vectored dynamic, CPM & Ramp up time analysis and current analysis. Must have experience on Full chip, Sub-system level & tile/block/partition level EMIR analysis and signoff Should have good knowledge of package level EMIR analysis. Expertise in low power design and implementation such as clock gating, power gating, power switch implementation and other low power techniques to reduce total power consumption. Should have good knowledge on simulation of special cell’s with target power analysis. Should possess good knowledge of Power switch insertion, Secondary PG design towards improvising PPA. Mentor/coach/guide design engineers to achieve the project goal. Should have hands on experience on tools like Redhawk-SC, ICC2 & Prime Time or equivalent industry standard tools. Should have good scripting experience in Shell, Python, Perl, TCL, UNIX Preferred Experience Understanding of ICC2 or Fusion Compiler Physical Design flows/methodologies or equivalent tools. Expertise on tool expected. Experience in TCL/Python and other languages needed. Should be strong in scripting and decode/debug old existing scripts. Experience with RHSC, PTPX, ICC2, Fusion Compiler Experience with mentoring a team on lower tech node (5/3nm) projects on PDN (EMIR) Experience in Full Chip/Sub-system level Physical Verification including DRC, LVS, DFM, ESD, High voltage checks etc, Academic Credentials Bachelors or Master's degree in Computer/Electronics/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Harman International is seeking highly driven and self-motivated RTL Design Engineers to join our cutting-edge semiconductor design team in Bangalore. This is a critical engineering role focused on synthesis, logic equivalence checking (LEC), and constraint development for high-performance digital IPs. You will be responsible for collaborating closely with architects, RTL developers, and other cross-functional teams to implement industry-standard design flows and methodologies. Responsibilities The ideal candidate is someone who has a strong understanding of physical design-aware synthesis, timing analysis, floor planning, and power optimization for advanced SoC and IP-level designs. Were looking for individuals who thrive in a fast-paced environment, are capable of taking full ownership of their deliverables, and can work independently with minimal Responsibilities : Collaborate with RTL designers and chip architects to implement synthesis, LEC (logic equivalence checks), and SDC (Synopsys Design Constraints) for NXPs digital IP designs. Own and drive physical-aware synthesis flows, including floorplanning and power/performance trade-off analysis for high-performance IPs. Perform timing and power analysis on the database (db), improve timing closure strategies, and provide actionable feedback to RTL and verification teams. Conduct timing signoff and static timing analysis (STA) using industry tools such as Primetime. Establish and maintain flow automation scripts for synthesis and LEC to support robust design delivery processes. Create and maintain design recipes to optimize timing, area, and power, ensuring delivery meets project milestones and design targets. Communicate effectively with cross-functional team members including verification, physical design, and program management to ensure smooth project execution. Take ownership as an individual contributor or lead engineer on specific IPs or subsystems, managing synthesis schedules and task breakdowns. Deliver weekly project status reports, capturing progress, challenges, and metrics around timing closure, synthesis QoR (Quality of Results), and tool flow efficiency. Desired Skills And Experience Experience : 3 to 12 years of relevant industry experience in RTL synthesis, LEC, and timing constraint development at the IP or SoC level. Strong understanding of synthesis flows, including setup from scratch and working with large-scale digital designs. Proficiency in using synthesis tools such as Synopsys Fusion Compiler, Design Compiler, or Cadence Genus. Hands-on experience with floorplanning, power optimization, and constraint development for advanced node designs (7nm/5nm/FinFET preferred). Solid understanding of timing analysis, multi-mode/multi-corner analysis, and power/timing closure methodologies. Practical knowledge of LEC tools like Conformal or Formality for equivalence checking. Familiarity with P&R (Place and Route) flow concepts and their influence on synthesis and timing constraints. Scripting expertise in TCL, Perl, and Python to automate design flows and reporting. Exposure to industry tools like Primetime, Innovus, and IC Compiler. Ability to work independently or as a team lead with minimal supervision and clear accountability for deliverables. Strong documentation and communication skills to maintain flow manuals and collaborate across geographically distributed teams. Preferred Qualifications Bachelor's or Masters degree in Electronics and Communication Engineering, VLSI Design, Computer Engineering, or a related field. Exposure to advanced SoC design and verification environments. Experience working in product companies or semiconductor IDMs will be considered a plus. (ref:hirist.tech) Show more Show less

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description We are seeking a highly skilled and experienced Synthesis and Static Timing Analysis (STA) expert to join our semiconductor team. The ideal candidate will have a strong background in digital design and a deep understanding of synthesis and STA processes. This role involves working closely with cross-functional teams to ensure the successful implementation and optimization of digital designs. Key Responsibilities: Good Understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints Generation, UPF, Timing Closure and Signoff. Develop TCL scripts and design constraints to perform synthesis, DFT insertion, and static timing analysis. Interface for DFT strategy and implementation. Responsible for design convergence in timing and logic equivalence. Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, LEC, VCLP. Knowledge of scripting languages such as Perl, Python, or TCL. Qualifications Exp : 5 to 12 years of experience Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Show more Show less