2 Coherency Jobs

As a Verification Engineer at Google, you will play a crucial role in ensuring the functionality and performance of Google's custom silicon solutions. You will be responsible for verifying digital systems, including infrastructure IP, interconnects, caches, memory management, and system services. Your expertise will be instrumental in shaping the next generation of hardware experiences, delivering unmatched performance, efficiency, and integration. Your responsibilities will include planning and executing the verification of configurable Infrastructure IPs, interconnects, and memory subsystems. You will develop and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM). Additionally, you will create cross-language tools and scalable verification methodologies to ensure comprehensive testing coverage. To excel in this role, you should have a Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. You should possess experience in verifying digital systems using standard IP components/interconnects, such as microprocessor cores and hierarchical memory subsystems. Proficiency in Design Verification Test, SystemVerilog, Verilog, Computer Architecture, System On a Chip, C, C++, and Python is required. Experience in creating and using verification components and environments in standard verification methodology, scripting languages, and software development frameworks is essential. Preferred qualifications for this position include a Master's degree or PhD in Electrical Engineering or Computer Science, along with 3 years of experience in areas such as Caches Hierarchies, Coherency, Memory Consistency Models, DDR/LPDDR, PCIe, Packet Processors, Security, or Clock and Power Controllers. Experience with building verification methodologies spanning simulation, emulation, and Field Programmable Gate Array (FPGA) prototypes is advantageous. Knowledge of Interconnect Protocols (e.g., AHB, AXI, ACE, CHI, CCIX, CXL), performance verification of SOCs, pre-Silicon analysis, and post-Silicon correlation is also beneficial. Join our team at Google and be part of the innovation that drives the future of direct-to-consumer products. Your contributions will have a global impact, shaping products loved by millions worldwide. Embrace the opportunity to work on the verification of Google's System on a Chip (SOC) offerings, collaborating with hardware architects and design engineers to deliver cutting-edge hardware experiences. Your role will involve developing performance Virtual IP address (VIPs) for supported protocols, deploying verification stacks across diverse IPs, and building generalized system topology abstractions. Together, we will develop methodologies and tools to tackle complex challenges and advance technology for the betterment of society.,

Responsible for functional verification involving coherent and non-coherent IP designs. Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements. Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. Developing verification plans and driving functional coverage-driven verification closure of real designs. Debugging and resolving issues in verification environments to ensure robust and reliable verification processes. The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes. Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols. Driving innovation in the automotive sector by developing robust verification solutions for automotive systems. Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices. Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements. Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products. What You'll Need: B.E/B.Tech in Electrical Engineering/Electronics & Communications Engineering with 5-8 years of relevant experience, OR M.E/M.Tech in VLSI Design/Microelectronics with 4-8 years of relevant experience. Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. In-depth understanding of cache coherency protocols such as Protocol experience: Should have experience in any of the protocols, UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol. Experience in creating verification plans and achieving functional coverage-driven verification closure of real designs. Proficiency in writing scripts using Perl, Python, and Shell scripting.