2440 System Verilog Jobs - Page 9

As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Work on coverage driven module verification. - Strong proficiency in System Verilog and UVM. - Sound experience in testbench development including stimulus, agent, monitor, and checker. - Debug failures using Verdi and log files. - Develop c-based reference models inside the testbench. - Experience with assertion development. - Familiarity with EDA ...

Role Overview: You are required to have 2 to 15 years of experience and should have expertise in coverage driven module verification. You must be proficient in System Verilog, UVM, and have a strong background in testbench development including stimulus, agent, monitor, and checker. It is essential to be skilled in failure debugging using Verdi & log file, and have experience working with a c based reference model within the testbench. Additionally, you should have knowledge of assertion development, EDA tools like IUS, VCS, Verdi, scripting languages such as perl, Python, and be a good team player. Interaction with designers and other verification engineers is a key aspect of the role. Prev...

Role Overview: AlphaGrep Securities Private Limited, a proprietary trading firm specializing in algorithmic trading across global asset classes, seeks a "full stack" FPGA developer with a minimum of 3 years of industry experience in hardware development. The selected candidate will play a crucial role in building the hardware platform for low latency trading at AlphaGrep. You will be involved in every stage of hardware development and will be tasked with architecting and constructing FPGA based trading systems for our most latency critical strategies. Key Responsibilities: - Design, implement, test, integrate, and deliver low latency trading systems. - Develop low latency designs in Verilog/...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

General Summary: Job Description Analyze and evaluate GPU architecture/microarchitecture and workload for performance and power optimizations GPU power modeling and estimation for projection and correlation GPU workload analysis, profiling, and characterizations Analyze, model, and minimize GPU register, logic, memory, and clock power Develop and maintain tests for pre-silicon and post-silicon power verifications. Work closely with multiple teams such as RTL designer, architecture, design verification, compiler, driver, silicon implementation, and post-silicon teams Knowledge of Graphics architecture is a plus Preferred Qualifications: Master's or PhD degree or equivalent in Computer Enginee...

We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL ...

General Summary: Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 4-8 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and ...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience OR Master's degree in Computer Science, Electrical/Electronics Engineer...

General Summary: Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 8 to 10 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture ...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

Design and implement synthesis flows using Synopsys Design Compiler. Collaborate with cross-functional teams to alignmethodologywith design requirements. Drive innovation in SoC design methodologies, tools, and flows. Provide technical leadership and support to resolve RTL, DFT, and synthesis-related issues. Interface with EDA vendors to evaluate and integrate new tool features. Ensuremethodologyscalability and robustness across multiple projects. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSI Design. 5–8 years of hands-on experience with...

Formal verification planning and execution for complex IPs Formal Covergae closure and sign-off for these IPs PREFERRED EXPERIENCE: 8+ years of experience in Formal Property verification Experience in formal verification of CPU/GPU memory subsystems is desirable ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

Proficiency in RTL designs using Verilog/SystemVerilog/VHDL based on specifications. Solid understanding of digital design concepts, including pipelining, clock domain crossing (CDC), and reset strategies. Experience with industry-standard tools for synthesis, linting, and STA (e.g., Synopsys Design Compiler, Mentor Questa, or Cadence Genus). Collaborate with system architects to understand requirements and translate them into micro-architectures. Perform design optimization for performance, power, and area (PPA). Work with verification teams to define test plans and debug issues in simulations and emulation environments. Address synthesis, timing, and functional issues through RTL modificat...

Strong knowledge and experience in Scan Insertion, Compression, ATPG, Memory BIST and JTAG at IC level for mixed signal designs Experience in using Mentor DfT tools, and Synopsys simulator tools. Define DFT Strategy and Requirement Specification for the design DfT verification for gate-level and timing simulations Work cross-site with the design team to define and implement DfT. Hands-on experience in solving DfT problems, simulation failures, ATPG coverage, and DRC improvements. Work with the STA engineer to define timing constraints for DfT modes. Hands-on experience on Primetime will be required. Work with the Layout engineer to ensure DFT logic is implemented without issues. Support the ...

Your role and responsibilities Design and implement synthesis flows using Synopsys Design Compiler. Collaborate with cross-functional teams to align methodology with design requirements. Drive innovation in SoC design methodologies, tools, and flows. Provide technical leadership and support to resolve RTL, DFT, and synthesis-related issues. Interface with EDA vendors to evaluate and integrate new tool features. Ensure methodology scalability and robustness across multiple projects. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelors or Masters degree in Computer Science, Electronics Engineering, or VLSI Design. 5"“8...

About The Role Your Role As a Lead FPGA Verification Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for leading the RTL verification of FPGA-based designs from concept to tape-out. You will collaborate with design teams to understand architecture specifications and drive the development of robust verification environments using SystemVerilog and UVM. Your role will be pivotal in ensuring high-quality deliverables for Datacom or Aerospace applications. In this role, you will: Lead and own the RTL verification of FPGA-based designs. Define and drive FPGA verification plans and develop testbenches using SystemVerilog/UVM. Collaborate with design engine...

About The Role Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies.In this role, you will: Implement FPGA code on target hardware and test with system components and software. Perform RTL design, implementation, testing, and integration of FPGA-based systems. Deliver high-performance hardware solutions for Datacom and Aerospace applications. Participate in R&D activitie...

Design Verification Engineer Onsite Bangalore, India Offshore F2F Interview * Collaborate with cross-functional teams on ASIC design and verification using Perl, TCL. * Develop UVM testbenches for PCIe, Ethernet interfaces and AXI protocols.

As a Design Engineer specializing in SoC Boot, Power Management, and Security at Alphawave Semi, here is a summary of your role, key responsibilities, and qualifications required: Role Overview: As a key member of the team at Alphawave Semi, you will be responsible for leading the design of SoC Subsystem targeted for Boot, Security, power management, and low speed peripherals using Arm CPU Core in an inclusive team environment. Your role will involve architecting, planning design activities at the subsystem level, demonstrating expertise in boot, security, and low power multi-core Arm CPU-based SoC, and collaborating with the design verification team for debugging purposes. Additionally, you...

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s custom silicon/ASIC designs, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and...

What You ll Be Doing: Designing and implementing self-checking test benches using modern verification techniques. Developing verification components such as bus functional models, monitors, and behavioral models. Implementing functional coverage and assertions using System Verilog. Creating and executing test and functional coverage plans based on device s pecifications. Analyzing and debugging simulation failures to identify root causes. Evaluating functional coverage results to ensure thorough verification. The Impact You Will Have: Ensuring the highest quality of IP verification, contributing to the reliability and performance of cutting-edge technology. Enhancing the efficiency of the ve...

Architecting and making strategic decisions on test bench design for IP Core verification. Developing comprehensive verification plans and specifications based on functional requirements. Implementing robust test bench infrastructure and authoring advanced test cases using UVM/VMM/OVM. Driving a coverage-driven verification methodology to ensure thorough validation of IP functionality. Leading technical aspects of the verification team, mentoring junior engineers and collaborating internationally. Providing innovative verification solutions to enhance productivity, performance, and throughput. Engaging in assertion-based verification and coverage closure to guarantee high-quality deliverable...

NAB is looking for Associate Vice President to join our dynamic team and embark on a rewarding career journey Responsibilities: Develop and implement business strategies to achieve organizational goals. Lead and manage multiple departments or business units. Monitor performance metrics and ensure alignment with company objectives. Build and maintain relationships with key stakeholders and clients. Identify opportunities for business growth and expansion. Provide leadership and guidance to senior management teams. Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify ...

As an Astera Labs Principal DFT (Design for Test) Engineer, you will be part of the DFT Design team that develops the next generation of Astera Labs connectivity products that support the world s leading cloud service providers and server and networking OEMs. In this role, you have exposure and be responsible for the full product life cycle, from definition to mass production to end of life of the products. You will be working closely with all engineering teams, physical design and functions like back-end testing, manufacturing, defect, and reliability analysis. This employee must be team oriented with a focus on solving problems in a collaborative manner between multiple engineering teams. ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Looking for candidates between 3 to 13 years of experience. Worked on coverage driven module verification. Strong in System Verilog, UVM Sound experience in testbench (stimulus, agent, monitor, checker) development. Failure debugging with Verdi & log file. Worked in the verification having c based reference model inside the testbench Experience with assertion development. Familiar with the EDA tools IUS, VCS, Verdi etc. Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video pipeline is added advant...