1850 System Verilog Jobs - Page 6

Demonstrate a solid understanding of the CPU/CPU Based SoC Verification. Must have good understanding of one or more of the following domains ARM v8/v9, RISC-V, x86 Architecture Memory Architecture(DRAM, Cache, MMU), GIC, SoC Debug Architecture Cache Coherent Architectures PCIe OSCI Layer and its functionality PCIe Phy , Bring up and trainin SoC DV, BUS Interconnects Understand architecture and micro-architecture specifications. Work closely with Architects and Logic Designers. Develop Unit Level and/or Subsystem Level Test plans, Coverage Plans and checker Plans needed to target zero defect post-silicon quality. Develop scalable Test benches in System Verilog and UVM. Develop Tests, Functio...

What you will do Work on creating verification plan based on the IP design specification Build Standalone IP test bench using System Verilog Develop test cases, coverage model and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC) Use the IP/ SOC RTL in system verilog based logic verification environment & complete the functional verification Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality. Deliver the functional test vectors needed to be used for post-silicon validation. Be the single point contact for the concerned IP Verification and enable the Tapeout for all contro...

What you will do Work under broad guidance and create verification plan based on the IP design specification Build Standalone IP test bench using System Verilog Develop test cases, coverage model and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC) Use the IP/SOC RTL in system Verilog based logic verification environment & complete the functional verification Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality. Deliver the functional test vectors needed to be used for post-silicon validation. Be the single point contact for the concerned IP Verification and enable the Tap...

Demonstrate a solid understanding of the CPU/CPU Based SoC Verification. Must have good understanding of one or more of the following domains ARM v8/v9, RISC-V, x86 Architecture Memory Architecture(DRAM, Cache, MMU), GIC, SoC Debug Architecture Cache Coherent Architectures PCIe OSCI Layer and its functionality PCIe Phy , Bring up and trainin SoC DV, BUS Interconnects Understand architecture and micro-architecture specifications. Work closely with Architects and Logic Designers. Develop Unit Level and/or Subsystem Level Test plans, Coverage Plans and checker Plans needed to target zero defect post-silicon quality. Develop scalable Test benches in System Verilog and UVM. Develop Tests, Functio...

Key Skills and Responsibilities: IP verification Using SV/UVM or SOC Verification using C/SV VIP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART (3+) High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI or UPF or DDR Coverage Closure: Code, Functional and Toggle Tools: Synopsys VCS or Cadence Incisive Technical Documentation: Testbench Specification, Test Plan Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL Bachelors in Electronics Engineering is a minimum requirement Masters in Electronics or Computer Science Engineering is an added advantage 5 to 15 years minimum Exposure to working in multi-national environmen...

We are looking for skilled Senior ASIC/SoC RTL Engineer / Lead / Managers with 5-20 years of experience to join our team in Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, and Ahmedabad. The ideal candidate will have expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB, ATB, APB), interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC/SoC RTL code. Lead the development team in integrating subsystems and clusters at the SoC level. Collaborate with cross-functional teams to ensure successful project execution. Develop and ...

You will be part of Intel Core Design Team driving Intel's latest CPU's in the World's leading process technologies. CPU Core Group is looking for a Pre-Silicon Verification Lead/Architect specializing in Functional/Performance/Security Verification. Your responsibilities will include: - Leading and guiding a team to ensure the implementation of Strategic Tool/Flow/Methodologies/Quality Initiatives in projects to reduce the overall Cycle Time of Validation Project Cycle for PRQ Quality. - Developing complex Pre-Silicon Verification environments for simulation, creating Verification Components, and coverage plans. - Improving Validation Plans rigorously to ensure Right First Time Success of t...

As a SOC Performance Modeling Engineer at AMD, you will be part of the Client Performance Modeling Team in Hyderabad, India. Your primary responsibility will be to analyze the architectural performance of notebook and desktop processors through modeling and RTL simulation. You will collaborate with SoC, IP & Model architects to evaluate and debug CPU/GFX/NPU processor performance, as well as propose architectural enhancements. Your passion for leading edge SoC architecture, digital design, and verification will drive you to develop architectural models, tools, and infrastructure. You will investigate performance features, optimize settings, propose/evaluate improvements for next-gen SOCs, ca...

As an engineer at Qualcomm India Private Limited, you will have the opportunity to work on cutting-edge Wireless Technology projects, specifically focusing on IEEE 802.11 standards. Your role will involve collaborating with design teams globally and contributing to the development and implementation of hardware blocks for complex SoCs. You will also play a critical part in the WLAN subsystem, ensuring the successful delivery of IPs to the SOC design team. Strong fundamentals in Microarchitecture, Computer Arithmetic, Circuit Design, and Process Technology will be essential for excelling in this role. Key Responsibilities: - Develop HW blocks (IP design) and conduct High/Mid/Low level Design ...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle devel...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle ...

We are looking for a skilled professional with 05-20 years of experience to join our team as a Design Verification Engineer in Bangalore, Hyderabad, Kochi, and Pune. The ideal candidate will have a strong background in VLSI design verification. Roles and Responsibility Develop and implement functional specifications for IPs, subsystems, and SOCs. Review and revise system designs using System Verilog and UVM. Perform RTL simulations using Synopsys and Cadence simulators. Create and verify UPF models. Collaborate with cross-functional teams to ensure successful project execution. Analyze and debug complex design issues. Job Requirements Strong knowledge of System Verilog, UVM, and RTL simulati...

We are looking for a skilled ASIC RTL Engineer with 5-9 years of experience to join our team in Bengaluru, Hyderabad, Chennai, Pune, Kochi, and Ahmedabad. The ideal candidate will have expertise in IP RTL design targeted for SOC, Static checks, some basic protocols, Low power, Micro Architecture, SoC subsystem/IP design, interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC RTL code for various applications. Collaborate with cross-functional teams to ensure seamless integration of RTL designs into larger systems. Perform static checks on RTL designs to ensure compliance with industry standards and b...

We are looking for a skilled Technical Manager with 10+ years of experience to lead our Chip Design Front End team in Bangalore. The ideal candidate will have a strong background in project management, digital design, verification, and synthesis, as well as experience with EDA tools. Roles and Responsibility Manage front-end stages of semiconductor chip design projects. Lead technical teams to achieve project goals and objectives. Develop and implement project plans and schedules. Coordinate with cross-functional teams to ensure successful project execution. Identify and mitigate risks associated with chip design and development. Ensure compliance with industry standards and best practices. ...

We are looking for a skilled professional with 10-16 years of experience to lead our VLSI Practice team in Pune and Bangalore. The ideal candidate will have a strong background in AI Technical Lead or Architect for Semiconductor devices, working knowledge of machine learning, deep learning, and natural language processing (NLP) techniques. Roles and Responsibility Develop ASIC-application-specific integrated circuit/SoC-large-scale AI Semiconductor solutions. Design and implement VHDL, Python, Java, or C++ based systems. Collaborate with cross-functional teams to integrate AI models into larger systems. Work on projects related to Connectivity, I.40, Automotive, Embedded, VLSI, and HW. Lead ...

We are looking for a skilled Azure Terraform professional with 6-9 years of experience to join our team. The ideal candidate will have expertise in Azure administration, Scale Sets, VM administration, Windows fileserver, Load Balancers, SQL server RDS, Azure Managed Disk, Basic networking, and .NET. Roles and Responsibility Configure and manage Azure infrastructure, including scale sets, virtual machines, and storage. Design and implement load balancing solutions using Azure Load Balancer. Manage and maintain SQL server RDS replication on DR sites. Configure database connections and perform performance tuning. Troubleshoot connectivity issues by opening ports, configuring firewalls, NSGs, an...

We are looking for a skilled professional with 7 to 15 years of experience in DFT, simulation, and silicon validation. The ideal candidate will have a strong background in Full chip DFT, ATPG - coverage analysis, and scripting languages such as Perl and shell. Roles and Responsibility Design and develop DFT techniques for ASIC and other digital circuits. Perform simulation and silicon validation of DFT designs. Develop and implement ATPG - TestKompress, MBIST - MentorETVerify, and Simulation - VCS (preferred) methodologies. Collaborate with cross-functional teams to ensure successful project execution. Analyze and troubleshoot complex technical issues related to DFT and simulation. Develop a...

We are looking for a skilled professional with 7 to 15 years of experience in Design Verification to join our team. The ideal candidate will have expertise in SV/UVM Test Bench Development and protocols such as PCI Express, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, or HBM. Roles and Responsibility Develop and implement test benches using SV/UVM methodology. Collaborate with cross-functional teams to identify and prioritize verification requirements. Create and execute test cases to ensure design quality and reliability. Analyze and debug issues found during testing. Participate in the development of verification plans and strategies. Work closely with designers to resolve d...

We are looking for a skilled Emulation Engineer with 5 to 9 years of experience. The ideal candidate will have expertise in emulation technologies and scripting skills, including UNIX shell scripting, Perl, TCL, Arm CPU cores, protocols including PCIe, USB, Ethernet, AMBA, UART/SPI/I2C, DDR, flash memories, and their usage in SoC environments. Roles and Responsibility Design and develop emulation strategies for complex digital circuits. Develop and implement emulation models for various digital components, including processors, memory controllers, and peripheral devices. Collaborate with cross-functional teams to identify and prioritize emulation requirements. Create and maintain technical d...

Job Description: We're looking for a verification SME, responsible for the SoC verification process and designing the next-generation HBM DRAM products. Deep understanding of SoC Verification, testbench architecture, SoC verification methodologies, and 2.5D & 3D package integration. Responsibilities: • Develop test plans at SOC Level and analyze Coverage. • Build verification environments to verify complex SOCs. • Develop Random/Directed test in RTL and GLS environments. • Review architectural specifications to ensure high quality. • Work with customers to understand their verification &validation requirements • Debug and identify root causes and solutions for pre-silicon and post-silicon is...

As a member of the Front End CAD team, you will be responsible for the development, standardization and maintenance of engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from mu...

As a member of the Front End CAD team, you will work on the development, standardization and maintenance of our internal engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from ...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder expectat...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder exp...

Project Role : Engineering Services Practitioner Project Role Description : Assist with end-to-end engineering services to develop technical engineering solutions to solve problems and achieve business objectives. Solve engineering problems and achieve business objectives using scientific, socio-economic, technical knowledge and practical experience. Work across structural and stress design, qualification, configuration and technical management. Must have skills : 3D Modeling Good to have skills : NA Minimum 2 year(s) of experience is required Educational Qualification : BE or BTech Summary: As an Engineering Services Practitioner, you will be responsible for providing end-to-end engineering...