2.0 - 6.0 years

0 Lacs

karnataka

On-site

The Common Hardware Group (CHG) at Cisco is responsible for delivering silicon, optics, and hardware platforms for core Switching, Routing, and Wireless products. As a part of this team, you will contribute to designing networking hardware for Enterprises, Service Providers, the Public Sector, and Non-Profit Organizations globally. Cisco Silicon One is a groundbreaking silicon architecture that allows customers to utilize top-of-the-line silicon in various network environments. Join us in shaping innovative solutions by working on the design, development, and testing of complex ASICs. In this role, you will collaborate with the team on Verilog RTL and scripted flow implementation of Hardware Design-for-Test (DFT) features to support ATE, in-system test, debug, and diagnostics requirements. You will also be involved in Verilog testbench implementation for verification tests and automation scripts to enhance implementation quality and efficiency. **Minimum Qualifications:** - Bachelor's or Master's Degree in Electrical or Computer Engineering with a minimum of 2 years of experience. - Proficiency in DFT, test, and silicon engineering trends. - Familiarity with JTAG protocols, Scan and BIST architectures, ATPG, and EDA tools. - Verification skills in System Verilog Logic Equivalency checking and Test-timing validation. **Preferred Qualifications:** - Understanding of VLSI circuit physical behaviors in silicon. - Knowledge of timing concepts and EDA tools usage. - Strong verbal communication skills and adaptability in a dynamic environment. - Proficiency in scripting/coding languages such as Tcl, Python, Perl, or C/C++. Cisco is committed to embracing diversity, fostering innovation, and driving digital transformation. With a focus on inclusive teamwork and a culture of creativity, we encourage individuality and support continuous learning and growth. At Cisco, we value accountability, boldness, and diversity of thought. Join us in our journey to create a future where technology drives positive change and equality for all.,

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ASIC Engineer DFT Cisco

2.0 - 6.0 years

0 Lacs

karnataka

On-site

The Common Hardware Group (CHG) at Cisco is responsible for delivering silicon, optics, and hardware platforms for the core Switching, Routing, and Wireless products. We design networking hardware for Enterprises, Service Providers, the Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One is a unique silicon architecture that allows customers to utilize top-of-the-line silicon in TOR switches, web-scale data centers, and across various networks with a unified routing and switching portfolio. Join our team and contribute to shaping Cisco's innovative solutions by participating in the design, development, and testing of cutting-edge ASICs. As a member of our team, you will be involved in the Verilog RTL and scripted flow implementation of Hardware Design-for-Test (DFT) features supporting ATE, in-system test, debug, and diagnostics requirements. Additionally, you will collaborate on Verilog testbench implementation for verification tests related to DFT features and use cases. Your role will also include contributing to automation scripts aimed at enhancing implementation quality and efficiency. **Minimum Qualifications:** - Bachelor's or Master's Degree in Electrical or Computer Engineering with a minimum of 2 years of experience - Knowledge of the latest trends in DFT, test, and silicon engineering - Proficiency in JTAG protocols, Scan and BIST architectures, including memory BIST and boundary scan - Familiarity with ATPG and EDA tools such as TestMax, Tetramax, Tessent tool sets, and PrimeTime - Verification skills encompass System Verilog Logic Equivalency checking and validating the Test-timing of designs **Preferred Qualifications:** - Understanding of VLSI circuit physical behaviors in silicon, including electrical migration and temperature/voltage effects - Knowledge of basic timing concepts like setup and hold, metastability - Experience with EDA tools - Strong verbal communication skills and ability to excel in a dynamic environment - Proficiency in scripting/coding languages like Tcl, Python, Perl, or C/C++ Cisco is a diverse and inclusive environment where individuality is celebrated, and collaborative teamwork drives meaningful change for an inclusive future. Embracing digital transformation, we assist our customers in implementing digital changes in their businesses, showcasing our expertise as both a hardware and software company. Our innovative network solutions adapt, predict, learn, and protect, setting us apart as a company that defies traditional categorization. At Cisco, we value accountability, boldness, and diversity of thought. We foster a culture of innovation, creativity, and learning from failures, all while promoting equality for all individuals. Our inclusive environment encourages employees to be themselves, whether it's through unique personal styles or a passion for technology and positive change. Join us at Cisco, where your individuality and dedication to excellence are celebrated.,

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MTS Silicon Design Engineer AMD

3.0 - 7.0 years

3 - 7 Lacs

Hyderabad, Telangana, India

On-site

MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs.?As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Implementation and verification of DFT architecture and features Scan insertion and ATPG pattern generation ATPG patterns verification with gate-level simulation Test coverage and test cost reduction analysis Post silicon support to ensure successful bring up and enhance yield learning PREFERRED EXPERIENCE: Understanding of DesignforTest methodologies and DFT verificationexperience (eg.IEEE1500, JTAG 1149.x, Scan, memory BISTetc.) Experience with Mentortestkompressand/or SynopsysTetramax/DFTMAX Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors orMastersdegree in computer engineering/Electrical Engineering

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