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5.0 - 15.0 years
0 Lacs
noida, uttar pradesh
On-site
We are seeking experienced Senior/Lead ASIC Verification Engineers to join our Noida-VIP team. With 5 to 15 years of experience in Verification, particularly using industry-standard protocols and methodologies, this role offers a challenging opportunity for individuals well-versed in System Verilog, Verilog, and Object-Oriented Programming. As a successful candidate, you will have demonstrated your ability to lead the development of reusable Verification environments on at least 2 projects using VMM, OVM, or UVM methodologies. Your expertise should extend to protocols such as UCIe, PCIe, CXL, Unipro, USB, MIPI, HDMI, Ethernet, DDR, LPDDR, and HBM memory. Your responsibilities will include contributing to the development of the VIP, reviewing and signing off on VIP development and updates, and collaborating with Architects and methodology experts to address issues and drive architectural and methodological perspectives. If you are a proactive and reliable professional with a passion for Verification, we invite you to share your updated CV with us at taufiq@synopsys.com. Feel free to refer anyone who may be interested in this exciting opportunity as well. At Synopsys, we value Inclusion and Diversity, considering all applicants for employment without regard to race, color, religion, national origin, gender, gender identity, age, military veteran status, or disability. Join us in shaping the future of technology.,
Posted 2 weeks ago
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